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Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000018 */
19
20#ifndef __PROGRAMMER_H__
21#define __PROGRAMMER_H__ 1
22
Nico Huber1cf407b2017-11-10 20:18:23 +010023#include <stdint.h>
24
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000025#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000026
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000027enum programmer {
28#if CONFIG_INTERNAL == 1
29 PROGRAMMER_INTERNAL,
30#endif
31#if CONFIG_DUMMY == 1
32 PROGRAMMER_DUMMY,
33#endif
34#if CONFIG_NIC3COM == 1
35 PROGRAMMER_NIC3COM,
36#endif
37#if CONFIG_NICREALTEK == 1
38 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000039#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000040#if CONFIG_NICNATSEMI == 1
41 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000042#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000043#if CONFIG_GFXNVIDIA == 1
44 PROGRAMMER_GFXNVIDIA,
45#endif
46#if CONFIG_DRKAISER == 1
47 PROGRAMMER_DRKAISER,
48#endif
49#if CONFIG_SATASII == 1
50 PROGRAMMER_SATASII,
51#endif
52#if CONFIG_ATAHPT == 1
53 PROGRAMMER_ATAHPT,
54#endif
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +000055#if CONFIG_ATAVIA == 1
56 PROGRAMMER_ATAVIA,
57#endif
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000058#if CONFIG_ATAPROMISE == 1
59 PROGRAMMER_ATAPROMISE,
60#endif
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000061#if CONFIG_IT8212 == 1
62 PROGRAMMER_IT8212,
63#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000064#if CONFIG_FT2232_SPI == 1
65 PROGRAMMER_FT2232_SPI,
66#endif
67#if CONFIG_SERPROG == 1
68 PROGRAMMER_SERPROG,
69#endif
70#if CONFIG_BUSPIRATE_SPI == 1
71 PROGRAMMER_BUSPIRATE_SPI,
72#endif
73#if CONFIG_DEDIPROG == 1
74 PROGRAMMER_DEDIPROG,
75#endif
Daniel Thompson45e91a22018-06-04 13:46:29 +010076#if CONFIG_DEVELOPERBOX_SPI == 1
77 PROGRAMMER_DEVELOPERBOX_SPI,
78#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000079#if CONFIG_RAYER_SPI == 1
80 PROGRAMMER_RAYER_SPI,
81#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000082#if CONFIG_PONY_SPI == 1
83 PROGRAMMER_PONY_SPI,
84#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000085#if CONFIG_NICINTEL == 1
86 PROGRAMMER_NICINTEL,
87#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000088#if CONFIG_NICINTEL_SPI == 1
89 PROGRAMMER_NICINTEL_SPI,
90#endif
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +000091#if CONFIG_NICINTEL_EEPROM == 1
92 PROGRAMMER_NICINTEL_EEPROM,
93#endif
Mark Marshall90021f22010-12-03 14:48:11 +000094#if CONFIG_OGP_SPI == 1
95 PROGRAMMER_OGP_SPI,
96#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000097#if CONFIG_SATAMV == 1
98 PROGRAMMER_SATAMV,
99#endif
David Hendricksf9a30552015-05-23 20:30:30 -0700100#if CONFIG_LINUX_MTD == 1
101 PROGRAMMER_LINUX_MTD,
102#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000103#if CONFIG_LINUX_SPI == 1
104 PROGRAMMER_LINUX_SPI,
105#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000106#if CONFIG_USBBLASTER_SPI == 1
107 PROGRAMMER_USBBLASTER_SPI,
108#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000109#if CONFIG_MSTARDDC_SPI == 1
110 PROGRAMMER_MSTARDDC_SPI,
111#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000112#if CONFIG_PICKIT2_SPI == 1
113 PROGRAMMER_PICKIT2_SPI,
114#endif
Urja Rannikko0870b022016-01-31 22:10:29 +0000115#if CONFIG_CH341A_SPI == 1
116 PROGRAMMER_CH341A_SPI,
117#endif
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100118#if CONFIG_DIGILENT_SPI == 1
119 PROGRAMMER_DIGILENT_SPI,
120#endif
Marc Schink3578ec62016-03-17 16:23:03 +0100121#if CONFIG_JLINK_SPI == 1
122 PROGRAMMER_JLINK_SPI,
123#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000124 PROGRAMMER_INVALID /* This must always be the last entry. */
125};
126
Stefan Tauneraf358d62012-12-27 18:40:26 +0000127enum programmer_type {
128 PCI = 1, /* to detect uninitialized values */
129 USB,
130 OTHER,
131};
132
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000133struct dev_entry {
134 uint16_t vendor_id;
135 uint16_t device_id;
136 const enum test_state status;
137 const char *vendor_name;
138 const char *device_name;
139};
140
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000141struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000142 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000143 const enum programmer_type type;
144 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000145 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000146 const char *const note;
147 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000148
149 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000150
Stefan Tauner305e0b92013-07-17 23:46:44 +0000151 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000152 void (*unmap_flash_region) (void *virt_addr, size_t len);
153
Stefan Taunerf80419c2014-05-02 15:41:42 +0000154 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000155};
156
157extern const struct programmer_entry programmer_table[];
158
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000159int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000160int programmer_shutdown(void);
161
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000162struct bitbang_spi_master {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000163 /* Note that CS# is active low, so val=0 means the chip is active. */
164 void (*set_cs) (int val);
165 void (*set_sck) (int val);
166 void (*set_mosi) (int val);
167 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000168 void (*request_bus) (void);
169 void (*release_bus) (void);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100170 /* optional functions to optimize xfers */
171 void (*set_sck_set_mosi) (int sck, int mosi);
172 int (*set_sck_get_miso) (int sck);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000173 /* Length of half a clock period in usecs. */
174 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000175};
176
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000177#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000178struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000179
180/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000181// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000182extern struct pci_access *pacc;
183int pci_init_common(void);
184uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
185struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
186/* rpci_write_* are reversible writes. The original PCI config space register
187 * contents will be restored on shutdown.
Youness Alaouia54ceb12017-07-26 18:03:36 -0400188 * To clone the pci_dev instances internally, the `pacc` global
189 * variable has to reference a pci_access method that is compatible
190 * with the given pci_dev handle. The referenced pci_access (not
191 * the variable) has to stay valid until the shutdown handlers are
192 * finished.
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000193 */
194int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
195int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
196int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
197#endif
198
199#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000200struct penable {
201 uint16_t vendor_id;
202 uint16_t device_id;
Nico Huber2e50cdc2018-09-23 20:20:26 +0200203 enum chipbustype buses;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000204 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000205 const char *vendor_name;
206 const char *device_name;
207 int (*doit) (struct pci_dev *dev, const char *name);
208};
209
210extern const struct penable chipset_enables[];
211
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000212enum board_match_phase {
213 P1,
214 P2,
215 P3
216};
217
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000218struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000219 /* Any device, but make it sensible, like the ISA bridge. */
220 uint16_t first_vendor;
221 uint16_t first_device;
222 uint16_t first_card_vendor;
223 uint16_t first_card_device;
224
225 /* Any device, but make it sensible, like
226 * the host bridge. May be NULL.
227 */
228 uint16_t second_vendor;
229 uint16_t second_device;
230 uint16_t second_card_vendor;
231 uint16_t second_card_device;
232
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000233 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000234 const char *dmi_pattern;
235
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000236 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000237 const char *lb_vendor;
238 const char *lb_part;
239
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000240 enum board_match_phase phase;
241
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000242 const char *vendor_name;
243 const char *board_name;
244
245 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000246 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000247 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000248};
249
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000250extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000251
252struct board_info {
253 const char *vendor;
254 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000255 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000256#ifdef CONFIG_PRINT_WIKI
257 const char *url;
258 const char *note;
259#endif
260};
261
262extern const struct board_info boards_known[];
263extern const struct board_info laptops_known[];
264#endif
265
266/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000267void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000268void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000269void internal_sleep(unsigned int usecs);
270void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000271
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000272#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000273/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000274int selfcheck_board_enables(void);
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000275int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000276void w836xx_ext_enter(uint16_t port);
277void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000278void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000279int it8705f_write_enable(uint8_t port);
280uint8_t sio_read(uint16_t port, uint8_t reg);
281void sio_write(uint16_t port, uint8_t reg, uint8_t data);
282void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000283void board_handle_before_superio(void);
284void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000285int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000286
287/* chipset_enable.c */
288int chipset_flash_enable(void);
289
290/* processor_enable.c */
291int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000292#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000293
294/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000295void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000296void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000297void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000298void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000299void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000300void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000301#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000302int setup_cpu_msr(int cpu);
303void cleanup_cpu_msr(void);
304
305/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000306int cb_parse_table(const char **vendor, const char **model);
Nico Huber441d2a42016-05-02 11:39:35 +0200307int cb_check_image(const uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000308
309/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000310#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000311extern int has_dmi_support;
312void dmi_init(void);
313int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000314#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315
316/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000317struct superio {
318 uint16_t vendor;
319 uint16_t port;
320 uint16_t model;
321};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000322extern struct superio superios[];
323extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000324#define SUPERIO_VENDOR_NONE 0x0
325#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000326#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000327#endif
328#if NEED_PCI == 1
Uwe Hermann24c35e42011-07-13 11:22:03 +0000329struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000330struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
331struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
332 uint16_t card_vendor, uint16_t card_device);
333#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000334int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000335#if CONFIG_INTERNAL == 1
336extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000337extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000338extern int force_boardenable;
339extern int force_boardmismatch;
340void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000341int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000342extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000343int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000344#endif
345
346/* hwaccess.c */
347void mmio_writeb(uint8_t val, void *addr);
348void mmio_writew(uint16_t val, void *addr);
349void mmio_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100350uint8_t mmio_readb(const void *addr);
351uint16_t mmio_readw(const void *addr);
352uint32_t mmio_readl(const void *addr);
353void mmio_readn(const void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000354void mmio_le_writeb(uint8_t val, void *addr);
355void mmio_le_writew(uint16_t val, void *addr);
356void mmio_le_writel(uint32_t val, void *addr);
Nico Huberb4d8a2a2017-03-17 17:19:15 +0100357uint8_t mmio_le_readb(const void *addr);
358uint16_t mmio_le_readw(const void *addr);
359uint32_t mmio_le_readl(const void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000360#define pci_mmio_writeb mmio_le_writeb
361#define pci_mmio_writew mmio_le_writew
362#define pci_mmio_writel mmio_le_writel
363#define pci_mmio_readb mmio_le_readb
364#define pci_mmio_readw mmio_le_readw
365#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000366void rmmio_writeb(uint8_t val, void *addr);
367void rmmio_writew(uint16_t val, void *addr);
368void rmmio_writel(uint32_t val, void *addr);
369void rmmio_le_writeb(uint8_t val, void *addr);
370void rmmio_le_writew(uint16_t val, void *addr);
371void rmmio_le_writel(uint32_t val, void *addr);
372#define pci_rmmio_writeb rmmio_le_writeb
373#define pci_rmmio_writew rmmio_le_writew
374#define pci_rmmio_writel rmmio_le_writel
375void rmmio_valb(void *addr);
376void rmmio_valw(void *addr);
377void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000378
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000379/* dummyflasher.c */
380#if CONFIG_DUMMY == 1
381int dummy_init(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000382void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000383void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000384#endif
385
386/* nic3com.c */
387#if CONFIG_NIC3COM == 1
388int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000389extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000390#endif
391
392/* gfxnvidia.c */
393#if CONFIG_GFXNVIDIA == 1
394int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000395extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000396#endif
397
398/* drkaiser.c */
399#if CONFIG_DRKAISER == 1
400int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000401extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000402#endif
403
404/* nicrealtek.c */
405#if CONFIG_NICREALTEK == 1
406int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000407extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000408#endif
409
410/* nicnatsemi.c */
411#if CONFIG_NICNATSEMI == 1
412int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000413extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000414#endif
415
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000416/* nicintel.c */
417#if CONFIG_NICINTEL == 1
418int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000419extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000420#endif
421
Idwer Vollering004f4b72010-09-03 18:21:21 +0000422/* nicintel_spi.c */
423#if CONFIG_NICINTEL_SPI == 1
424int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000425extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000426#endif
427
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000428/* nicintel_eeprom.c */
429#if CONFIG_NICINTEL_EEPROM == 1
430int nicintel_ee_init(void);
431extern const struct dev_entry nics_intel_ee[];
432#endif
433
Mark Marshall90021f22010-12-03 14:48:11 +0000434/* ogp_spi.c */
435#if CONFIG_OGP_SPI == 1
436int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000437extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000438#endif
439
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000440/* satamv.c */
441#if CONFIG_SATAMV == 1
442int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000443extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000444#endif
445
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000446/* satasii.c */
447#if CONFIG_SATASII == 1
448int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000449extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000450#endif
451
452/* atahpt.c */
453#if CONFIG_ATAHPT == 1
454int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000455extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000456#endif
457
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000458/* atavia.c */
459#if CONFIG_ATAVIA == 1
460int atavia_init(void);
461void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len);
462extern const struct dev_entry ata_via[];
463#endif
464
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000465/* atapromise.c */
466#if CONFIG_ATAPROMISE == 1
467int atapromise_init(void);
468void *atapromise_map(const char *descr, uintptr_t phys_addr, size_t len);
469extern const struct dev_entry ata_promise[];
470#endif
471
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000472/* it8212.c */
473#if CONFIG_IT8212 == 1
474int it8212_init(void);
475extern const struct dev_entry devs_it8212[];
476#endif
477
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000478/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000479#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000480int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000481extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000482#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000483
James Lairdc60de0e2013-03-27 13:00:23 +0000484/* usbblaster_spi.c */
485#if CONFIG_USBBLASTER_SPI == 1
486int usbblaster_spi_init(void);
487extern const struct dev_entry devs_usbblasterspi[];
488#endif
489
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000490/* mstarddc_spi.c */
491#if CONFIG_MSTARDDC_SPI == 1
492int mstarddc_spi_init(void);
493#endif
494
Justin Chevrier66e554b2015-02-08 21:58:10 +0000495/* pickit2_spi.c */
496#if CONFIG_PICKIT2_SPI == 1
497int pickit2_spi_init(void);
Stefan Taunerf31fe842016-02-22 08:59:15 +0000498extern const struct dev_entry devs_pickit2_spi[];
Justin Chevrier66e554b2015-02-08 21:58:10 +0000499#endif
500
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000501/* rayer_spi.c */
502#if CONFIG_RAYER_SPI == 1
503int rayer_spi_init(void);
504#endif
505
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000506/* pony_spi.c */
507#if CONFIG_PONY_SPI == 1
508int pony_spi_init(void);
509#endif
510
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000511/* bitbang_spi.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000512int register_spi_bitbang_master(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000513
514/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000515#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000516int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000517#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000518
David Hendricksf9a30552015-05-23 20:30:30 -0700519/* linux_mtd.c */
520#if CONFIG_LINUX_MTD == 1
521int linux_mtd_init(void);
522#endif
523
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000524/* linux_spi.c */
525#if CONFIG_LINUX_SPI == 1
526int linux_spi_init(void);
527#endif
528
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000529/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000530#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000531int dediprog_init(void);
Stefan Taunerfdec7472016-02-22 08:59:27 +0000532extern const struct dev_entry devs_dediprog[];
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000533#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000534
Daniel Thompson45e91a22018-06-04 13:46:29 +0100535/* developerbox_spi.c */
536#if CONFIG_DEVELOPERBOX_SPI == 1
537int developerbox_spi_init(void);
538extern const struct dev_entry devs_developerbox_spi[];
539#endif
540
Urja Rannikko0870b022016-01-31 22:10:29 +0000541/* ch341a_spi.c */
542#if CONFIG_CH341A_SPI == 1
543int ch341a_spi_init(void);
544void ch341a_spi_delay(unsigned int usecs);
545extern const struct dev_entry devs_ch341a_spi[];
546#endif
547
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100548/* digilent_spi.c */
549#if CONFIG_DIGILENT_SPI == 1
550int digilent_spi_init(void);
551extern const struct dev_entry devs_digilent_spi[];
552#endif
553
Marc Schink3578ec62016-03-17 16:23:03 +0100554/* jlink_spi.c */
555#if CONFIG_JLINK_SPI == 1
556int jlink_spi_init(void);
557#endif
558
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000559/* flashrom.c */
560struct decode_sizes {
561 uint32_t parallel;
562 uint32_t lpc;
563 uint32_t fwh;
564 uint32_t spi;
565};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000566// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000567extern struct decode_sizes max_rom_decode;
568extern int programmer_may_write;
569extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000570unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000571char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000572
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000573/* spi.c */
Michael Karcher62797512011-05-11 17:07:02 +0000574#define MAX_DATA_UNSPECIFIED 0
575#define MAX_DATA_READ_UNLIMITED 64 * 1024
576#define MAX_DATA_WRITE_UNLIMITED 256
Nico Huber1cf407b2017-11-10 20:18:23 +0100577
578#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
Nico Huberdc5af542018-12-22 16:54:59 +0100579#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address
580 register, 4BA mode switch) don't work */
Nico Huber1cf407b2017-11-10 20:18:23 +0100581
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000582struct spi_master {
Nico Huber1cf407b2017-11-10 20:18:23 +0100583 uint32_t features;
Stefan Tauner23e10b82016-01-23 16:16:49 +0000584 unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
585 unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000586 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000587 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000588 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000589
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000590 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000591 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000592 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
593 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000594 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000595};
596
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000597int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000598 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000599int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000600int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000601int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
602int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000603int register_spi_master(const struct spi_master *mst);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000604
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000605/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000606enum ich_chipset {
607 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000608 CHIPSET_ICH,
609 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000610 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000611 CHIPSET_POULSBO, /* SCH U* */
612 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
613 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000614 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000615 CHIPSET_ICH8,
616 CHIPSET_ICH9,
617 CHIPSET_ICH10,
618 CHIPSET_5_SERIES_IBEX_PEAK,
619 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000620 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000621 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000622 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000623 CHIPSET_8_SERIES_LYNX_POINT_LP,
624 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000625 CHIPSET_9_SERIES_WILDCAT_POINT,
Nico Huber51205912017-03-17 17:59:54 +0100626 CHIPSET_9_SERIES_WILDCAT_POINT_LP,
Nico Huber93c30692017-03-20 14:25:09 +0100627 CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
David Hendricksa5216362017-08-08 20:02:22 -0700628 CHIPSET_C620_SERIES_LEWISBURG,
Nico Huber37509862019-01-18 14:23:02 +0100629 CHIPSET_APOLLO_LAKE,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000630};
631
Stefan Tauner2abab942012-04-27 20:41:23 +0000632/* ichspi.c */
633#if CONFIG_INTERNAL == 1
Nico Huber560111e2017-04-26 12:27:17 +0200634int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
635int via_init_spi(uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000636
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000637/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000638int amd_imc_shutdown(struct pci_dev *dev);
639
David Hendricks4e748392011-02-28 23:58:15 +0000640/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000641int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000642
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000643/* it87spi.c */
644void enter_conf_mode_ite(uint16_t port);
645void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000646void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000647int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000648
David Hendricksf9a30552015-05-23 20:30:30 -0700649#if CONFIG_LINUX_MTD == 1
650/* trivial wrapper to avoid cluttering internal_init() with #if */
651static inline int try_mtd(void) { return linux_mtd_init(); };
652#else
653static inline int try_mtd(void) { return 1; };
654#endif
655
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000656/* mcp6x_spi.c */
657int mcp6x_spi_init(int want_spi);
658
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000659/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000660int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000661
662/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000663int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000664#endif
665
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000666/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000667struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000668 int max_data_read;
669 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000670 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000671 int (*probe) (struct flashctx *flash);
672 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000673 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000674 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000675 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000676};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000677int register_opaque_master(const struct opaque_master *mst);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000678
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000679/* programmer.c */
680int noop_shutdown(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000681void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000682void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000683void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
684void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
685void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000686void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000687uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
688uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
689void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000690struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000691 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
692 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
693 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000694 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000695 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
696 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
697 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
698 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000699 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000700};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000701int register_par_master(const struct par_master *mst, const enum chipbustype buses);
702struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000703 enum chipbustype buses_supported;
704 union {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000705 struct par_master par;
706 struct spi_master spi;
707 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000708 };
709};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000710extern struct registered_master registered_masters[];
711extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000712int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000713
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000714/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000715#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000716int serprog_init(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000717void serprog_delay(unsigned int usecs);
Urja Rannikko0b4ffd52015-06-29 23:24:23 +0000718void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000719#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000720
721/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000722#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000723typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000724#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000725#else
726typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000727#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000728#endif
729
730void sp_flush_incoming(void);
Stefan Tauner72587f82016-01-04 03:05:15 +0000731fdtype sp_openserport(char *dev, int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000732extern fdtype sp_fd;
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600733int serialport_config(fdtype fd, int baud);
David Hendricks8bb20212011-06-14 01:35:36 +0000734int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000735int serialport_write(const unsigned char *buf, unsigned int writecnt);
736int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000737int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000738int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000739
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000740/* Serial port/pin mapping:
741
742 1 CD <-
743 2 RXD <-
744 3 TXD ->
745 4 DTR ->
746 5 GND --
747 6 DSR <-
748 7 RTS ->
749 8 CTS <-
750 9 RI <-
751*/
752enum SP_PIN {
753 PIN_CD = 1,
754 PIN_RXD,
755 PIN_TXD,
756 PIN_DTR,
757 PIN_GND,
758 PIN_DSR,
759 PIN_RTS,
760 PIN_CTS,
761 PIN_RI,
762};
763
764void sp_set_pin(enum SP_PIN pin, int val);
765int sp_get_pin(enum SP_PIN pin);
766
Nico Huber1cf407b2017-11-10 20:18:23 +0100767/* spi_master feature checks */
768static inline bool spi_master_4ba(const struct flashctx *const flash)
769{
770 return flash->mst->buses_supported & BUS_SPI &&
771 flash->mst->spi.features & SPI_MASTER_4BA;
772}
Nico Huberdc5af542018-12-22 16:54:59 +0100773static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash)
774{
775 return flash->mst->buses_supported & BUS_SPI &&
776 flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES;
777}
Nico Huber1cf407b2017-11-10 20:18:23 +0100778
Daniel Thompson1d507a02018-07-12 11:02:28 +0100779/* usbdev.c */
780struct libusb_device_handle;
781struct libusb_context;
782struct libusb_device_handle *usb_dev_get_by_vid_pid_serial(
783 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, const char *serialno);
784struct libusb_device_handle *usb_dev_get_by_vid_pid_number(
785 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, unsigned int num);
786
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000787#endif /* !__PROGRAMMER_H__ */