Add support for Intel Silvermont: Bay Trail, Rangeley and Avoton
The core of this patch to support Bay Trail originally came from the
Chromiumos flashrom repo and was modified by Sage to support the
Rangeley/Avoton parts as well.
Because that was not complicated enough already Stefan Tauner refactored
and refined everything. Bay Trail seems to be the first Atom SoC able to
support hwseq. No SPI Programming Guide could be obtained so it is
handled similarly to Lynx Point which seems to be its nearest relative.
Corresponding to flashrom svn r1844.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Marc Jones <marcj303@gmail.com>
Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Thomas Reardon <thomas_reardon@hotmail.com>
Tested-by: Wen Wang <wen.wang@adiengineering.com>
Acked-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
diff --git a/programmer.h b/programmer.h
index ab0d844..5ac54e7 100644
--- a/programmer.h
+++ b/programmer.h
@@ -600,6 +600,7 @@
CHIPSET_6_SERIES_COUGAR_POINT,
CHIPSET_7_SERIES_PANTHER_POINT,
CHIPSET_8_SERIES_LYNX_POINT,
+ CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
CHIPSET_8_SERIES_LYNX_POINT_LP,
CHIPSET_8_SERIES_WELLSBURG,
};