blob: 38534131ec6675206115801f290b363dd4733c79 [file] [log] [blame]
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __PROGRAMMER_H__
25#define __PROGRAMMER_H__ 1
26
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000028
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000029enum programmer {
30#if CONFIG_INTERNAL == 1
31 PROGRAMMER_INTERNAL,
32#endif
33#if CONFIG_DUMMY == 1
34 PROGRAMMER_DUMMY,
35#endif
36#if CONFIG_NIC3COM == 1
37 PROGRAMMER_NIC3COM,
38#endif
39#if CONFIG_NICREALTEK == 1
40 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000041#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042#if CONFIG_NICNATSEMI == 1
43 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000044#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000045#if CONFIG_GFXNVIDIA == 1
46 PROGRAMMER_GFXNVIDIA,
47#endif
48#if CONFIG_DRKAISER == 1
49 PROGRAMMER_DRKAISER,
50#endif
51#if CONFIG_SATASII == 1
52 PROGRAMMER_SATASII,
53#endif
54#if CONFIG_ATAHPT == 1
55 PROGRAMMER_ATAHPT,
56#endif
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +000057#if CONFIG_ATAVIA == 1
58 PROGRAMMER_ATAVIA,
59#endif
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000060#if CONFIG_ATAPROMISE == 1
61 PROGRAMMER_ATAPROMISE,
62#endif
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000063#if CONFIG_IT8212 == 1
64 PROGRAMMER_IT8212,
65#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000066#if CONFIG_FT2232_SPI == 1
67 PROGRAMMER_FT2232_SPI,
68#endif
69#if CONFIG_SERPROG == 1
70 PROGRAMMER_SERPROG,
71#endif
72#if CONFIG_BUSPIRATE_SPI == 1
73 PROGRAMMER_BUSPIRATE_SPI,
74#endif
75#if CONFIG_DEDIPROG == 1
76 PROGRAMMER_DEDIPROG,
77#endif
78#if CONFIG_RAYER_SPI == 1
79 PROGRAMMER_RAYER_SPI,
80#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000081#if CONFIG_PONY_SPI == 1
82 PROGRAMMER_PONY_SPI,
83#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000084#if CONFIG_NICINTEL == 1
85 PROGRAMMER_NICINTEL,
86#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000087#if CONFIG_NICINTEL_SPI == 1
88 PROGRAMMER_NICINTEL_SPI,
89#endif
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +000090#if CONFIG_NICINTEL_EEPROM == 1
91 PROGRAMMER_NICINTEL_EEPROM,
92#endif
Mark Marshall90021f22010-12-03 14:48:11 +000093#if CONFIG_OGP_SPI == 1
94 PROGRAMMER_OGP_SPI,
95#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000096#if CONFIG_SATAMV == 1
97 PROGRAMMER_SATAMV,
98#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +000099#if CONFIG_LINUX_SPI == 1
100 PROGRAMMER_LINUX_SPI,
101#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000102#if CONFIG_USBBLASTER_SPI == 1
103 PROGRAMMER_USBBLASTER_SPI,
104#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000105#if CONFIG_MSTARDDC_SPI == 1
106 PROGRAMMER_MSTARDDC_SPI,
107#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000108#if CONFIG_PICKIT2_SPI == 1
109 PROGRAMMER_PICKIT2_SPI,
110#endif
Urja Rannikko0870b022016-01-31 22:10:29 +0000111#if CONFIG_CH341A_SPI == 1
112 PROGRAMMER_CH341A_SPI,
113#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000114 PROGRAMMER_INVALID /* This must always be the last entry. */
115};
116
Stefan Tauneraf358d62012-12-27 18:40:26 +0000117enum programmer_type {
118 PCI = 1, /* to detect uninitialized values */
119 USB,
120 OTHER,
121};
122
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000123struct dev_entry {
124 uint16_t vendor_id;
125 uint16_t device_id;
126 const enum test_state status;
127 const char *vendor_name;
128 const char *device_name;
129};
130
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000131struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000132 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000133 const enum programmer_type type;
134 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000135 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000136 const char *const note;
137 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000138
139 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000140
Stefan Tauner305e0b92013-07-17 23:46:44 +0000141 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000142 void (*unmap_flash_region) (void *virt_addr, size_t len);
143
Stefan Taunerf80419c2014-05-02 15:41:42 +0000144 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000145};
146
147extern const struct programmer_entry programmer_table[];
148
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000149int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000150int programmer_shutdown(void);
151
152enum bitbang_spi_master_type {
153 BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
154#if CONFIG_RAYER_SPI == 1
155 BITBANG_SPI_MASTER_RAYER,
156#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000157#if CONFIG_PONY_SPI == 1
158 BITBANG_SPI_MASTER_PONY,
159#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +0000160#if CONFIG_NICINTEL_SPI == 1
161 BITBANG_SPI_MASTER_NICINTEL,
162#endif
Carl-Daniel Hailfinger2f436162010-07-28 15:08:35 +0000163#if CONFIG_INTERNAL == 1
164#if defined(__i386__) || defined(__x86_64__)
165 BITBANG_SPI_MASTER_MCP,
166#endif
167#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000168#if CONFIG_OGP_SPI == 1
169 BITBANG_SPI_MASTER_OGP,
170#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000171};
172
173struct bitbang_spi_master {
174 enum bitbang_spi_master_type type;
175
176 /* Note that CS# is active low, so val=0 means the chip is active. */
177 void (*set_cs) (int val);
178 void (*set_sck) (int val);
179 void (*set_mosi) (int val);
180 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000181 void (*request_bus) (void);
182 void (*release_bus) (void);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000183 /* Length of half a clock period in usecs. */
184 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000185};
186
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000187#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000188struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000189
190/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000191// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000192extern struct pci_access *pacc;
193int pci_init_common(void);
194uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
195struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
196/* rpci_write_* are reversible writes. The original PCI config space register
197 * contents will be restored on shutdown.
198 */
199int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
200int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
201int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
202#endif
203
204#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000205struct penable {
206 uint16_t vendor_id;
207 uint16_t device_id;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000208 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000209 const char *vendor_name;
210 const char *device_name;
211 int (*doit) (struct pci_dev *dev, const char *name);
212};
213
214extern const struct penable chipset_enables[];
215
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000216enum board_match_phase {
217 P1,
218 P2,
219 P3
220};
221
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000222struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000223 /* Any device, but make it sensible, like the ISA bridge. */
224 uint16_t first_vendor;
225 uint16_t first_device;
226 uint16_t first_card_vendor;
227 uint16_t first_card_device;
228
229 /* Any device, but make it sensible, like
230 * the host bridge. May be NULL.
231 */
232 uint16_t second_vendor;
233 uint16_t second_device;
234 uint16_t second_card_vendor;
235 uint16_t second_card_device;
236
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000237 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000238 const char *dmi_pattern;
239
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000240 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000241 const char *lb_vendor;
242 const char *lb_part;
243
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000244 enum board_match_phase phase;
245
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000246 const char *vendor_name;
247 const char *board_name;
248
249 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000250 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000251 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000252};
253
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000254extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000255
256struct board_info {
257 const char *vendor;
258 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000259 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000260#ifdef CONFIG_PRINT_WIKI
261 const char *url;
262 const char *note;
263#endif
264};
265
266extern const struct board_info boards_known[];
267extern const struct board_info laptops_known[];
268#endif
269
270/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000271void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000272void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000273void internal_sleep(unsigned int usecs);
274void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000275
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000276#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000277/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000278int selfcheck_board_enables(void);
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000279int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000280void w836xx_ext_enter(uint16_t port);
281void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000282void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000283int it8705f_write_enable(uint8_t port);
284uint8_t sio_read(uint16_t port, uint8_t reg);
285void sio_write(uint16_t port, uint8_t reg, uint8_t data);
286void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000287void board_handle_before_superio(void);
288void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000289int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000290
291/* chipset_enable.c */
292int chipset_flash_enable(void);
293
294/* processor_enable.c */
295int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000296#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000297
298/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000299void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000300void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000301void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000302void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000303void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000304void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000305#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000306int setup_cpu_msr(int cpu);
307void cleanup_cpu_msr(void);
308
309/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000310int cb_parse_table(const char **vendor, const char **model);
Nico Huber441d2a42016-05-02 11:39:35 +0200311int cb_check_image(const uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000312
313/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000314#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315extern int has_dmi_support;
316void dmi_init(void);
317int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000318#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000319
320/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000321struct superio {
322 uint16_t vendor;
323 uint16_t port;
324 uint16_t model;
325};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000326extern struct superio superios[];
327extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000328#define SUPERIO_VENDOR_NONE 0x0
329#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000330#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000331#endif
332#if NEED_PCI == 1
Uwe Hermann24c35e42011-07-13 11:22:03 +0000333struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000334struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
335struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
336 uint16_t card_vendor, uint16_t card_device);
337#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000338int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000339#if CONFIG_INTERNAL == 1
340extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000341extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000342extern int force_boardenable;
343extern int force_boardmismatch;
344void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000345int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000346extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000347int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000348#endif
349
350/* hwaccess.c */
351void mmio_writeb(uint8_t val, void *addr);
352void mmio_writew(uint16_t val, void *addr);
353void mmio_writel(uint32_t val, void *addr);
354uint8_t mmio_readb(void *addr);
355uint16_t mmio_readw(void *addr);
356uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerccd71c22012-03-01 22:38:27 +0000357void mmio_readn(void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000358void mmio_le_writeb(uint8_t val, void *addr);
359void mmio_le_writew(uint16_t val, void *addr);
360void mmio_le_writel(uint32_t val, void *addr);
361uint8_t mmio_le_readb(void *addr);
362uint16_t mmio_le_readw(void *addr);
363uint32_t mmio_le_readl(void *addr);
364#define pci_mmio_writeb mmio_le_writeb
365#define pci_mmio_writew mmio_le_writew
366#define pci_mmio_writel mmio_le_writel
367#define pci_mmio_readb mmio_le_readb
368#define pci_mmio_readw mmio_le_readw
369#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000370void rmmio_writeb(uint8_t val, void *addr);
371void rmmio_writew(uint16_t val, void *addr);
372void rmmio_writel(uint32_t val, void *addr);
373void rmmio_le_writeb(uint8_t val, void *addr);
374void rmmio_le_writew(uint16_t val, void *addr);
375void rmmio_le_writel(uint32_t val, void *addr);
376#define pci_rmmio_writeb rmmio_le_writeb
377#define pci_rmmio_writew rmmio_le_writew
378#define pci_rmmio_writel rmmio_le_writel
379void rmmio_valb(void *addr);
380void rmmio_valw(void *addr);
381void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000382
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000383/* dummyflasher.c */
384#if CONFIG_DUMMY == 1
385int dummy_init(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000386void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000387void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000388#endif
389
390/* nic3com.c */
391#if CONFIG_NIC3COM == 1
392int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000393extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000394#endif
395
396/* gfxnvidia.c */
397#if CONFIG_GFXNVIDIA == 1
398int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000399extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000400#endif
401
402/* drkaiser.c */
403#if CONFIG_DRKAISER == 1
404int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000405extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000406#endif
407
408/* nicrealtek.c */
409#if CONFIG_NICREALTEK == 1
410int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000411extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000412#endif
413
414/* nicnatsemi.c */
415#if CONFIG_NICNATSEMI == 1
416int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000417extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000418#endif
419
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000420/* nicintel.c */
421#if CONFIG_NICINTEL == 1
422int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000423extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000424#endif
425
Idwer Vollering004f4b72010-09-03 18:21:21 +0000426/* nicintel_spi.c */
427#if CONFIG_NICINTEL_SPI == 1
428int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000429extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000430#endif
431
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000432/* nicintel_eeprom.c */
433#if CONFIG_NICINTEL_EEPROM == 1
434int nicintel_ee_init(void);
435extern const struct dev_entry nics_intel_ee[];
436#endif
437
Mark Marshall90021f22010-12-03 14:48:11 +0000438/* ogp_spi.c */
439#if CONFIG_OGP_SPI == 1
440int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000441extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000442#endif
443
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000444/* satamv.c */
445#if CONFIG_SATAMV == 1
446int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000447extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000448#endif
449
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000450/* satasii.c */
451#if CONFIG_SATASII == 1
452int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000453extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000454#endif
455
456/* atahpt.c */
457#if CONFIG_ATAHPT == 1
458int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000459extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000460#endif
461
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000462/* atavia.c */
463#if CONFIG_ATAVIA == 1
464int atavia_init(void);
465void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len);
466extern const struct dev_entry ata_via[];
467#endif
468
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000469/* atapromise.c */
470#if CONFIG_ATAPROMISE == 1
471int atapromise_init(void);
472void *atapromise_map(const char *descr, uintptr_t phys_addr, size_t len);
473extern const struct dev_entry ata_promise[];
474#endif
475
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000476/* it8212.c */
477#if CONFIG_IT8212 == 1
478int it8212_init(void);
479extern const struct dev_entry devs_it8212[];
480#endif
481
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000482/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000483#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000484int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000485extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000486#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000487
James Lairdc60de0e2013-03-27 13:00:23 +0000488/* usbblaster_spi.c */
489#if CONFIG_USBBLASTER_SPI == 1
490int usbblaster_spi_init(void);
491extern const struct dev_entry devs_usbblasterspi[];
492#endif
493
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000494/* mstarddc_spi.c */
495#if CONFIG_MSTARDDC_SPI == 1
496int mstarddc_spi_init(void);
497#endif
498
Justin Chevrier66e554b2015-02-08 21:58:10 +0000499/* pickit2_spi.c */
500#if CONFIG_PICKIT2_SPI == 1
501int pickit2_spi_init(void);
Stefan Taunerf31fe842016-02-22 08:59:15 +0000502extern const struct dev_entry devs_pickit2_spi[];
Justin Chevrier66e554b2015-02-08 21:58:10 +0000503#endif
504
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000505/* rayer_spi.c */
506#if CONFIG_RAYER_SPI == 1
507int rayer_spi_init(void);
508#endif
509
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000510/* pony_spi.c */
511#if CONFIG_PONY_SPI == 1
512int pony_spi_init(void);
513#endif
514
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000515/* bitbang_spi.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000516int register_spi_bitbang_master(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000517
518/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000519#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000520int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000521#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000522
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000523/* linux_spi.c */
524#if CONFIG_LINUX_SPI == 1
525int linux_spi_init(void);
526#endif
527
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000528/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000529#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000530int dediprog_init(void);
Stefan Taunerfdec7472016-02-22 08:59:27 +0000531extern const struct dev_entry devs_dediprog[];
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000532#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000533
Urja Rannikko0870b022016-01-31 22:10:29 +0000534/* ch341a_spi.c */
535#if CONFIG_CH341A_SPI == 1
536int ch341a_spi_init(void);
537void ch341a_spi_delay(unsigned int usecs);
538extern const struct dev_entry devs_ch341a_spi[];
539#endif
540
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000541/* flashrom.c */
542struct decode_sizes {
543 uint32_t parallel;
544 uint32_t lpc;
545 uint32_t fwh;
546 uint32_t spi;
547};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000548// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000549extern struct decode_sizes max_rom_decode;
550extern int programmer_may_write;
551extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000552unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000553char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000554
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000555/* spi.c */
556enum spi_controller {
557 SPI_CONTROLLER_NONE,
558#if CONFIG_INTERNAL == 1
559#if defined(__i386__) || defined(__x86_64__)
560 SPI_CONTROLLER_ICH7,
561 SPI_CONTROLLER_ICH9,
David Hendricks4e748392011-02-28 23:58:15 +0000562 SPI_CONTROLLER_IT85XX,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000563 SPI_CONTROLLER_IT87XX,
564 SPI_CONTROLLER_SB600,
Wei Hu31402ee2014-05-16 21:39:33 +0000565 SPI_CONTROLLER_YANGTZE,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000566 SPI_CONTROLLER_VIA,
567 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000568#endif
569#endif
570#if CONFIG_FT2232_SPI == 1
571 SPI_CONTROLLER_FT2232,
572#endif
573#if CONFIG_DUMMY == 1
574 SPI_CONTROLLER_DUMMY,
575#endif
576#if CONFIG_BUSPIRATE_SPI == 1
577 SPI_CONTROLLER_BUSPIRATE,
578#endif
579#if CONFIG_DEDIPROG == 1
580 SPI_CONTROLLER_DEDIPROG,
581#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000582#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__)))
Michael Karcherb9dbe482011-05-11 17:07:07 +0000583 SPI_CONTROLLER_BITBANG,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000584#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000585#if CONFIG_LINUX_SPI == 1
586 SPI_CONTROLLER_LINUX,
587#endif
Urja Rannikkoc93f5f12011-09-15 23:38:14 +0000588#if CONFIG_SERPROG == 1
589 SPI_CONTROLLER_SERPROG,
590#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000591#if CONFIG_USBBLASTER_SPI == 1
592 SPI_CONTROLLER_USBBLASTER,
593#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000594#if CONFIG_MSTARDDC_SPI == 1
595 SPI_CONTROLLER_MSTARDDC,
596#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000597#if CONFIG_PICKIT2_SPI == 1
598 SPI_CONTROLLER_PICKIT2,
599#endif
Urja Rannikko0870b022016-01-31 22:10:29 +0000600#if CONFIG_CH341A_SPI == 1
601 SPI_CONTROLLER_CH341A_SPI,
602#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000603};
Michael Karcher62797512011-05-11 17:07:02 +0000604
605#define MAX_DATA_UNSPECIFIED 0
606#define MAX_DATA_READ_UNLIMITED 64 * 1024
607#define MAX_DATA_WRITE_UNLIMITED 256
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000608struct spi_master {
Michael Karcherb9dbe482011-05-11 17:07:07 +0000609 enum spi_controller type;
Stefan Tauner23e10b82016-01-23 16:16:49 +0000610 unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
611 unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000612 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000613 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000614 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000615
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000616 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000617 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000618 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
619 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000620 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000621};
622
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000623int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000624 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000625int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000626int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000627int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
628int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000629int register_spi_master(const struct spi_master *mst);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000630
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000631/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000632enum ich_chipset {
633 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000634 CHIPSET_ICH,
635 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000636 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000637 CHIPSET_POULSBO, /* SCH U* */
638 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
639 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000640 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000641 CHIPSET_ICH8,
642 CHIPSET_ICH9,
643 CHIPSET_ICH10,
644 CHIPSET_5_SERIES_IBEX_PEAK,
645 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000646 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000647 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000648 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000649 CHIPSET_8_SERIES_LYNX_POINT_LP,
650 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000651 CHIPSET_9_SERIES_WILDCAT_POINT,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000652};
653
Stefan Tauner2abab942012-04-27 20:41:23 +0000654/* ichspi.c */
655#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000656extern uint32_t ichspi_bbar;
Stefan Tauner92d6a862013-10-25 00:33:37 +0000657int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation);
Helge Wagnerdd73d832012-08-24 23:03:46 +0000658int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000659
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000660/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000661int amd_imc_shutdown(struct pci_dev *dev);
662
David Hendricks4e748392011-02-28 23:58:15 +0000663/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000664int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000665
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000666/* it87spi.c */
667void enter_conf_mode_ite(uint16_t port);
668void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000669void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000670int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000671
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000672/* mcp6x_spi.c */
673int mcp6x_spi_init(int want_spi);
674
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000675/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000676int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000677
678/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000679int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000680#endif
681
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000682/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000683struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000684 int max_data_read;
685 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000686 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000687 int (*probe) (struct flashctx *flash);
688 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000689 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000690 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000691 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000692};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000693int register_opaque_master(const struct opaque_master *mst);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000694
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000695/* programmer.c */
696int noop_shutdown(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000697void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000698void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000699void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
700void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
701void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000702void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000703uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
704uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
705void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000706struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000707 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
708 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
709 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000710 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000711 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
712 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
713 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
714 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000715 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000716};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000717int register_par_master(const struct par_master *mst, const enum chipbustype buses);
718struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000719 enum chipbustype buses_supported;
720 union {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000721 struct par_master par;
722 struct spi_master spi;
723 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000724 };
725};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000726extern struct registered_master registered_masters[];
727extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000728int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000729
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000730/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000731#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000732int serprog_init(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000733void serprog_delay(unsigned int usecs);
Urja Rannikko0b4ffd52015-06-29 23:24:23 +0000734void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000735#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000736
737/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000738#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000739typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000740#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000741#else
742typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000743#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000744#endif
745
746void sp_flush_incoming(void);
Stefan Tauner72587f82016-01-04 03:05:15 +0000747fdtype sp_openserport(char *dev, int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000748extern fdtype sp_fd;
David Hendricks8bb20212011-06-14 01:35:36 +0000749int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000750int serialport_write(const unsigned char *buf, unsigned int writecnt);
751int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000752int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000753int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000754
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000755/* Serial port/pin mapping:
756
757 1 CD <-
758 2 RXD <-
759 3 TXD ->
760 4 DTR ->
761 5 GND --
762 6 DSR <-
763 7 RTS ->
764 8 CTS <-
765 9 RI <-
766*/
767enum SP_PIN {
768 PIN_CD = 1,
769 PIN_RXD,
770 PIN_TXD,
771 PIN_DTR,
772 PIN_GND,
773 PIN_DSR,
774 PIN_RTS,
775 PIN_CTS,
776 PIN_RI,
777};
778
779void sp_set_pin(enum SP_PIN pin, int val);
780int sp_get_pin(enum SP_PIN pin);
781
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000782#endif /* !__PROGRAMMER_H__ */