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Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000018 */
19
20#ifndef __PROGRAMMER_H__
21#define __PROGRAMMER_H__ 1
22
Nico Huber1cf407b2017-11-10 20:18:23 +010023#include <stdint.h>
24
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000025#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000026
Stefan Tauneraf358d62012-12-27 18:40:26 +000027enum programmer_type {
28 PCI = 1, /* to detect uninitialized values */
29 USB,
30 OTHER,
31};
32
Stefan Tauner4b24a2d2012-12-27 18:40:36 +000033struct dev_entry {
34 uint16_t vendor_id;
35 uint16_t device_id;
36 const enum test_state status;
37 const char *vendor_name;
38 const char *device_name;
39};
40
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000041struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +000043 const enum programmer_type type;
44 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +000045 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +000046 const char *const note;
47 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000048
49 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000050
Stefan Tauner305e0b92013-07-17 23:46:44 +000051 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000052 void (*unmap_flash_region) (void *virt_addr, size_t len);
53
Stefan Taunerf80419c2014-05-02 15:41:42 +000054 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000055};
56
Thomas Heijligen633d6db2021-03-31 19:09:44 +020057extern const struct programmer_entry *const programmer_table[];
Thomas Heijligend0fcce22021-05-19 13:53:34 +020058extern const size_t programmer_table_size;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000059
Thomas Heijligen40d32332021-06-10 15:17:53 +020060/* programmer drivers */
Thomas Heijligen40d32332021-06-10 15:17:53 +020061extern const struct programmer_entry programmer_atahpt;
Thomas Heijligen40d32332021-06-10 15:17:53 +020062extern const struct programmer_entry programmer_atapromise;
Thomas Heijligen1535db42021-06-14 13:20:09 +020063extern const struct programmer_entry programmer_atavia;
Thomas Heijligen40d32332021-06-10 15:17:53 +020064extern const struct programmer_entry programmer_buspirate_spi;
Thomas Heijligen1535db42021-06-14 13:20:09 +020065extern const struct programmer_entry programmer_ch341a_spi;
Thomas Heijligen40d32332021-06-10 15:17:53 +020066extern const struct programmer_entry programmer_dediprog;
67extern const struct programmer_entry programmer_developerbox;
Thomas Heijligen40d32332021-06-10 15:17:53 +020068extern const struct programmer_entry programmer_digilent_spi;
Thomas Heijligen1535db42021-06-14 13:20:09 +020069extern const struct programmer_entry programmer_drkaiser;
70extern const struct programmer_entry programmer_dummy;
71extern const struct programmer_entry programmer_ft2232_spi;
72extern const struct programmer_entry programmer_gfxnvidia;
73extern const struct programmer_entry programmer_internal;
74extern const struct programmer_entry programmer_it8212;
Thomas Heijligen40d32332021-06-10 15:17:53 +020075extern const struct programmer_entry programmer_jlink_spi;
Thomas Heijligen1535db42021-06-14 13:20:09 +020076extern const struct programmer_entry programmer_linux_mtd;
77extern const struct programmer_entry programmer_linux_spi;
78extern const struct programmer_entry programmer_mstarddc_spi;
Thomas Heijligen40d32332021-06-10 15:17:53 +020079extern const struct programmer_entry programmer_ni845x_spi;
Thomas Heijligen1535db42021-06-14 13:20:09 +020080extern const struct programmer_entry programmer_nic3com;
81extern const struct programmer_entry programmer_nicintel;
82extern const struct programmer_entry programmer_nicintel_eeprom;
83extern const struct programmer_entry programmer_nicintel_spi;
84extern const struct programmer_entry programmer_nicnatsemi;
85extern const struct programmer_entry programmer_nicrealtek;
86extern const struct programmer_entry programmer_ogp_spi;
87extern const struct programmer_entry programmer_pickit2_spi;
88extern const struct programmer_entry programmer_pony_spi;
89extern const struct programmer_entry programmer_rayer_spi;
90extern const struct programmer_entry programmer_satamv;
91extern const struct programmer_entry programmer_satasii;
Thomas Heijligen40d32332021-06-10 15:17:53 +020092extern const struct programmer_entry programmer_serprog;
Thomas Heijligen1535db42021-06-14 13:20:09 +020093extern const struct programmer_entry programmer_stlinkv3_spi;
94extern const struct programmer_entry programmer_usbblaster_spi;
Jean THOMASe28d8e42022-10-11 17:54:30 +020095extern const struct programmer_entry programmer_dirtyjtag_spi;
Thomas Heijligen40d32332021-06-10 15:17:53 +020096
Thomas Heijligene0e93cf2021-06-01 14:37:12 +020097int programmer_init(const struct programmer_entry *prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000098int programmer_shutdown(void);
99
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000100struct bitbang_spi_master {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000101 /* Note that CS# is active low, so val=0 means the chip is active. */
102 void (*set_cs) (int val);
103 void (*set_sck) (int val);
104 void (*set_mosi) (int val);
105 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000106 void (*request_bus) (void);
107 void (*release_bus) (void);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100108 /* optional functions to optimize xfers */
109 void (*set_sck_set_mosi) (int sck, int mosi);
110 int (*set_sck_get_miso) (int sck);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000111 /* Length of half a clock period in usecs. */
112 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000113};
114
Patrick Georgi32508eb2012-07-20 20:35:14 +0000115struct pci_dev;
Edward O'Callaghan15004ba2021-11-13 13:14:06 +1100116struct pci_filter;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000117
118/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000119// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000120extern struct pci_access *pacc;
121int pci_init_common(void);
122uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
123struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
Edward O'Callaghan15004ba2021-11-13 13:14:06 +1100124struct pci_dev *pcidev_scandev(struct pci_filter *filter, struct pci_dev *start);
Edward O'Callaghan48a94662022-02-26 11:36:17 +1100125struct pci_dev *pcidev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Edward O'Callaghan6c73e272021-11-13 17:56:20 +1100126struct pci_dev *pcidev_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device);
Edward O'Callaghan19ce50d2021-11-13 17:59:18 +1100127struct pci_dev *pcidev_find(uint16_t vendor, uint16_t device);
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000128/* rpci_write_* are reversible writes. The original PCI config space register
129 * contents will be restored on shutdown.
Youness Alaouia54ceb12017-07-26 18:03:36 -0400130 * To clone the pci_dev instances internally, the `pacc` global
131 * variable has to reference a pci_access method that is compatible
132 * with the given pci_dev handle. The referenced pci_access (not
133 * the variable) has to stay valid until the shutdown handlers are
134 * finished.
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000135 */
136int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
137int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
138int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000139
140#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000141struct penable {
142 uint16_t vendor_id;
143 uint16_t device_id;
Nico Huber2e50cdc2018-09-23 20:20:26 +0200144 enum chipbustype buses;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000145 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000146 const char *vendor_name;
147 const char *device_name;
148 int (*doit) (struct pci_dev *dev, const char *name);
149};
150
151extern const struct penable chipset_enables[];
152
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000153enum board_match_phase {
154 P1,
155 P2,
156 P3
157};
158
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000159struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000160 /* Any device, but make it sensible, like the ISA bridge. */
161 uint16_t first_vendor;
162 uint16_t first_device;
163 uint16_t first_card_vendor;
164 uint16_t first_card_device;
165
166 /* Any device, but make it sensible, like
167 * the host bridge. May be NULL.
168 */
169 uint16_t second_vendor;
170 uint16_t second_device;
171 uint16_t second_card_vendor;
172 uint16_t second_card_device;
173
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000174 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000175 const char *dmi_pattern;
176
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000177 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000178 const char *lb_vendor;
179 const char *lb_part;
180
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000181 enum board_match_phase phase;
182
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000183 const char *vendor_name;
184 const char *board_name;
185
186 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000187 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000188 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000189};
190
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000191extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000192
193struct board_info {
194 const char *vendor;
195 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000196 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000197#ifdef CONFIG_PRINT_WIKI
198 const char *url;
199 const char *note;
200#endif
201};
202
203extern const struct board_info boards_known[];
204extern const struct board_info laptops_known[];
205#endif
206
207/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000208void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000209void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000210void internal_sleep(unsigned int usecs);
211void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000212
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000213#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000214/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000215int selfcheck_board_enables(void);
Jacob Garber1c091d12019-08-12 11:14:14 -0600216int board_parse_parameter(const char *boardstring, char **vendor, char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000217void w836xx_ext_enter(uint16_t port);
218void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000219void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000220int it8705f_write_enable(uint8_t port);
221uint8_t sio_read(uint16_t port, uint8_t reg);
222void sio_write(uint16_t port, uint8_t reg, uint8_t data);
223void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000224void board_handle_before_superio(void);
225void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000226int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000227
228/* chipset_enable.c */
229int chipset_flash_enable(void);
230
231/* processor_enable.c */
232int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000233#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000234
Thomas Heijligenb3287b42021-12-14 17:25:49 +0100235#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000236/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000237int cb_parse_table(const char **vendor, const char **model);
Nico Huber519be662018-12-23 20:03:35 +0100238int cb_check_image(const uint8_t *bios, unsigned int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000239
240/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000241#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000242extern int has_dmi_support;
243void dmi_init(void);
244int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000245#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000246
247/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000248struct superio {
249 uint16_t vendor;
250 uint16_t port;
251 uint16_t model;
252};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000253extern struct superio superios[];
254extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000255#define SUPERIO_VENDOR_NONE 0x0
256#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000257#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000258#endif
Edward O'Callaghan19ce50d2021-11-13 17:59:18 +1100259
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000260#if CONFIG_INTERNAL == 1
261extern int is_laptop;
Felix Singerd1ab7d22022-08-19 03:03:47 +0200262extern bool laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000263extern int force_boardenable;
264extern int force_boardmismatch;
265void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000266int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000267extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000268#endif
269
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000270/* bitbang_spi.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000271int register_spi_bitbang_master(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000272
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100273
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000274/* flashrom.c */
275struct decode_sizes {
276 uint32_t parallel;
277 uint32_t lpc;
278 uint32_t fwh;
279 uint32_t spi;
280};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000281// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000282extern struct decode_sizes max_rom_decode;
Felix Singer980d6b82022-08-19 02:48:15 +0200283extern bool programmer_may_write;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000284extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000285unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000286char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000287
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000288/* spi.c */
Michael Karcher62797512011-05-11 17:07:02 +0000289#define MAX_DATA_UNSPECIFIED 0
290#define MAX_DATA_READ_UNLIMITED 64 * 1024
291#define MAX_DATA_WRITE_UNLIMITED 256
Nico Huber1cf407b2017-11-10 20:18:23 +0100292
293#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
Nico Huberdc5af542018-12-22 16:54:59 +0100294#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address
295 register, 4BA mode switch) don't work */
Nico Huber1cf407b2017-11-10 20:18:23 +0100296
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000297struct spi_master {
Nico Huber1cf407b2017-11-10 20:18:23 +0100298 uint32_t features;
Stefan Tauner23e10b82016-01-23 16:16:49 +0000299 unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
300 unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000301 int (*command)(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000302 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000303 int (*multicommand)(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000304
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000305 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000306 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000307 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
308 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Anastasia Klimchuk7783f2f2021-07-05 09:18:06 +1000309 int (*shutdown)(void *data);
Edward O'Callaghan13f90e62021-01-06 14:10:52 +1100310 void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000311};
312
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000313int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000314 const unsigned char *writearr, unsigned char *readarr);
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000315int default_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000316int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000317int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
318int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber5e08e3e2021-05-11 17:38:14 +0200319int register_spi_master(const struct spi_master *mst, void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000320
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000321/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000322enum ich_chipset {
323 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000324 CHIPSET_ICH,
325 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000326 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000327 CHIPSET_POULSBO, /* SCH U* */
328 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
329 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000330 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000331 CHIPSET_ICH8,
332 CHIPSET_ICH9,
333 CHIPSET_ICH10,
334 CHIPSET_5_SERIES_IBEX_PEAK,
335 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000336 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000337 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000338 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000339 CHIPSET_8_SERIES_LYNX_POINT_LP,
340 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000341 CHIPSET_9_SERIES_WILDCAT_POINT,
Nico Huber51205912017-03-17 17:59:54 +0100342 CHIPSET_9_SERIES_WILDCAT_POINT_LP,
Nico Huber93c30692017-03-20 14:25:09 +0100343 CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
David Hendricksa5216362017-08-08 20:02:22 -0700344 CHIPSET_C620_SERIES_LEWISBURG,
Thomas Heijligen5ec84b32019-03-19 17:00:03 +0100345 CHIPSET_300_SERIES_CANNON_POINT,
Michał Żygowski5c9f5422021-06-16 15:13:54 +0200346 CHIPSET_500_SERIES_TIGER_POINT,
Nico Huber37509862019-01-18 14:23:02 +0100347 CHIPSET_APOLLO_LAKE,
Angel Pons4db0fdf2020-07-10 17:04:10 +0200348 CHIPSET_GEMINI_LAKE,
Werner Zehe57d4e42022-01-03 09:44:29 +0100349 CHIPSET_ELKHART_LAKE,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000350};
351
Stefan Tauner2abab942012-04-27 20:41:23 +0000352/* ichspi.c */
353#if CONFIG_INTERNAL == 1
Nico Huber560111e2017-04-26 12:27:17 +0200354int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
355int via_init_spi(uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000356
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000357/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000358int amd_imc_shutdown(struct pci_dev *dev);
359
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000360/* it87spi.c */
361void enter_conf_mode_ite(uint16_t port);
362void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000363void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000364int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000365
David Hendricksf9a30552015-05-23 20:30:30 -0700366#if CONFIG_LINUX_MTD == 1
367/* trivial wrapper to avoid cluttering internal_init() with #if */
Thomas Heijligencc853d82021-05-04 15:32:17 +0200368static inline int try_mtd(void) { return programmer_linux_mtd.init(); };
David Hendricksf9a30552015-05-23 20:30:30 -0700369#else
370static inline int try_mtd(void) { return 1; };
371#endif
372
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000373/* mcp6x_spi.c */
374int mcp6x_spi_init(int want_spi);
375
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000376/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000377int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000378
379/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000380int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000381#endif
382
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000383/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000384struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000385 int max_data_read;
386 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000387 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000388 int (*probe) (struct flashctx *flash);
389 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000390 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000391 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Anastasia Klimchuka1fed9f2021-08-03 14:08:02 +1000392 int (*shutdown)(void *data);
Edward O'Callaghan13f90e62021-01-06 14:10:52 +1100393 void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000394};
Anastasia Klimchuk21b20212021-05-13 12:28:47 +1000395int register_opaque_master(const struct opaque_master *mst, void *data);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000396
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000397/* programmer.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000398void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000399void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000400void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
401void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000402void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000403uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
404uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
405void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000406struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000407 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
408 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
409 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000410 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000411 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
412 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
413 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
414 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Anastasia Klimchuke6953e52021-08-26 10:10:32 +1000415 int (*shutdown)(void *data);
Edward O'Callaghan13f90e62021-01-06 14:10:52 +1100416 void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000417};
Anastasia Klimchukb91a2032021-05-21 09:40:58 +1000418int register_par_master(const struct par_master *mst, const enum chipbustype buses, void *data);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000419struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000420 enum chipbustype buses_supported;
421 union {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000422 struct par_master par;
423 struct spi_master spi;
424 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000425 };
426};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000427extern struct registered_master registered_masters[];
428extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000429int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000430
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000431
432/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000433#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000434typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000435#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000436#else
437typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000438#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000439#endif
440
441void sp_flush_incoming(void);
Stefan Tauner72587f82016-01-04 03:05:15 +0000442fdtype sp_openserport(char *dev, int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000443extern fdtype sp_fd;
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600444int serialport_config(fdtype fd, int baud);
David Hendricks8bb20212011-06-14 01:35:36 +0000445int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000446int serialport_write(const unsigned char *buf, unsigned int writecnt);
447int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000448int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000449int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000450
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000451/* Serial port/pin mapping:
452
453 1 CD <-
454 2 RXD <-
455 3 TXD ->
456 4 DTR ->
457 5 GND --
458 6 DSR <-
459 7 RTS ->
460 8 CTS <-
461 9 RI <-
462*/
463enum SP_PIN {
464 PIN_CD = 1,
465 PIN_RXD,
466 PIN_TXD,
467 PIN_DTR,
468 PIN_GND,
469 PIN_DSR,
470 PIN_RTS,
471 PIN_CTS,
472 PIN_RI,
473};
474
475void sp_set_pin(enum SP_PIN pin, int val);
476int sp_get_pin(enum SP_PIN pin);
477
Nico Huber1cf407b2017-11-10 20:18:23 +0100478/* spi_master feature checks */
479static inline bool spi_master_4ba(const struct flashctx *const flash)
480{
481 return flash->mst->buses_supported & BUS_SPI &&
482 flash->mst->spi.features & SPI_MASTER_4BA;
483}
Nico Huberdc5af542018-12-22 16:54:59 +0100484static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash)
485{
486 return flash->mst->buses_supported & BUS_SPI &&
487 flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES;
488}
Nico Huber1cf407b2017-11-10 20:18:23 +0100489
Daniel Thompson1d507a02018-07-12 11:02:28 +0100490/* usbdev.c */
491struct libusb_device_handle;
492struct libusb_context;
493struct libusb_device_handle *usb_dev_get_by_vid_pid_serial(
494 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, const char *serialno);
495struct libusb_device_handle *usb_dev_get_by_vid_pid_number(
496 struct libusb_context *usb_ctx, uint16_t vid, uint16_t pid, unsigned int num);
497
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000498#endif /* !__PROGRAMMER_H__ */