| commit | 4db0fdfdcb59f94e41c0967375c899e2d274e113 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Fri Jul 10 17:04:10 2020 +0200 |
| committer | Nico Huber <nico.h@gmx.de> | Thu Jan 05 16:15:22 2023 +0000 |
| tree | 5866347a6c5e63477f8e05cc32443085319c2df3 | |
| parent | 771bb7952a91722d2d9f100e19b0566f06298126 [diff] [blame] |
Add Gemini Lake support The SPI hardware is pretty much unchanged from Apollo Lake. However, the IFD differs significantly enough to require special handling. Signed-off-by: Angel Pons <th3fanbus@gmail.com> Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77 Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276 Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71354 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/programmer.h b/programmer.h index 8b1de53..1a7b720 100644 --- a/programmer.h +++ b/programmer.h
@@ -645,6 +645,7 @@ CHIPSET_C620_SERIES_LEWISBURG, CHIPSET_300_SERIES_CANNON_POINT, CHIPSET_APOLLO_LAKE, + CHIPSET_GEMINI_LAKE, }; /* ichspi.c */