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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
Stefan Reinauer8fa64812009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
Carl-Daniel Hailfingera0a6ae92009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
Adam Kaufman064b1f22007-02-06 19:47:50 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000013 *
Uwe Hermannd1107642007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000018 *
Uwe Hermannd1107642007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000022 */
23
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000028#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000029#include <stdio.h>
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +000030#include "hwaccess.h"
Patrick Georgie48654c2010-01-06 22:14:39 +000031#ifdef _WIN32
32#include <windows.h>
33#undef min
34#undef max
35#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000036
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000037typedef unsigned long chipaddr;
38
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000039enum programmer {
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000040#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000041 PROGRAMMER_INTERNAL,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000042#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000043#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000044 PROGRAMMER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000045#endif
46#if NIC3COM_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000047 PROGRAMMER_NIC3COM,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000048#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +000049#if GFXNVIDIA_SUPPORT == 1
50 PROGRAMMER_GFXNVIDIA,
51#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000052#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +000053 PROGRAMMER_DRKAISER,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000054#endif
55#if SATASII_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000056 PROGRAMMER_SATASII,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000057#endif
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000058#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000059 PROGRAMMER_IT87SPI,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000060#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000061#if FT2232_SPI_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000062 PROGRAMMER_FT2232SPI,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000063#endif
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000064#if SERPROG_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000065 PROGRAMMER_SERPROG,
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000066#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +000067#if BUSPIRATE_SPI_SUPPORT == 1
68 PROGRAMMER_BUSPIRATESPI,
69#endif
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +000070#if DEDIPROG_SUPPORT == 1
71 PROGRAMMER_DEDIPROG,
72#endif
Carl-Daniel Hailfinger37fc4692009-08-12 14:34:35 +000073 PROGRAMMER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000074};
75
76extern enum programmer programmer;
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000077
78struct programmer_entry {
79 const char *vendor;
80 const char *name;
81
82 int (*init) (void);
83 int (*shutdown) (void);
84
Uwe Hermannd1129ac2009-05-28 15:07:42 +000085 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
86 size_t len);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +000087 void (*unmap_flash_region) (void *virt_addr, size_t len);
88
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000089 void (*chip_writeb) (uint8_t val, chipaddr addr);
90 void (*chip_writew) (uint16_t val, chipaddr addr);
91 void (*chip_writel) (uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000092 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000093 uint8_t (*chip_readb) (const chipaddr addr);
94 uint16_t (*chip_readw) (const chipaddr addr);
95 uint32_t (*chip_readl) (const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000096 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000097 void (*delay) (int usecs);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000098};
99
100extern const struct programmer_entry programmer_table[];
101
Uwe Hermann09e04f72009-05-16 22:36:00 +0000102int programmer_init(void);
103int programmer_shutdown(void);
104void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
105 size_t len);
106void programmer_unmap_flash_region(void *virt_addr, size_t len);
107void chip_writeb(uint8_t val, chipaddr addr);
108void chip_writew(uint16_t val, chipaddr addr);
109void chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000110void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Uwe Hermann09e04f72009-05-16 22:36:00 +0000111uint8_t chip_readb(const chipaddr addr);
112uint16_t chip_readw(const chipaddr addr);
113uint32_t chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000114void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000115void programmer_delay(int usecs);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000116
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000117enum bitbang_spi_master {
118 BITBANG_SPI_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000119};
120
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000121extern const int bitbang_spi_master_count;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000122
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000123extern enum bitbang_spi_master bitbang_spi_master;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000124
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000125struct bitbang_spi_master_entry {
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000126 void (*set_cs) (int val);
127 void (*set_sck) (int val);
128 void (*set_mosi) (int val);
129 int (*get_miso) (void);
130};
131
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000132#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
133
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000134enum chipbustype {
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000135 CHIP_BUSTYPE_NONE = 0,
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000136 CHIP_BUSTYPE_PARALLEL = 1 << 0,
137 CHIP_BUSTYPE_LPC = 1 << 1,
138 CHIP_BUSTYPE_FWH = 1 << 2,
139 CHIP_BUSTYPE_SPI = 1 << 3,
140 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
141 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
142};
143
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000144/*
145 * How many different contiguous runs of erase blocks with one size each do
146 * we have for a given erase function?
147 */
148#define NUM_ERASEREGIONS 5
149
150/*
151 * How many different erase functions do we have per chip?
152 */
153#define NUM_ERASEFUNCTIONS 5
154
Carl-Daniel Hailfinger4bf4e792010-01-09 03:15:50 +0000155#define FEATURE_REGISTERMAP (1 << 0)
156#define FEATURE_BYTEWRITES (1 << 1)
Sean Nelson35727f72010-01-28 23:55:12 +0000157#define FEATURE_LONG_RESET (0 << 4)
158#define FEATURE_SHORT_RESET (1 << 4)
159#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
Carl-Daniel Hailfinger4bf4e792010-01-09 03:15:50 +0000160#define FEATURE_ADDR_FULL (0 << 2)
161#define FEATURE_ADDR_MASK (3 << 2)
Sean Nelson35727f72010-01-28 23:55:12 +0000162#define FEATURE_ADDR_2AA (1 << 2)
163#define FEATURE_ADDR_AAA (2 << 2)
164#define FEATURE_ADDR_SHIFTED 0
Sean Nelsonc57a9202010-01-04 17:15:23 +0000165
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000166struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000167 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000168 const char *name;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000169
170 enum chipbustype bustype;
171
Uwe Hermann394131e2008-10-18 21:14:13 +0000172 /*
173 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000174 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
175 * Identification code.
176 */
177 uint32_t manufacture_id;
178 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000179
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000180 int total_size;
181 int page_size;
Sean Nelsonc57a9202010-01-04 17:15:23 +0000182 int feature_bits;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000183
Uwe Hermann394131e2008-10-18 21:14:13 +0000184 /*
185 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000186 * everything worked correctly.
187 */
188 uint32_t tested;
189
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000190 int (*probe) (struct flashchip *flash);
Maciej Pijankac6e11112009-06-03 14:46:22 +0000191
192 /* Delay after "enter/exit ID mode" commands in microseconds. */
193 int probe_timing;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000194 int (*erase) (struct flashchip *flash);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000195
196 /*
Carl-Daniel Hailfinger63ce4bb2009-12-22 13:04:53 +0000197 * Erase blocks and associated erase function. Any chip erase function
198 * is stored as chip-sized virtual block together with said function.
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000199 */
200 struct block_eraser {
201 struct eraseblock{
202 unsigned int size; /* Eraseblock size */
203 unsigned int count; /* Number of contiguous blocks with that size */
204 } eraseblocks[NUM_ERASEREGIONS];
205 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
206 } block_erasers[NUM_ERASEFUNCTIONS];
207
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000208 int (*write) (struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000209 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000210
Uwe Hermann372eeb52007-12-04 21:49:06 +0000211 /* Some flash devices have an additional register space. */
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000212 chipaddr virtual_memory;
213 chipaddr virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000214};
215
Peter Stuge1159d582008-05-03 04:34:37 +0000216#define TEST_UNTESTED 0
217
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000218#define TEST_OK_PROBE (1 << 0)
219#define TEST_OK_READ (1 << 1)
220#define TEST_OK_ERASE (1 << 2)
221#define TEST_OK_WRITE (1 << 3)
222#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
223#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
Carl-Daniel Hailfingera06287c2009-09-23 22:01:33 +0000224#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000225#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000226#define TEST_OK_MASK 0x0f
227
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000228#define TEST_BAD_PROBE (1 << 4)
229#define TEST_BAD_READ (1 << 5)
230#define TEST_BAD_ERASE (1 << 6)
231#define TEST_BAD_WRITE (1 << 7)
232#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000233#define TEST_BAD_MASK 0xf0
234
Maciej Pijankac6e11112009-06-03 14:46:22 +0000235/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
236 * field and zero delay.
237 *
238 * SPI devices will always have zero delay and ignore this field.
239 */
240#define TIMING_FIXME -1
241/* this is intentionally same value as fixme */
242#define TIMING_IGNORED -1
243#define TIMING_ZERO -2
244
Ollie Lho184a4042005-11-26 21:55:36 +0000245extern struct flashchip flashchips[];
246
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000247#if INTERNAL_SUPPORT == 1
Uwe Hermann05fab752009-05-16 23:42:17 +0000248struct penable {
249 uint16_t vendor_id;
250 uint16_t device_id;
251 int status;
252 const char *vendor_name;
253 const char *device_name;
254 int (*doit) (struct pci_dev *dev, const char *name);
255};
256
257extern const struct penable chipset_enables[];
258
259struct board_pciid_enable {
260 /* Any device, but make it sensible, like the ISA bridge. */
261 uint16_t first_vendor;
262 uint16_t first_device;
263 uint16_t first_card_vendor;
264 uint16_t first_card_device;
265
266 /* Any device, but make it sensible, like
267 * the host bridge. May be NULL.
268 */
269 uint16_t second_vendor;
270 uint16_t second_device;
271 uint16_t second_card_vendor;
272 uint16_t second_card_device;
273
Michael Karcher6701ee82010-01-20 14:14:11 +0000274 /* Pattern to match DMI entries */
275 const char *dmi_pattern;
276
Uwe Hermann05fab752009-05-16 23:42:17 +0000277 /* The vendor / part name from the coreboot table. */
278 const char *lb_vendor;
279 const char *lb_part;
280
281 const char *vendor_name;
282 const char *board_name;
283
Luc Verhaegen93938c32010-01-20 14:45:03 +0000284 int max_rom_decode_parallel;
Uwe Hermann05fab752009-05-16 23:42:17 +0000285 int (*enable) (const char *name);
286};
287
288extern struct board_pciid_enable board_pciid_enables[];
289
290struct board_info {
291 const char *vendor;
292 const char *name;
293};
294
295extern const struct board_info boards_ok[];
296extern const struct board_info boards_bad[];
Uwe Hermanne1aa75e2009-06-18 14:04:44 +0000297extern const struct board_info laptops_ok[];
298extern const struct board_info laptops_bad[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000299#endif
Uwe Hermann05fab752009-05-16 23:42:17 +0000300
Uwe Hermann372eeb52007-12-04 21:49:06 +0000301/* udelay.c */
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000302void myusec_delay(int usecs);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000303void myusec_calibrate_delay(void);
Carl-Daniel Hailfinger36cc1c82009-12-24 03:11:55 +0000304void internal_delay(int usecs);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000305
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000306#if NEED_PCI == 1
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000307/* pcidev.c */
308#define PCI_OK 0
309#define PCI_NT 1 /* Not tested */
Rudolf Marek68720c72009-05-17 19:39:27 +0000310
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000311extern uint32_t io_base_addr;
312extern struct pci_access *pacc;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000313extern struct pci_dev *pcidev_dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000314struct pcidev_status {
315 uint16_t vendor_id;
316 uint16_t device_id;
317 int status;
318 const char *vendor_name;
319 const char *device_name;
320};
TURBO Jb0912c02009-09-02 23:00:46 +0000321uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs);
322uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000323#endif
Uwe Hermannba290d12009-06-17 12:07:12 +0000324
325/* print.c */
326char *flashbuses_to_text(enum chipbustype bustype);
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000327void print_supported(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000328#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1)
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000329void print_supported_pcidevs(struct pcidev_status *devs);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000330#endif
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000331void print_supported_wiki(void);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000332
Uwe Hermann372eeb52007-12-04 21:49:06 +0000333/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000334void w836xx_ext_enter(uint16_t port);
335void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000336uint8_t sio_read(uint16_t port, uint8_t reg);
337void sio_write(uint16_t port, uint8_t reg, uint8_t data);
338void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000339int board_flash_enable(const char *vendor, const char *part);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000340
Uwe Hermann372eeb52007-12-04 21:49:06 +0000341/* chipset_enable.c */
342int chipset_flash_enable(void);
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000343
Stefan Reinauer0593f212009-01-26 01:10:48 +0000344/* physmap.c */
345void *physmap(const char *descr, unsigned long phys_addr, size_t len);
346void physunmap(void *virt_addr, size_t len);
Stefan Reinauer8fa64812009-08-12 09:27:45 +0000347int setup_cpu_msr(int cpu);
348void cleanup_cpu_msr(void);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000349
350/* cbtable.c */
351void lb_vendor_dev_from_string(char *boardstring);
352int coreboot_init(void);
353extern char *lb_part, *lb_vendor;
354extern int partvendor_from_cbtable;
Stefan Reinauer0593f212009-01-26 01:10:48 +0000355
Michael Karcher6701ee82010-01-20 14:14:11 +0000356/* dmi.c */
357extern int has_dmi_support;
358void dmi_init(void);
359int dmi_match(const char *pattern);
360
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000361/* internal.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000362#if NEED_PCI == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000363struct superio {
364 uint16_t vendor;
365 uint16_t port;
366 uint16_t model;
367};
368extern struct superio superio;
369#define SUPERIO_VENDOR_NONE 0x0
370#define SUPERIO_VENDOR_ITE 0x1
Uwe Hermann2cac6862009-05-16 22:05:42 +0000371struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Carl-Daniel Hailfinger9f46cfc2009-11-15 17:13:29 +0000372struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
Uwe Hermann2cac6862009-05-16 22:05:42 +0000373struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
374struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
375 uint16_t card_vendor, uint16_t card_device);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000376#endif
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000377void get_io_perms(void);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +0000378void release_io_perms(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000379#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000380void probe_superio(void);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000381int internal_init(void);
382int internal_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000383void internal_chip_writeb(uint8_t val, chipaddr addr);
384void internal_chip_writew(uint16_t val, chipaddr addr);
385void internal_chip_writel(uint32_t val, chipaddr addr);
386uint8_t internal_chip_readb(const chipaddr addr);
387uint16_t internal_chip_readw(const chipaddr addr);
388uint32_t internal_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000389void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000390#endif
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000391void mmio_writeb(uint8_t val, void *addr);
392void mmio_writew(uint16_t val, void *addr);
393void mmio_writel(uint32_t val, void *addr);
394uint8_t mmio_readb(void *addr);
395uint16_t mmio_readw(void *addr);
396uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingercc1802d2010-01-06 10:21:00 +0000397
398/* programmer.c */
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000399int noop_shutdown(void);
Uwe Hermannc6915932009-05-17 23:12:17 +0000400void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
401void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000402uint8_t noop_chip_readb(const chipaddr addr);
403void noop_chip_writeb(uint8_t val, chipaddr addr);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000404void fallback_chip_writew(uint16_t val, chipaddr addr);
405void fallback_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000406void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000407uint16_t fallback_chip_readw(const chipaddr addr);
408uint32_t fallback_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000409void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000410
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000411/* dummyflasher.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000412#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000413int dummy_init(void);
414int dummy_shutdown(void);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000415void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
416void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000417void dummy_chip_writeb(uint8_t val, chipaddr addr);
418void dummy_chip_writew(uint16_t val, chipaddr addr);
419void dummy_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000420void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000421uint8_t dummy_chip_readb(const chipaddr addr);
422uint16_t dummy_chip_readw(const chipaddr addr);
423uint32_t dummy_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000424void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000425int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000426 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000427#endif
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000428
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000429/* nic3com.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000430#if NIC3COM_SUPPORT == 1
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000431int nic3com_init(void);
432int nic3com_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000433void nic3com_chip_writeb(uint8_t val, chipaddr addr);
434uint8_t nic3com_chip_readb(const chipaddr addr);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000435extern struct pcidev_status nics_3com[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000436#endif
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000437
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000438/* gfxnvidia.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000439#if GFXNVIDIA_SUPPORT == 1
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000440int gfxnvidia_init(void);
441int gfxnvidia_shutdown(void);
442void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
443uint8_t gfxnvidia_chip_readb(const chipaddr addr);
444extern struct pcidev_status gfx_nvidia[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000445#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000446
TURBO Jb0912c02009-09-02 23:00:46 +0000447/* drkaiser.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000448#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +0000449int drkaiser_init(void);
450int drkaiser_shutdown(void);
451void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
452uint8_t drkaiser_chip_readb(const chipaddr addr);
453extern struct pcidev_status drkaiser_pcidev[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000454#endif
TURBO Jb0912c02009-09-02 23:00:46 +0000455
Rudolf Marek68720c72009-05-17 19:39:27 +0000456/* satasii.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000457#if SATASII_SUPPORT == 1
Rudolf Marek68720c72009-05-17 19:39:27 +0000458int satasii_init(void);
459int satasii_shutdown(void);
Rudolf Marek68720c72009-05-17 19:39:27 +0000460void satasii_chip_writeb(uint8_t val, chipaddr addr);
461uint8_t satasii_chip_readb(const chipaddr addr);
462extern struct pcidev_status satas_sii[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000463#endif
Rudolf Marek68720c72009-05-17 19:39:27 +0000464
Paul Fox05dfbe62009-06-16 21:08:06 +0000465/* ft2232_spi.c */
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000466#define FTDI_FT2232H 0x6010
467#define FTDI_FT4232H 0x6011
Paul Fox05dfbe62009-06-16 21:08:06 +0000468int ft2232_spi_init(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000469int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
Paul Fox05dfbe62009-06-16 21:08:06 +0000470int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Paul Fox05dfbe62009-06-16 21:08:06 +0000471int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
472
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000473/* bitbang_spi.c */
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000474extern int bitbang_spi_half_period;
475extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000476int bitbang_spi_init(void);
477int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
478int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
479int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
480
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000481/* buspirate_spi.c */
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000482struct buspirate_spispeeds {
483 const char *name;
484 const int speed;
485};
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000486int buspirate_spi_init(void);
487int buspirate_spi_shutdown(void);
488int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
489int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
490
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000491/* dediprog.c */
492int dediprog_init(void);
493int dediprog_shutdown(void);
494int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
495int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
496
Uwe Hermann0846f892007-08-23 13:34:59 +0000497/* flashrom.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000498extern enum chipbustype buses_supported;
499struct decode_sizes {
500 uint32_t parallel;
501 uint32_t lpc;
502 uint32_t fwh;
503 uint32_t spi;
504};
505extern struct decode_sizes max_rom_decode;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000506extern char *programmer_param;
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000507extern unsigned long flashbase;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000508extern int verbose;
Carl-Daniel Hailfingera80cfbc2009-07-22 20:13:00 +0000509extern const char *flashrom_version;
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000510extern char *chip_to_probe;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000511#define printf_debug(x...) { if (verbose) printf(x); }
Peter Stuge776d2022009-01-26 00:39:57 +0000512void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000513int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000514int erase_flash(struct flashchip *flash);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000515struct flashchip *probe_flash(struct flashchip *first_flash, int force);
516int read_flash(struct flashchip *flash, char *filename);
517void check_chip_supported(struct flashchip *flash);
518int check_max_decode(enum chipbustype buses, uint32_t size);
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +0000519int min(int a, int b);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000520int max(int a, int b);
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000521char *extract_param(char **haystack, char *needle, char *delim);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000522int check_erased_range(struct flashchip *flash, int start, int len);
523int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
Uwe Hermannba290d12009-06-17 12:07:12 +0000524char *strcat_realloc(char *dest, const char *src);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000525void print_version(void);
526int selfcheck(void);
Carl-Daniel Hailfinger552420b2009-12-24 02:15:55 +0000527int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it);
Uwe Hermannba290d12009-06-17 12:07:12 +0000528
529#define OK 0
530#define NT 1 /* Not tested */
Uwe Hermann0846f892007-08-23 13:34:59 +0000531
Sean Nelson51e97d72010-01-07 20:09:33 +0000532/* cli_output.c */
533int print(int type, const char *fmt, ...);
Carl-Daniel Hailfingerf8dda682010-01-09 03:22:31 +0000534#define MSG_ERROR 0
535#define MSG_INFO 1
536#define MSG_DEBUG 2
537#define MSG_BARF 3
538#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
539#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
540#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
541#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
542#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
543#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
544#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
545#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
546#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
547#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
548#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
549#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
Sean Nelson51e97d72010-01-07 20:09:33 +0000550
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000551/* cli_classic.c */
552int cli_classic(int argc, char *argv[]);
553
Uwe Hermann0846f892007-08-23 13:34:59 +0000554/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000555int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000556int read_romlayout(char *name);
557int find_romentry(char *name);
Carl-Daniel Hailfingerf5fb51c2009-08-19 15:19:18 +0000558int handle_romentries(uint8_t *buffer, struct flashchip *flash);
Uwe Hermann0846f892007-08-23 13:34:59 +0000559
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000560/* spi.c */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000561enum spi_controller {
562 SPI_CONTROLLER_NONE,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000563#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000564 SPI_CONTROLLER_ICH7,
565 SPI_CONTROLLER_ICH9,
566 SPI_CONTROLLER_IT87XX,
567 SPI_CONTROLLER_SB600,
568 SPI_CONTROLLER_VIA,
569 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000570#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000571#if FT2232_SPI_SUPPORT == 1
Paul Fox05dfbe62009-06-16 21:08:06 +0000572 SPI_CONTROLLER_FT2232,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000573#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000574#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000575 SPI_CONTROLLER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000576#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000577#if BUSPIRATE_SPI_SUPPORT == 1
578 SPI_CONTROLLER_BUSPIRATE,
579#endif
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000580#if DEDIPROG_SUPPORT == 1
581 SPI_CONTROLLER_DEDIPROG,
582#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000583 SPI_CONTROLLER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000584};
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000585extern const int spi_programmer_count;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000586struct spi_command {
587 unsigned int writecnt;
588 unsigned int readcnt;
589 const unsigned char *writearr;
590 unsigned char *readarr;
591};
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000592struct spi_programmer {
593 int (*command)(unsigned int writecnt, unsigned int readcnt,
594 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000595 int (*multicommand)(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000596
597 /* Optimized functions for this programmer */
598 int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
599 int (*write_256)(struct flashchip *flash, uint8_t *buf);
600};
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000601
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000602extern enum spi_controller spi_controller;
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000603extern const struct spi_programmer spi_programmer[];
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000604extern void *spibar;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000605int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000606 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000607int spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000608int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
609 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000610int default_spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000611uint32_t spi_get_valid_read_addr(void);
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000612
Dominik Geyerb46acba2008-05-16 12:55:55 +0000613/* ichspi.c */
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000614int ich_init_opcodes(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000615int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000616 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000617int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000618int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000619int ich_spi_send_multicommand(struct spi_command *cmds);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000620
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000621/* it87spi.c */
622extern uint16_t it8716f_flashport;
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000623void enter_conf_mode_ite(uint16_t port);
624void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000625struct superio probe_superio_ite(void);
Carl-Daniel Hailfingerb8afecd2009-05-31 18:00:57 +0000626int it87spi_init(void);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000627int it87xx_probe_spi_flash(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000628int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000629 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000630int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000631int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000632
Jason Wanga3f04be2008-11-28 21:36:51 +0000633/* sb600spi.c */
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000634int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +0000635 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000636int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000637int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000638extern uint8_t *sb600_spibar;
Jason Wanga3f04be2008-11-28 21:36:51 +0000639
Peter Stugebf196e92009-01-26 03:08:45 +0000640/* wbsio_spi.c */
641int wbsio_check_for_spi(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000642int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000643 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000644int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000645int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000646
Urja Rannikko22915352009-06-23 11:33:43 +0000647/* serprog.c */
Urja Rannikko22915352009-06-23 11:33:43 +0000648int serprog_init(void);
649int serprog_shutdown(void);
650void serprog_chip_writeb(uint8_t val, chipaddr addr);
651uint8_t serprog_chip_readb(const chipaddr addr);
652void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
653void serprog_delay(int delay);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000654
655/* serial.c */
Patrick Georgie48654c2010-01-06 22:14:39 +0000656#if _WIN32
657typedef HANDLE fdtype;
658#else
659typedef int fdtype;
660#endif
661
Carl-Daniel Hailfingera4a9bfb2009-11-21 11:02:48 +0000662void sp_flush_incoming(void);
Patrick Georgie48654c2010-01-06 22:14:39 +0000663fdtype sp_openserport(char *dev, unsigned int baud);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000664void __attribute__((noreturn)) sp_die(char *msg);
Patrick Georgie48654c2010-01-06 22:14:39 +0000665extern fdtype sp_fd;
Carl-Daniel Hailfingerefa151e2010-01-06 16:09:10 +0000666int serialport_shutdown(void);
667int serialport_write(unsigned char *buf, unsigned int writecnt);
668int serialport_read(unsigned char *buf, unsigned int readcnt);
Uwe Hermann1432a602009-06-28 23:26:37 +0000669
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000670#include "chipdrivers.h"
671
Ollie Lho761bf1b2004-03-20 16:46:10 +0000672#endif /* !__FLASH_H__ */