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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000033/* for iopl and outb under Solaris */
34#if defined (__sun) && (defined(__i386) || defined(__amd64))
35#include <strings.h>
36#include <sys/sysi86.h>
37#include <sys/psw.h>
38#include <asm/sunddi.h>
39#endif
40
Stefan Reinauerf79edb92009-01-26 01:23:31 +000041#if (defined(__MACH__) && defined(__APPLE__))
42#define __DARWIN__
43#endif
44
Patrick Georgi60622e22009-04-28 12:56:04 +000045#if defined(__FreeBSD__) || defined(__DragonFly__)
Andriy Gapon65c1b862008-05-22 13:22:45 +000046 #include <machine/cpufunc.h>
47 #define off64_t off_t
48 #define lseek64 lseek
49 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
50 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
51 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
52 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
53 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
54 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
55#else
Stefan Reinauerf79edb92009-01-26 01:23:31 +000056#if defined(__DARWIN__)
57 #include <DirectIO/darwinio.h>
58 #define off64_t off_t
59 #define lseek64 lseek
60#endif
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000061#if defined (__sun) && (defined(__i386) || defined(__amd64))
62 /* Note different order for outb */
63 #define OUTB(x,y) outb(y, x)
64 #define OUTW(x,y) outw(y, x)
65 #define OUTL(x,y) outl(y, x)
66 #define INB inb
67 #define INW inw
68 #define INL inl
69#else
Andriy Gapon65c1b862008-05-22 13:22:45 +000070 #define OUTB outb
71 #define OUTW outw
72 #define OUTL outl
73 #define INB inb
74 #define INW inw
75 #define INL inl
76#endif
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000077#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000078
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000079extern int programmer;
80#define PROGRAMMER_INTERNAL 0x00
81
82struct programmer_entry {
83 const char *vendor;
84 const char *name;
85
86 int (*init) (void);
87 int (*shutdown) (void);
88
89 void (*chip_writeb) (uint8_t val, volatile void *addr);
90 void (*chip_writew) (uint16_t val, volatile void *addr);
91 void (*chip_writel) (uint32_t val, volatile void *addr);
92 uint8_t (*chip_readb) (const volatile void *addr);
93 uint16_t (*chip_readw) (const volatile void *addr);
94 uint32_t (*chip_readl) (const volatile void *addr);
95};
96
97extern const struct programmer_entry programmer_table[];
98
99static inline int programmer_init(void)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000100{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000101 return programmer_table[programmer].init();
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000102}
103
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000104static inline int programmer_shutdown(void)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000105{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000106 return programmer_table[programmer].shutdown();
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000107}
108
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000109static inline void chip_writeb(uint8_t val, volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000110{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000111 programmer_table[programmer].chip_writeb(val, addr);
112}
113
114static inline void chip_writew(uint16_t val, volatile void *addr)
115{
116 programmer_table[programmer].chip_writew(val, addr);
117}
118
119static inline void chip_writel(uint32_t val, volatile void *addr)
120{
121 programmer_table[programmer].chip_writel(val, addr);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000122}
123
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000124static inline uint8_t chip_readb(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000125{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000126 return programmer_table[programmer].chip_readb(addr);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000127}
128
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000129static inline uint16_t chip_readw(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000130{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000131 return programmer_table[programmer].chip_readw(addr);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000132}
133
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000134static inline uint32_t chip_readl(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000135{
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000136 return programmer_table[programmer].chip_readl(addr);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000137}
138
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000139#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
140
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000141struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000142 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000143 const char *name;
Uwe Hermann394131e2008-10-18 21:14:13 +0000144 /*
145 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000146 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
147 * Identification code.
148 */
149 uint32_t manufacture_id;
150 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000151
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000152 int total_size;
153 int page_size;
154
Uwe Hermann394131e2008-10-18 21:14:13 +0000155 /*
156 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000157 * everything worked correctly.
158 */
159 uint32_t tested;
160
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000161 int (*probe) (struct flashchip *flash);
162 int (*erase) (struct flashchip *flash);
163 int (*write) (struct flashchip *flash, uint8_t *buf);
164 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000165
Uwe Hermann372eeb52007-12-04 21:49:06 +0000166 /* Some flash devices have an additional register space. */
Stefan Reinauerce532972007-05-23 17:20:56 +0000167 volatile uint8_t *virtual_memory;
168 volatile uint8_t *virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000169};
170
Peter Stuge1159d582008-05-03 04:34:37 +0000171#define TEST_UNTESTED 0
172
173#define TEST_OK_PROBE (1<<0)
174#define TEST_OK_READ (1<<1)
175#define TEST_OK_ERASE (1<<2)
176#define TEST_OK_WRITE (1<<3)
Mart Raudsepp1d3b0632008-05-27 23:51:55 +0000177#define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000178#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000179#define TEST_OK_MASK 0x0f
180
181#define TEST_BAD_PROBE (1<<4)
182#define TEST_BAD_READ (1<<5)
183#define TEST_BAD_ERASE (1<<6)
184#define TEST_BAD_WRITE (1<<7)
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000185#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000186#define TEST_BAD_MASK 0xf0
187
Ollie Lho184a4042005-11-26 21:55:36 +0000188extern struct flashchip flashchips[];
189
Uwe Hermann372eeb52007-12-04 21:49:06 +0000190/*
191 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000192 * entry of each section should be the manufacturer ID, followed by the
193 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +0000194 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000195 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
196 * continuation code.
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000197 * SPI parts have 16-bit device IDs if they support RDID.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000198 */
199
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000200#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
201
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000202#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000203
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000204#define AMD_ID 0x01 /* AMD */
Mats Erik Anderssoncbfed282008-10-07 12:21:12 +0000205#define AM_29F002BT 0xB0
206#define AM_29F002BB 0x34
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000207#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +0000208#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000209#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000210
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000211#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000212#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Rudolf Marekdcf46532008-05-22 13:42:23 +0000213#define AMIC_A25L40P 0x2013
Carl-Daniel Hailfinger8b114392008-07-06 23:04:01 +0000214#define AMIC_A29002B 0x0d
215#define AMIC_A29002T 0x8c
216#define AMIC_A29040B 0x86
Jens Kuehnelb9f61742008-06-18 13:36:34 +0000217#define AMIC_A49LF040A 0x9d
Peter Lemenkov539478d2007-10-22 20:36:16 +0000218
Carl-Daniel Hailfingercbdd4f02009-05-06 21:54:22 +0000219/* This chip vendor/device ID is probably a misinterpreted LHA header. */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000220#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000221#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000222
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000223#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000224#define AT_25DF021 0x4300
225#define AT_25DF041A 0x4401
226#define AT_25DF081 0x4502
227#define AT_25DF161 0x4602
228#define AT_25DF321 0x4700 /* also 26DF321 */
229#define AT_25DF321A 0x4701
230#define AT_25DF641 0x4800
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000231#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
232#define AT_25F512B 0x6500
233#define AT_25FS010 0x6601
234#define AT_25FS040 0x6604
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000235#define AT_26DF041 0x4400
236#define AT_26DF081 0x4500 /* guessed, no datasheet available */
237#define AT_26DF081A 0x4501
238#define AT_26DF161 0x4600
239#define AT_26DF161A 0x4601
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000240#define AT_26DF321 0x4700 /* also 25DF321 */
241#define AT_26F004 0x0400
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000242#define AT_29C040A 0xA4
Uwe Hermannd7f48062007-04-28 02:22:59 +0000243#define AT_29C020 0xDA
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000244#define AT_45BR3214B /* No ID available */
245#define AT_45CS1282 0x2920
246#define AT_45D011 /* No ID available */
247#define AT_45D021A /* No ID available */
248#define AT_45D041A /* No ID available */
249#define AT_45D081A /* No ID available */
250#define AT_45D161 /* No ID available */
251#define AT_45DB011 /* No ID available */
252#define AT_45DB011B /* No ID available */
253#define AT_45DB011D 0x2200
254#define AT_45DB021A /* No ID available */
255#define AT_45DB021B /* No ID available */
256#define AT_45DB021D 0x2300
257#define AT_45DB041A /* No ID available */
258#define AT_45DB041D 0x2400
259#define AT_45DB081A /* No ID available */
260#define AT_45DB081D 0x2500
261#define AT_45DB161 /* No ID available */
262#define AT_45DB161B /* No ID available */
263#define AT_45DB161D 0x2600
264#define AT_45DB321 /* No ID available */
265#define AT_45DB321B /* No ID available */
266#define AT_45DB321C 0x2700
267#define AT_45DB321D 0x2701 /* Buggy data sheet */
268#define AT_45DB642 /* No ID available */
269#define AT_45DB642D 0x2800
Frederico Silva4bcf1752007-12-10 16:57:59 +0000270#define AT_49F002N 0x07 /* for AT49F002(N) */
271#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000272
Peter Lemenkov539478d2007-10-22 20:36:16 +0000273#define CATALYST_ID 0x31 /* Catalyst */
274
Uwe Hermann394131e2008-10-18 21:14:13 +0000275#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000276#define EMST_F49B002UA 0x00
277
Uwe Hermann372eeb52007-12-04 21:49:06 +0000278/*
279 * EN25 chips are SPI, first byte of device ID is memory type,
280 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000281 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
282 * is the continuation code for IDs in bank 2.
283 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
284 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
285 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000286 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000287#define EON_ID 0x7F1C /* EON Silicon Devices */
288#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000289#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
290#define EN_25B10 0x2011
291#define EN_25B20 0x2012
292#define EN_25B40 0x2013
293#define EN_25B80 0x2014
294#define EN_25B16 0x2015
295#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000296#define EN_29F512 0x7F21
297#define EN_29F010 0x7F20
298#define EN_29F040A 0x7F04
299#define EN_29LV010 0x7F6E
300#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000301#define EN_29F002T 0x7F92
302#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000303
Peter Lemenkov539478d2007-10-22 20:36:16 +0000304#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000305#define MBM29F400BC 0xAB
306#define MBM29F400TC 0x23
307#define MBM29F004BC 0x7B
308#define MBM29F004TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000309
310#define HYUNDAI_ID 0xAD /* Hyundai */
311
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000312#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
313#define IM_29F004B 0xAE
314#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000315
316#define INTEL_ID 0x89 /* Intel */
317
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000318#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000319
Uwe Hermann372eeb52007-12-04 21:49:06 +0000320/*
321 * MX25 chips are SPI, first byte of device ID is memory type,
322 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000323 * Generalplus SPI chips seem to be compatible with Macronix
324 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000325 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000326#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000327#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
328#define MX_25L1005 0x2011
329#define MX_25L2005 0x2012
330#define MX_25L4005 0x2013 /* MX25L4005{,A} */
331#define MX_25L8005 0x2014
332#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
333#define MX_25L3205 0x2016 /* MX25L3205{,A} */
334#define MX_25L6405 0x2017 /* MX25L3205{,D} */
Stephan Guilloux2f132fe2009-04-21 01:47:16 +0000335#define MX_25L12805 0x2018 /* MX25L12805 */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000336#define MX_25L1635D 0x2415
Stephan Guilloux70ea9a32009-04-23 22:51:56 +0000337#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000338#define MX_29F002B 0x34
339#define MX_29F002T 0xB0
Carl-Daniel Hailfinger7de86392008-12-10 10:32:05 +0000340#define MX_29LV002CB 0x5A
341#define MX_29LV002CT 0x59
342#define MX_29LV004CB 0xB6
343#define MX_29LV004CT 0xB5
344#define MX_29LV008CB 0x37
345#define MX_29LV008CT 0x3E
346#define MX_29F040C 0xA4
347#define MX_29F200CB 0x57
348#define MX_29F200CT 0x51
349#define MX_29F400CB 0xAB
350#define MX_29F400CT 0x23
351#define MX_29LV040C 0x4F
352#define MX_29LV128DB 0x7A
353#define MX_29LV128DT 0x7E
354#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
355#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
356#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
357#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
358#define MX_29LV400CB 0xBA
359#define MX_29LV400CT 0xB9
360#define MX_29LV800CB 0x5B
361#define MX_29LV800CT 0xDA
362#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
363#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
364#define MX_29SL402CB 0xF1
365#define MX_29SL402CT 0x70
366#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
367#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000368
Uwe Hermann394131e2008-10-18 21:14:13 +0000369/*
370 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
371 * have a 0x7F continuation code prefix.
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000372 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000373#define PMC_ID 0x7F9D /* PMC */
374#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
375#define PMC_25LV512 0x7B
376#define PMC_25LV010 0x7C
377#define PMC_25LV020 0x7D
378#define PMC_25LV040 0x7E
379#define PMC_25LV080B 0x13
380#define PMC_25LV016B 0x14
381#define PMC_39LV512 0x1B
382#define PMC_39F010 0x1C /* also Pm39LV010 */
383#define PMC_39LV020 0x3D
384#define PMC_39LV040 0x3E
385#define PMC_39F020 0x4D
386#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000387#define PMC_49FL002 0x6D
388#define PMC_49FL004 0x6E
389
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000390#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000391#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000392
Uwe Hermann372eeb52007-12-04 21:49:06 +0000393/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000394 * Spansion was previously a joint venture of AMD and Fujitsu.
395 * S25 chips are SPI. The first device ID byte is memory type and
396 * the second device ID byte is memory capacity.
397 */
398#define SPANSION_ID 0x01 /* Spansion */
399#define SPANSION_S25FL016A 0x0214
400
401/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000402 * SST25 chips are SPI, first byte of device ID is memory type, second
403 * byte of device ID is related to log(bitsize) at least for some chips.
404 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000405#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000406#define SST_25WF512 0x2501
407#define SST_25WF010 0x2502
408#define SST_25WF020 0x2503
409#define SST_25WF040 0x2504
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000410#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
411#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
412#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
413#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
414#define SST_25VF040B 0x258D
415#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
416#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
417#define SST_25VF080B 0x258E
418#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000419#define SST_25VF016B 0x2541
420#define SST_25VF032B 0x254A
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000421#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
422#define SST_26VF016 0x2601
423#define SST_26VF032 0x2602
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000424#define SST_27SF512 0xA4
425#define SST_27SF010 0xA5
426#define SST_27SF020 0xA6
427#define SST_27VF010 0xA9
428#define SST_27VF020 0xAA
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000429#define SST_28SF040 0x04
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000430#define SST_29EE512 0x5D
431#define SST_29EE010 0x07
432#define SST_29LE010 0x08 /* also SST29VE010 */
433#define SST_29EE020A 0x10
434#define SST_29LE020 0x12 /* also SST29VE020 */
435#define SST_29SF020 0x24
436#define SST_29VF020 0x25
437#define SST_29SF040 0x13
438#define SST_29VF040 0x14
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000439#define SST_39SF010 0xB5
440#define SST_39SF020 0xB6
441#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000442#define SST_39VF512 0xD4
443#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000444#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000445#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000446#define SST_49LF040B 0x50
447#define SST_49LF040 0x51
Sven Schnellec208dfb2009-01-07 12:35:09 +0000448#define SST_49LF020 0x61
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000449#define SST_49LF020A 0x52
450#define SST_49LF080A 0x5B
451#define SST_49LF002A 0x57
452#define SST_49LF003A 0x1B
453#define SST_49LF004A 0x60
454#define SST_49LF008A 0x5A
455#define SST_49LF004C 0x54
456#define SST_49LF008C 0x59
457#define SST_49LF016C 0x5C
458#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000459
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000460/*
461 * ST25P chips are SPI, first byte of device ID is memory type, second
462 * byte of device ID is related to log(bitsize) at least for some chips.
463 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000464#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000465#define ST_M25P05A 0x2010
466#define ST_M25P10A 0x2011
467#define ST_M25P20 0x2012
468#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000469#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000470#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000471#define ST_M25P16 0x2015
472#define ST_M25P32 0x2016
473#define ST_M25P64 0x2017
474#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000475#define ST_M50FLW040A 0x08
476#define ST_M50FLW040B 0x28
477#define ST_M50FLW080A 0x80
478#define ST_M50FLW080B 0x81
Carl-Daniel Hailfinger96e1b552008-11-02 14:25:11 +0000479#define ST_M50FW002 0x29
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000480#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000481#define ST_M50FW080 0x2D
482#define ST_M50FW016 0x2E
483#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000484#define ST_M29F002B 0x34
485#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000486#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000487#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000488#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000489#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000490
Peter Lemenkov539478d2007-10-22 20:36:16 +0000491#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000492#define S29C51001T 0x01
493#define S29C51002T 0x02
494#define S29C51004T 0x03
495#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000496
Peter Lemenkov539478d2007-10-22 20:36:16 +0000497#define TI_ID 0x97 /* Texas Instruments */
498
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000499/*
500 * W25X chips are SPI, first byte of device ID is memory type, second
501 * byte of device ID is related to log(bitsize).
502 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000503#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000504#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
505#define W_25X10 0x3011
506#define W_25X20 0x3012
507#define W_25X40 0x3013
508#define W_25X80 0x3014
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000509#define W_25X16 0x3015
510#define W_25X32 0x3016
511#define W_25X64 0x3017
Peter Lemenkov539478d2007-10-22 20:36:16 +0000512#define W_29C011 0xC1
513#define W_29C020C 0x45
514#define W_29C040P 0x46
515#define W_29EE011 0xC1
516#define W_39V040FA 0x34
517#define W_39V040A 0x3D
518#define W_39V040B 0x54
519#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000520#define W_39V080FA 0xD3
521#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000522#define W_49F002U 0x0B
523#define W_49V002A 0xB0
524#define W_49V002FA 0x32
525
Uwe Hermann372eeb52007-12-04 21:49:06 +0000526/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000527void myusec_delay(int time);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000528void myusec_calibrate_delay(void);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000529
Uwe Hermann372eeb52007-12-04 21:49:06 +0000530/* PCI handling for board/chipset_enable */
531struct pci_access *pacc;
Stefan Reinauer70385642007-04-06 11:58:03 +0000532struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000533struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
534 uint16_t card_vendor, uint16_t card_device);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000535
Uwe Hermann372eeb52007-12-04 21:49:06 +0000536/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000537void w836xx_ext_enter(uint16_t port);
538void w836xx_ext_leave(uint16_t port);
539unsigned char wbsio_read(uint16_t index, uint8_t reg);
540void wbsio_write(uint16_t index, uint8_t reg, uint8_t data);
541void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000542int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000543void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000544
Uwe Hermann372eeb52007-12-04 21:49:06 +0000545/* chipset_enable.c */
546int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000547void print_supported_chipsets(void);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000548
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000549extern unsigned long flashbase;
550
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000551typedef enum {
552 BUS_TYPE_LPC,
553 BUS_TYPE_ICH7_SPI,
554 BUS_TYPE_ICH9_SPI,
555 BUS_TYPE_IT87XX_SPI,
Jason Wanga3f04be2008-11-28 21:36:51 +0000556 BUS_TYPE_SB600_SPI,
Peter Stugebf196e92009-01-26 03:08:45 +0000557 BUS_TYPE_VIA_SPI,
558 BUS_TYPE_WBSIO_SPI
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000559} flashbus_t;
560
561extern flashbus_t flashbus;
562extern void *spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000563
Stefan Reinauer0593f212009-01-26 01:10:48 +0000564/* physmap.c */
565void *physmap(const char *descr, unsigned long phys_addr, size_t len);
566void physunmap(void *virt_addr, size_t len);
567
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000568/* internal.c */
569int internal_init(void);
570int internal_shutdown(void);
571void internal_chip_writeb(uint8_t val, volatile void *addr);
572void internal_chip_writew(uint16_t val, volatile void *addr);
573void internal_chip_writel(uint32_t val, volatile void *addr);
574uint8_t internal_chip_readb(const volatile void *addr);
575uint16_t internal_chip_readw(const volatile void *addr);
576uint32_t internal_chip_readl(const volatile void *addr);
577
Uwe Hermann0846f892007-08-23 13:34:59 +0000578/* flashrom.c */
Uwe Hermannad216bf2009-04-24 16:17:41 +0000579extern int verbose;
580#define printf_debug(x...) { if (verbose) printf(x); }
Peter Stuge776d2022009-01-26 00:39:57 +0000581void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfinger03b4e712009-05-08 12:49:03 +0000582int read_memmapped(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000583
584/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000585int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000586int read_romlayout(char *name);
587int find_romentry(char *name);
588int handle_romentries(uint8_t *buffer, uint8_t *content);
589
Uwe Hermannad216bf2009-04-24 16:17:41 +0000590/* cbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000591int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000592extern char *lb_part, *lb_vendor;
593
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000594/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000595int probe_spi_rdid(struct flashchip *flash);
Rudolf Marek48a85e42008-06-30 21:45:17 +0000596int probe_spi_rdid4(struct flashchip *flash);
Carl-Daniel Hailfinger14e50ac2008-11-28 01:25:00 +0000597int probe_spi_rems(struct flashchip *flash);
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000598int probe_spi_res(struct flashchip *flash);
Uwe Hermann394131e2008-10-18 21:14:13 +0000599int spi_command(unsigned int writecnt, unsigned int readcnt,
600 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000601int spi_write_enable(void);
602int spi_write_disable(void);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000603int spi_chip_erase_60(struct flashchip *flash);
Peter Stugefa8c5502008-05-10 23:07:52 +0000604int spi_chip_erase_c7(struct flashchip *flash);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000605int spi_chip_erase_60_c7(struct flashchip *flash);
Stefan Reinauer424ed222008-10-29 22:13:20 +0000606int spi_chip_erase_d8(struct flashchip *flash);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000607int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
608int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
Peter Stugefa8c5502008-05-10 23:07:52 +0000609int spi_chip_write(struct flashchip *flash, uint8_t *buf);
610int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000611uint8_t spi_read_status_register(void);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000612int spi_disable_blockprotect(void);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000613void spi_byte_program(int address, uint8_t byte);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000614int spi_nbyte_read(int address, uint8_t *bytes, int len);
Peter Stugefd9217d2009-01-26 03:37:40 +0000615int spi_aai_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000616
Uwe Hermann0846f892007-08-23 13:34:59 +0000617/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000618int probe_82802ab(struct flashchip *flash);
619int erase_82802ab(struct flashchip *flash);
620int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000621
622/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000623int probe_29f040b(struct flashchip *flash);
624int erase_29f040b(struct flashchip *flash);
625int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000626
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000627/* en29f002a.c */
628int probe_en29f002a(struct flashchip *flash);
629int erase_en29f002a(struct flashchip *flash);
630int write_en29f002a(struct flashchip *flash, uint8_t *buf);
631
Dominik Geyerb46acba2008-05-16 12:55:55 +0000632/* ichspi.c */
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000633int ich_init_opcodes(void);
Uwe Hermann394131e2008-10-18 21:14:13 +0000634int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
635 const unsigned char *writearr, unsigned char *readarr);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000636int ich_spi_read(struct flashchip *flash, uint8_t * buf);
637int ich_spi_write(struct flashchip *flash, uint8_t * buf);
638
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000639/* it87spi.c */
640extern uint16_t it8716f_flashport;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000641int it87xx_probe_spi_flash(const char *name);
Uwe Hermann394131e2008-10-18 21:14:13 +0000642int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
643 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000644int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
645int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000646
Jason Wanga3f04be2008-11-28 21:36:51 +0000647/* sb600spi.c */
648int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
649 const unsigned char *writearr, unsigned char *readarr);
650int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
651int sb600_spi_write(struct flashchip *flash, uint8_t *buf);
652uint8_t sb600_read_status_register(void);
653extern uint8_t volatile *sb600_spibar;
654
Uwe Hermann0846f892007-08-23 13:34:59 +0000655/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000656uint8_t oddparity(uint8_t val);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000657void toggle_ready_jedec(volatile uint8_t *dst);
658void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
659void unprotect_jedec(volatile uint8_t *bios);
660void protect_jedec(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000661int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
662 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000663int probe_jedec(struct flashchip *flash);
664int erase_chip_jedec(struct flashchip *flash);
665int write_jedec(struct flashchip *flash, uint8_t *buf);
666int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
667int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
668int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
669 volatile uint8_t *dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000670
Peter Stugeaf8ffac2009-01-26 06:42:02 +0000671/* m29f002.c */
672int erase_m29f002(struct flashchip *flash);
673int write_m29f002t(struct flashchip *flash, uint8_t *buf);
674int write_m29f002b(struct flashchip *flash, uint8_t *buf);
675
Uwe Hermann0846f892007-08-23 13:34:59 +0000676/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000677int probe_m29f400bt(struct flashchip *flash);
678int erase_m29f400bt(struct flashchip *flash);
679int block_erase_m29f400bt(volatile uint8_t *bios,
Uwe Hermann0846f892007-08-23 13:34:59 +0000680 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000681int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000682int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000683void toggle_ready_m29f400bt(volatile uint8_t *dst);
684void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
685void protect_m29f400bt(volatile uint8_t *bios);
686void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
687 volatile uint8_t *dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000688
689/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000690int probe_29f002(struct flashchip *flash);
691int erase_29f002(struct flashchip *flash);
692int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000693
Nikolay Petukhov4784c472008-05-17 01:08:58 +0000694/* pm49fl00x.c */
695int probe_49fl00x(struct flashchip *flash);
696int erase_49fl00x(struct flashchip *flash);
697int write_49fl00x(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000698
699/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000700int probe_lhf00l04(struct flashchip *flash);
701int erase_lhf00l04(struct flashchip *flash);
702int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
703void toggle_ready_lhf00l04(volatile uint8_t *dst);
704void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
705void protect_lhf00l04(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000706
707/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000708int probe_28sf040(struct flashchip *flash);
709int erase_28sf040(struct flashchip *flash);
710int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000711
712/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000713int probe_39sf020(struct flashchip *flash);
714int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000715
716/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000717int erase_49lf040(struct flashchip *flash);
718int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000719
720/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000721int probe_49lfxxxc(struct flashchip *flash);
722int erase_49lfxxxc(struct flashchip *flash);
723int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000724
725/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000726int probe_sst_fwhub(struct flashchip *flash);
727int erase_sst_fwhub(struct flashchip *flash);
728int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000729
Peter Stugecce26822008-07-21 17:48:40 +0000730/* w39v040c.c */
731int probe_w39v040c(struct flashchip *flash);
732int erase_w39v040c(struct flashchip *flash);
733int write_w39v040c(struct flashchip *flash, uint8_t *buf);
734
Stefan Reinauerac378972008-03-17 22:59:40 +0000735/* w39V080fa.c */
736int probe_winbond_fwhub(struct flashchip *flash);
737int erase_winbond_fwhub(struct flashchip *flash);
738int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
739
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000740/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000741int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000742
Uwe Hermann0846f892007-08-23 13:34:59 +0000743/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000744int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000745
Peter Stugebf196e92009-01-26 03:08:45 +0000746/* wbsio_spi.c */
747int wbsio_check_for_spi(const char *name);
748int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
749int wbsio_spi_read(struct flashchip *flash, uint8_t *buf);
750int wbsio_spi_write(struct flashchip *flash, uint8_t *buf);
751
Claus Gindharta7b35512008-04-28 17:51:09 +0000752/* stm50flw0x0x.c */
753int probe_stm50flw0x0x(struct flashchip *flash);
754int erase_stm50flw0x0x(struct flashchip *flash);
755int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000756
Ollie Lho761bf1b2004-03-20 16:46:10 +0000757#endif /* !__FLASH_H__ */