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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
Stefan Reinauer8fa64812009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
Carl-Daniel Hailfingera0a6ae92009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
Adam Kaufman064b1f22007-02-06 19:47:50 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000013 *
Uwe Hermannd1107642007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000018 *
Uwe Hermannd1107642007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000022 */
23
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000028#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000029#include <stdio.h>
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +000030#include "hwaccess.h"
Patrick Georgie48654c2010-01-06 22:14:39 +000031#ifdef _WIN32
32#include <windows.h>
33#undef min
34#undef max
35#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000036
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000037typedef unsigned long chipaddr;
38
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000039enum programmer {
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000040#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000041 PROGRAMMER_INTERNAL,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000042#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000043#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000044 PROGRAMMER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000045#endif
46#if NIC3COM_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000047 PROGRAMMER_NIC3COM,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000048#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +000049#if GFXNVIDIA_SUPPORT == 1
50 PROGRAMMER_GFXNVIDIA,
51#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000052#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +000053 PROGRAMMER_DRKAISER,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000054#endif
55#if SATASII_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000056 PROGRAMMER_SATASII,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000057#endif
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000058#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000059 PROGRAMMER_IT87SPI,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000060#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000061#if FT2232_SPI_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000062 PROGRAMMER_FT2232SPI,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000063#endif
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000064#if SERPROG_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000065 PROGRAMMER_SERPROG,
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000066#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +000067#if BUSPIRATE_SPI_SUPPORT == 1
68 PROGRAMMER_BUSPIRATESPI,
69#endif
Carl-Daniel Hailfinger37fc4692009-08-12 14:34:35 +000070 PROGRAMMER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000071};
72
73extern enum programmer programmer;
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000074
75struct programmer_entry {
76 const char *vendor;
77 const char *name;
78
79 int (*init) (void);
80 int (*shutdown) (void);
81
Uwe Hermannd1129ac2009-05-28 15:07:42 +000082 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
83 size_t len);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +000084 void (*unmap_flash_region) (void *virt_addr, size_t len);
85
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000086 void (*chip_writeb) (uint8_t val, chipaddr addr);
87 void (*chip_writew) (uint16_t val, chipaddr addr);
88 void (*chip_writel) (uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000089 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000090 uint8_t (*chip_readb) (const chipaddr addr);
91 uint16_t (*chip_readw) (const chipaddr addr);
92 uint32_t (*chip_readl) (const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000093 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000094 void (*delay) (int usecs);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000095};
96
97extern const struct programmer_entry programmer_table[];
98
Uwe Hermann09e04f72009-05-16 22:36:00 +000099int programmer_init(void);
100int programmer_shutdown(void);
101void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
102 size_t len);
103void programmer_unmap_flash_region(void *virt_addr, size_t len);
104void chip_writeb(uint8_t val, chipaddr addr);
105void chip_writew(uint16_t val, chipaddr addr);
106void chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000107void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Uwe Hermann09e04f72009-05-16 22:36:00 +0000108uint8_t chip_readb(const chipaddr addr);
109uint16_t chip_readw(const chipaddr addr);
110uint32_t chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000111void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000112void programmer_delay(int usecs);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000113
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000114enum bitbang_spi_master {
115 BITBANG_SPI_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000116};
117
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000118extern const int bitbang_spi_master_count;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000119
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000120extern enum bitbang_spi_master bitbang_spi_master;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000121
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000122struct bitbang_spi_master_entry {
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000123 void (*set_cs) (int val);
124 void (*set_sck) (int val);
125 void (*set_mosi) (int val);
126 int (*get_miso) (void);
127};
128
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000129#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
130
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000131enum chipbustype {
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000132 CHIP_BUSTYPE_NONE = 0,
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000133 CHIP_BUSTYPE_PARALLEL = 1 << 0,
134 CHIP_BUSTYPE_LPC = 1 << 1,
135 CHIP_BUSTYPE_FWH = 1 << 2,
136 CHIP_BUSTYPE_SPI = 1 << 3,
137 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
138 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
139};
140
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000141/*
142 * How many different contiguous runs of erase blocks with one size each do
143 * we have for a given erase function?
144 */
145#define NUM_ERASEREGIONS 5
146
147/*
148 * How many different erase functions do we have per chip?
149 */
150#define NUM_ERASEFUNCTIONS 5
151
Carl-Daniel Hailfinger4bf4e792010-01-09 03:15:50 +0000152#define FEATURE_REGISTERMAP (1 << 0)
153#define FEATURE_BYTEWRITES (1 << 1)
154#define FEATURE_ADDR_FULL (0 << 2)
155#define FEATURE_ADDR_MASK (3 << 2)
Sean Nelsonc57a9202010-01-04 17:15:23 +0000156
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000157struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000158 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000159 const char *name;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000160
161 enum chipbustype bustype;
162
Uwe Hermann394131e2008-10-18 21:14:13 +0000163 /*
164 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000165 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
166 * Identification code.
167 */
168 uint32_t manufacture_id;
169 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000170
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000171 int total_size;
172 int page_size;
Sean Nelsonc57a9202010-01-04 17:15:23 +0000173 int feature_bits;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000174
Uwe Hermann394131e2008-10-18 21:14:13 +0000175 /*
176 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000177 * everything worked correctly.
178 */
179 uint32_t tested;
180
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000181 int (*probe) (struct flashchip *flash);
Maciej Pijankac6e11112009-06-03 14:46:22 +0000182
183 /* Delay after "enter/exit ID mode" commands in microseconds. */
184 int probe_timing;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000185 int (*erase) (struct flashchip *flash);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000186
187 /*
Carl-Daniel Hailfinger63ce4bb2009-12-22 13:04:53 +0000188 * Erase blocks and associated erase function. Any chip erase function
189 * is stored as chip-sized virtual block together with said function.
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000190 */
191 struct block_eraser {
192 struct eraseblock{
193 unsigned int size; /* Eraseblock size */
194 unsigned int count; /* Number of contiguous blocks with that size */
195 } eraseblocks[NUM_ERASEREGIONS];
196 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
197 } block_erasers[NUM_ERASEFUNCTIONS];
198
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000199 int (*write) (struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000200 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000201
Uwe Hermann372eeb52007-12-04 21:49:06 +0000202 /* Some flash devices have an additional register space. */
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000203 chipaddr virtual_memory;
204 chipaddr virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000205};
206
Peter Stuge1159d582008-05-03 04:34:37 +0000207#define TEST_UNTESTED 0
208
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000209#define TEST_OK_PROBE (1 << 0)
210#define TEST_OK_READ (1 << 1)
211#define TEST_OK_ERASE (1 << 2)
212#define TEST_OK_WRITE (1 << 3)
213#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
214#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
Carl-Daniel Hailfingera06287c2009-09-23 22:01:33 +0000215#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000216#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000217#define TEST_OK_MASK 0x0f
218
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000219#define TEST_BAD_PROBE (1 << 4)
220#define TEST_BAD_READ (1 << 5)
221#define TEST_BAD_ERASE (1 << 6)
222#define TEST_BAD_WRITE (1 << 7)
223#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000224#define TEST_BAD_MASK 0xf0
225
Maciej Pijankac6e11112009-06-03 14:46:22 +0000226/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
227 * field and zero delay.
228 *
229 * SPI devices will always have zero delay and ignore this field.
230 */
231#define TIMING_FIXME -1
232/* this is intentionally same value as fixme */
233#define TIMING_IGNORED -1
234#define TIMING_ZERO -2
235
Ollie Lho184a4042005-11-26 21:55:36 +0000236extern struct flashchip flashchips[];
237
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000238#if INTERNAL_SUPPORT == 1
Uwe Hermann05fab752009-05-16 23:42:17 +0000239struct penable {
240 uint16_t vendor_id;
241 uint16_t device_id;
242 int status;
243 const char *vendor_name;
244 const char *device_name;
245 int (*doit) (struct pci_dev *dev, const char *name);
246};
247
248extern const struct penable chipset_enables[];
249
250struct board_pciid_enable {
251 /* Any device, but make it sensible, like the ISA bridge. */
252 uint16_t first_vendor;
253 uint16_t first_device;
254 uint16_t first_card_vendor;
255 uint16_t first_card_device;
256
257 /* Any device, but make it sensible, like
258 * the host bridge. May be NULL.
259 */
260 uint16_t second_vendor;
261 uint16_t second_device;
262 uint16_t second_card_vendor;
263 uint16_t second_card_device;
264
265 /* The vendor / part name from the coreboot table. */
266 const char *lb_vendor;
267 const char *lb_part;
268
269 const char *vendor_name;
270 const char *board_name;
271
272 int (*enable) (const char *name);
273};
274
275extern struct board_pciid_enable board_pciid_enables[];
276
277struct board_info {
278 const char *vendor;
279 const char *name;
280};
281
282extern const struct board_info boards_ok[];
283extern const struct board_info boards_bad[];
Uwe Hermanne1aa75e2009-06-18 14:04:44 +0000284extern const struct board_info laptops_ok[];
285extern const struct board_info laptops_bad[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000286#endif
Uwe Hermann05fab752009-05-16 23:42:17 +0000287
Uwe Hermann372eeb52007-12-04 21:49:06 +0000288/* udelay.c */
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000289void myusec_delay(int usecs);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000290void myusec_calibrate_delay(void);
Carl-Daniel Hailfinger36cc1c82009-12-24 03:11:55 +0000291void internal_delay(int usecs);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000292
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000293#if NEED_PCI == 1
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000294/* pcidev.c */
295#define PCI_OK 0
296#define PCI_NT 1 /* Not tested */
Rudolf Marek68720c72009-05-17 19:39:27 +0000297
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000298extern uint32_t io_base_addr;
299extern struct pci_access *pacc;
300extern struct pci_filter filter;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000301extern struct pci_dev *pcidev_dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000302struct pcidev_status {
303 uint16_t vendor_id;
304 uint16_t device_id;
305 int status;
306 const char *vendor_name;
307 const char *device_name;
308};
TURBO Jb0912c02009-09-02 23:00:46 +0000309uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs);
310uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000311#endif
Uwe Hermannba290d12009-06-17 12:07:12 +0000312
313/* print.c */
314char *flashbuses_to_text(enum chipbustype bustype);
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000315void print_supported(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000316#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1)
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000317void print_supported_pcidevs(struct pcidev_status *devs);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000318#endif
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000319void print_supported_wiki(void);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000320
Uwe Hermann372eeb52007-12-04 21:49:06 +0000321/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000322void w836xx_ext_enter(uint16_t port);
323void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000324uint8_t sio_read(uint16_t port, uint8_t reg);
325void sio_write(uint16_t port, uint8_t reg, uint8_t data);
326void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000327int board_flash_enable(const char *vendor, const char *part);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000328
Uwe Hermann372eeb52007-12-04 21:49:06 +0000329/* chipset_enable.c */
330int chipset_flash_enable(void);
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000331
Stefan Reinauer0593f212009-01-26 01:10:48 +0000332/* physmap.c */
333void *physmap(const char *descr, unsigned long phys_addr, size_t len);
334void physunmap(void *virt_addr, size_t len);
Stefan Reinauer8fa64812009-08-12 09:27:45 +0000335int setup_cpu_msr(int cpu);
336void cleanup_cpu_msr(void);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000337
338/* cbtable.c */
339void lb_vendor_dev_from_string(char *boardstring);
340int coreboot_init(void);
341extern char *lb_part, *lb_vendor;
342extern int partvendor_from_cbtable;
Stefan Reinauer0593f212009-01-26 01:10:48 +0000343
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000344/* internal.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000345#if NEED_PCI == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000346struct superio {
347 uint16_t vendor;
348 uint16_t port;
349 uint16_t model;
350};
351extern struct superio superio;
352#define SUPERIO_VENDOR_NONE 0x0
353#define SUPERIO_VENDOR_ITE 0x1
Uwe Hermann2cac6862009-05-16 22:05:42 +0000354struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Carl-Daniel Hailfinger9f46cfc2009-11-15 17:13:29 +0000355struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
Uwe Hermann2cac6862009-05-16 22:05:42 +0000356struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
357struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
358 uint16_t card_vendor, uint16_t card_device);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000359#endif
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000360void get_io_perms(void);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +0000361void release_io_perms(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000362#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000363void probe_superio(void);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000364int internal_init(void);
365int internal_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000366void internal_chip_writeb(uint8_t val, chipaddr addr);
367void internal_chip_writew(uint16_t val, chipaddr addr);
368void internal_chip_writel(uint32_t val, chipaddr addr);
369uint8_t internal_chip_readb(const chipaddr addr);
370uint16_t internal_chip_readw(const chipaddr addr);
371uint32_t internal_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000372void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000373#endif
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000374void mmio_writeb(uint8_t val, void *addr);
375void mmio_writew(uint16_t val, void *addr);
376void mmio_writel(uint32_t val, void *addr);
377uint8_t mmio_readb(void *addr);
378uint16_t mmio_readw(void *addr);
379uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingercc1802d2010-01-06 10:21:00 +0000380
381/* programmer.c */
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000382int noop_shutdown(void);
Uwe Hermannc6915932009-05-17 23:12:17 +0000383void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
384void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000385uint8_t noop_chip_readb(const chipaddr addr);
386void noop_chip_writeb(uint8_t val, chipaddr addr);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000387void fallback_chip_writew(uint16_t val, chipaddr addr);
388void fallback_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000389void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000390uint16_t fallback_chip_readw(const chipaddr addr);
391uint32_t fallback_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000392void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000393
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000394/* dummyflasher.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000395#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000396int dummy_init(void);
397int dummy_shutdown(void);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000398void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
399void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000400void dummy_chip_writeb(uint8_t val, chipaddr addr);
401void dummy_chip_writew(uint16_t val, chipaddr addr);
402void dummy_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000403void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000404uint8_t dummy_chip_readb(const chipaddr addr);
405uint16_t dummy_chip_readw(const chipaddr addr);
406uint32_t dummy_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000407void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000408int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000409 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000410#endif
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000411
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000412/* nic3com.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000413#if NIC3COM_SUPPORT == 1
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000414int nic3com_init(void);
415int nic3com_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000416void nic3com_chip_writeb(uint8_t val, chipaddr addr);
417uint8_t nic3com_chip_readb(const chipaddr addr);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000418extern struct pcidev_status nics_3com[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000419#endif
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000420
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000421/* gfxnvidia.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000422#if GFXNVIDIA_SUPPORT == 1
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000423int gfxnvidia_init(void);
424int gfxnvidia_shutdown(void);
425void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
426uint8_t gfxnvidia_chip_readb(const chipaddr addr);
427extern struct pcidev_status gfx_nvidia[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000428#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000429
TURBO Jb0912c02009-09-02 23:00:46 +0000430/* drkaiser.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000431#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +0000432int drkaiser_init(void);
433int drkaiser_shutdown(void);
434void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
435uint8_t drkaiser_chip_readb(const chipaddr addr);
436extern struct pcidev_status drkaiser_pcidev[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000437#endif
TURBO Jb0912c02009-09-02 23:00:46 +0000438
Rudolf Marek68720c72009-05-17 19:39:27 +0000439/* satasii.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000440#if SATASII_SUPPORT == 1
Rudolf Marek68720c72009-05-17 19:39:27 +0000441int satasii_init(void);
442int satasii_shutdown(void);
Rudolf Marek68720c72009-05-17 19:39:27 +0000443void satasii_chip_writeb(uint8_t val, chipaddr addr);
444uint8_t satasii_chip_readb(const chipaddr addr);
445extern struct pcidev_status satas_sii[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000446#endif
Rudolf Marek68720c72009-05-17 19:39:27 +0000447
Paul Fox05dfbe62009-06-16 21:08:06 +0000448/* ft2232_spi.c */
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000449#define FTDI_FT2232H 0x6010
450#define FTDI_FT4232H 0x6011
Paul Fox05dfbe62009-06-16 21:08:06 +0000451int ft2232_spi_init(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000452int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
Paul Fox05dfbe62009-06-16 21:08:06 +0000453int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Paul Fox05dfbe62009-06-16 21:08:06 +0000454int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
455
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000456/* bitbang_spi.c */
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000457extern int bitbang_spi_half_period;
458extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000459int bitbang_spi_init(void);
460int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
461int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
462int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
463
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000464/* buspirate_spi.c */
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000465struct buspirate_spispeeds {
466 const char *name;
467 const int speed;
468};
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000469int buspirate_spi_init(void);
470int buspirate_spi_shutdown(void);
471int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
472int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
473
Uwe Hermann0846f892007-08-23 13:34:59 +0000474/* flashrom.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000475extern enum chipbustype buses_supported;
476struct decode_sizes {
477 uint32_t parallel;
478 uint32_t lpc;
479 uint32_t fwh;
480 uint32_t spi;
481};
482extern struct decode_sizes max_rom_decode;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000483extern char *programmer_param;
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000484extern unsigned long flashbase;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000485extern int verbose;
Carl-Daniel Hailfingera80cfbc2009-07-22 20:13:00 +0000486extern const char *flashrom_version;
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000487extern char *chip_to_probe;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000488#define printf_debug(x...) { if (verbose) printf(x); }
Peter Stuge776d2022009-01-26 00:39:57 +0000489void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000490int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000491int erase_flash(struct flashchip *flash);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000492struct flashchip *probe_flash(struct flashchip *first_flash, int force);
493int read_flash(struct flashchip *flash, char *filename);
494void check_chip_supported(struct flashchip *flash);
495int check_max_decode(enum chipbustype buses, uint32_t size);
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +0000496int min(int a, int b);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000497int max(int a, int b);
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000498char *extract_param(char **haystack, char *needle, char *delim);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000499int check_erased_range(struct flashchip *flash, int start, int len);
500int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
Uwe Hermannba290d12009-06-17 12:07:12 +0000501char *strcat_realloc(char *dest, const char *src);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000502void print_version(void);
503int selfcheck(void);
Carl-Daniel Hailfinger552420b2009-12-24 02:15:55 +0000504int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it);
Uwe Hermannba290d12009-06-17 12:07:12 +0000505
506#define OK 0
507#define NT 1 /* Not tested */
Uwe Hermann0846f892007-08-23 13:34:59 +0000508
Sean Nelson51e97d72010-01-07 20:09:33 +0000509/* cli_output.c */
510int print(int type, const char *fmt, ...);
Carl-Daniel Hailfingerf8dda682010-01-09 03:22:31 +0000511#define MSG_ERROR 0
512#define MSG_INFO 1
513#define MSG_DEBUG 2
514#define MSG_BARF 3
515#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
516#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
517#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
518#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
519#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
520#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
521#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
522#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
523#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
524#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
525#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
526#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
Sean Nelson51e97d72010-01-07 20:09:33 +0000527
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000528/* cli_classic.c */
529int cli_classic(int argc, char *argv[]);
530
Uwe Hermann0846f892007-08-23 13:34:59 +0000531/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000532int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000533int read_romlayout(char *name);
534int find_romentry(char *name);
Carl-Daniel Hailfingerf5fb51c2009-08-19 15:19:18 +0000535int handle_romentries(uint8_t *buffer, struct flashchip *flash);
Uwe Hermann0846f892007-08-23 13:34:59 +0000536
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000537/* spi.c */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000538enum spi_controller {
539 SPI_CONTROLLER_NONE,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000540#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000541 SPI_CONTROLLER_ICH7,
542 SPI_CONTROLLER_ICH9,
543 SPI_CONTROLLER_IT87XX,
544 SPI_CONTROLLER_SB600,
545 SPI_CONTROLLER_VIA,
546 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000547#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000548#if FT2232_SPI_SUPPORT == 1
Paul Fox05dfbe62009-06-16 21:08:06 +0000549 SPI_CONTROLLER_FT2232,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000550#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000551#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000552 SPI_CONTROLLER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000553#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000554#if BUSPIRATE_SPI_SUPPORT == 1
555 SPI_CONTROLLER_BUSPIRATE,
556#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000557 SPI_CONTROLLER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000558};
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000559extern const int spi_programmer_count;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000560struct spi_command {
561 unsigned int writecnt;
562 unsigned int readcnt;
563 const unsigned char *writearr;
564 unsigned char *readarr;
565};
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000566struct spi_programmer {
567 int (*command)(unsigned int writecnt, unsigned int readcnt,
568 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000569 int (*multicommand)(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000570
571 /* Optimized functions for this programmer */
572 int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
573 int (*write_256)(struct flashchip *flash, uint8_t *buf);
574};
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000575
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000576extern enum spi_controller spi_controller;
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000577extern const struct spi_programmer spi_programmer[];
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000578extern void *spibar;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000579int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000580 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000581int spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000582int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
583 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000584int default_spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000585uint32_t spi_get_valid_read_addr(void);
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000586
Dominik Geyerb46acba2008-05-16 12:55:55 +0000587/* ichspi.c */
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000588int ich_init_opcodes(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000589int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000590 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000591int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000592int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000593int ich_spi_send_multicommand(struct spi_command *cmds);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000594
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000595/* it87spi.c */
596extern uint16_t it8716f_flashport;
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000597void enter_conf_mode_ite(uint16_t port);
598void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000599struct superio probe_superio_ite(void);
Carl-Daniel Hailfingerb8afecd2009-05-31 18:00:57 +0000600int it87spi_init(void);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000601int it87xx_probe_spi_flash(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000602int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000603 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000604int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000605int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000606
Jason Wanga3f04be2008-11-28 21:36:51 +0000607/* sb600spi.c */
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000608int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +0000609 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000610int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000611int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000612extern uint8_t *sb600_spibar;
Jason Wanga3f04be2008-11-28 21:36:51 +0000613
Peter Stugebf196e92009-01-26 03:08:45 +0000614/* wbsio_spi.c */
615int wbsio_check_for_spi(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000616int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000617 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000618int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000619int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000620
Urja Rannikko22915352009-06-23 11:33:43 +0000621/* serprog.c */
Urja Rannikko22915352009-06-23 11:33:43 +0000622int serprog_init(void);
623int serprog_shutdown(void);
624void serprog_chip_writeb(uint8_t val, chipaddr addr);
625uint8_t serprog_chip_readb(const chipaddr addr);
626void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
627void serprog_delay(int delay);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000628
629/* serial.c */
Patrick Georgie48654c2010-01-06 22:14:39 +0000630#if _WIN32
631typedef HANDLE fdtype;
632#else
633typedef int fdtype;
634#endif
635
Carl-Daniel Hailfingera4a9bfb2009-11-21 11:02:48 +0000636void sp_flush_incoming(void);
Patrick Georgie48654c2010-01-06 22:14:39 +0000637fdtype sp_openserport(char *dev, unsigned int baud);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000638void __attribute__((noreturn)) sp_die(char *msg);
Patrick Georgie48654c2010-01-06 22:14:39 +0000639extern fdtype sp_fd;
Carl-Daniel Hailfingerefa151e2010-01-06 16:09:10 +0000640int serialport_shutdown(void);
641int serialport_write(unsigned char *buf, unsigned int writecnt);
642int serialport_read(unsigned char *buf, unsigned int readcnt);
Uwe Hermann1432a602009-06-28 23:26:37 +0000643
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000644#include "chipdrivers.h"
645
Ollie Lho761bf1b2004-03-20 16:46:10 +0000646#endif /* !__FLASH_H__ */