Add support for the AMD/ATI SB600 southbridge SPI functionality
This has been tested by Uwe Hermann on an RS690/SB600 board.
Corresponding to flashrom svn r351 and coreboot v2 svn r3779.
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
diff --git a/flash.h b/flash.h
index d1e417f..cbc2e48 100644
--- a/flash.h
+++ b/flash.h
@@ -414,6 +414,7 @@
BUS_TYPE_ICH7_SPI,
BUS_TYPE_ICH9_SPI,
BUS_TYPE_IT87XX_SPI,
+ BUS_TYPE_SB600_SPI,
BUS_TYPE_VIA_SPI
} flashbus_t;
@@ -497,6 +498,14 @@
int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
+/* sb600spi.c */
+int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
+int sb600_spi_write(struct flashchip *flash, uint8_t *buf);
+uint8_t sb600_read_status_register(void);
+extern uint8_t volatile *sb600_spibar;
+
/* jedec.c */
uint8_t oddparity(uint8_t val);
void toggle_ready_jedec(volatile uint8_t *dst);