blob: fd5fc2aa74b112196814a15ce6b49fc19dabdd42 [file] [log] [blame]
Stefan Tauner4c723152016-01-14 22:47:55 +00001.\" Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses.
2.ie \n[.g] \
3. mso www.tmac
Stefan Tauner0be072c2016-03-13 15:16:30 +00004.el \{
5. de MTO
6 \\$2 \(la\\$1 \(ra\\$3 \
Stefan Tauner4c723152016-01-14 22:47:55 +00007. .
Stefan Tauner0be072c2016-03-13 15:16:30 +00008.\}
Stefan Tauner4c723152016-01-14 22:47:55 +00009.\" Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML
10.\" device. To that end we need to distinguish HTML output on groff from other configurations first.
11.nr groffhtml 0
12.if \n[.g] \
13. if "\*[.T]"html" \
14. nr groffhtml 1
15.\" For code reuse it would be nice to have a single wrapper that gets its target macro as parameter.
16.\" However, this did not work out with NetBSD's and OpenBSD's groff...
17.de URLB
18. ie (\n[groffhtml]==1) \{\
19. URL \\$@
20. \}
21. el \{\
22. ie "\\$2"" \{\
23. BR "\\$1" "\\$3"
24. \}
25. el \{\
26. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
27. \}
28. \}
29..
30.de MTOB
31. ie (\n[groffhtml]==1) \{\
32. MTO \\$@
33. \}
34. el \{\
35. ie "\\$2"" \{\
36. BR "\\$1" "\\$3"
37. \}
38. el \{\
39. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
40. \}
41. \}
42..
Richard Hughesdad3a162020-02-17 09:57:01 +000043.TH FLASHROM 8 "@MAN_DATE@" "flashrom-stable-@VERSION@" "@MAN_DATE@"
Stefan Reinauer261144c2006-07-27 23:29:02 +000044.SH NAME
Uwe Hermann530cb2d2009-05-14 22:58:21 +000045flashrom \- detect, read, write, verify and erase flash chips
Stefan Reinauer261144c2006-07-27 23:29:02 +000046.SH SYNOPSIS
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100047.B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|
48 \fB\-p\fR <programmername>[:<parameters>] [\fB\-c\fR <chipname>]
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +100049 (\fB\-\-flash\-name\fR|\fB\-\-flash\-size\fR|
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100050 [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>]
Anastasia Klimchuka7cb7e92022-11-25 18:10:43 +110051 [(\fB\-l\fR <file>|\fB\-\-ifd\fR|\fB\-\-fmap\fR|\fB\-\-fmap-file\fR <file>)
52 [\fB\-i\fR <include>]...]
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100053 [\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])]
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +000054 [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
Stefan Reinauer261144c2006-07-27 23:29:02 +000055.SH DESCRIPTION
56.B flashrom
Uwe Hermanne8ba5382009-05-22 11:37:27 +000057is a utility for detecting, reading, writing, verifying and erasing flash
Uwe Hermann530cb2d2009-05-14 22:58:21 +000058chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
Uwe Hermann941a2732011-07-25 21:12:57 +000059using a supported mainboard. However, it also supports various external
60PCI/USB/parallel-port/serial-port based devices which can program flash chips,
61including some network cards (NICs), SATA/IDE controller cards, graphics cards,
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +000062the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
Uwe Hermanne74b9f82009-04-10 14:41:29 +000063.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000064It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
Uwe Hermann941a2732011-07-25 21:12:57 +000065TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
66parallel flash, or SPI.
Stefan Reinauer261144c2006-07-27 23:29:02 +000067.SH OPTIONS
Uwe Hermann9ff514d2010-06-07 19:41:25 +000068You can specify one of
69.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
70or no operation.
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000071If no operation is specified, flashrom will only probe for flash chips. It is
Michael Karcher31fd8252010-03-12 06:41:39 +000072recommended that if you try flashrom the first time on a system, you run it
Uwe Hermann941a2732011-07-25 21:12:57 +000073in probe-only mode and check the output. Also you are advised to make a
Uwe Hermann9ff514d2010-06-07 19:41:25 +000074backup of your current ROM contents with
75.B \-r
Stefan Taunere34e3e82013-01-01 00:06:51 +000076before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the
77.B -p/--programmer
78option to be used (please see below).
Stefan Reinauerde063bf2006-09-21 13:09:22 +000079.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000080.B "\-r, \-\-read <file>"
81Read flash ROM contents and save them into the given
82.BR <file> .
Uwe Hermann941a2732011-07-25 21:12:57 +000083If the file already exists, it will be overwritten.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000084.TP
Daniel Campellod12b6bc2022-03-14 11:43:16 -060085.B "\-w, \-\-write (<file>|-)"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000086Write
87.B <file>
Daniel Campellod12b6bc2022-03-14 11:43:16 -060088into flash ROM. If
89.B -
90is provided instead, contents will be read from stdin. This will first automatically
Uwe Hermann9ff514d2010-06-07 19:41:25 +000091.B erase
92the chip, then write to it.
Stefan Taunerac54fbe2011-07-21 19:52:00 +000093.sp
94In the process the chip is also read several times. First an in-memory backup
95is made for disaster recovery and to be able to skip regions that are
96already equal to the image file. This copy is updated along with the write
97operation. In case of erase errors it is even re-read completely. After
98writing has finished and if verification is enabled, the whole flash chip is
99read out and compared with the input image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000100.TP
Uwe Hermannea07f622009-06-24 17:31:08 +0000101.B "\-n, \-\-noverify"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000102Skip the automatic verification of flash ROM contents after writing. Using this
Uwe Hermannea07f622009-06-24 17:31:08 +0000103option is
104.B not
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000105recommended, you should only use it if you know what you are doing and if you
Uwe Hermannea07f622009-06-24 17:31:08 +0000106feel that the time for verification takes too long.
107.sp
108Typical usage is:
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000109.B "flashrom \-p prog \-n \-w <file>"
Uwe Hermannea07f622009-06-24 17:31:08 +0000110.sp
111This option is only useful in combination with
112.BR \-\-write .
113.TP
Nico Huber99d15952016-05-02 16:54:24 +0200114.B "\-N, \-\-noverify-all"
115Skip not included regions during automatic verification after writing (cf.
116.BR "\-l " "and " "\-i" ).
117You should only use this option if you are sure that communication with
118the flash chip is reliable (e.g. when using the
119.BR internal
120programmer). Even if flashrom is instructed not to touch parts of the
121flash chip, their contents could be damaged (e.g. due to misunderstood
122erase commands).
123.sp
124This option is required to flash an Intel system with locked ME flash
125region using the
126.BR internal
127programmer. It may be enabled by default in this case in the future.
128.TP
Daniel Campellod12b6bc2022-03-14 11:43:16 -0600129.B "\-v, \-\-verify (<file>|-)"
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000130Verify the flash ROM contents against the given
131.BR <file> .
Daniel Campellod12b6bc2022-03-14 11:43:16 -0600132If
133.BR -
134is provided instead, contents will be read from stdin.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000135.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000136.B "\-E, \-\-erase"
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000137Erase the flash ROM chip.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000138.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000139.B "\-V, \-\-verbose"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000140More verbose output. This option can be supplied multiple times
Stefan Taunereebeb532011-08-04 17:40:25 +0000141(max. 3 times, i.e.
142.BR \-VVV )
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000143for even more debug output.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000144.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000145.B "\-c, \-\-chip" <chipname>
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000146Probe only for the specified flash ROM chip. This option takes the chip name as
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000147printed by
148.B "flashrom \-L"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000149without the vendor name as parameter. Please note that the chip name is
150case sensitive.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000151.TP
Joerg Mayer645c6df2010-03-13 14:47:48 +0000152.B "\-f, \-\-force"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000153Force one or more of the following actions:
Joerg Mayer645c6df2010-03-13 14:47:48 +0000154.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000155* Force chip read and pretend the chip is there.
156.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000157* Force chip access even if the chip is bigger than the maximum supported \
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000158size for the flash bus.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000159.sp
160* Force erase even if erase is known bad.
161.sp
162* Force write even if write is known bad.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000163.TP
164.B "\-l, \-\-layout <file>"
165Read ROM layout from
166.BR <file> .
Uwe Hermann87c07932009-05-05 16:15:46 +0000167.sp
168flashrom supports ROM layouts. This allows you to flash certain parts of
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000169the flash chip only. A ROM layout file contains multiple lines with the
170following syntax:
171.sp
172.B " startaddr:endaddr imagename"
173.sp
174.BR "startaddr " "and " "endaddr "
175are hexadecimal addresses within the ROM file and do not refer to any
176physical address. Please note that using a 0x prefix for those hexadecimal
177numbers is not necessary, but you can't specify decimal/octal numbers.
178.BR "imagename " "is an arbitrary name for the region/image from"
179.BR " startaddr " "to " "endaddr " "(both addresses included)."
180.sp
181Example:
Uwe Hermann87c07932009-05-05 16:15:46 +0000182.sp
183 00000000:00008fff gfxrom
184 00009000:0003ffff normal
185 00040000:0007ffff fallback
186.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000187If you only want to update the image named
188.BR "normal " "in a ROM based on the layout above, run"
Uwe Hermann87c07932009-05-05 16:15:46 +0000189.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000190.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000191.sp
Stefan Taunere34e3e82013-01-01 00:06:51 +0000192To update only the images named
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000193.BR "normal " "and " "fallback" ", run:"
Uwe Hermann87c07932009-05-05 16:15:46 +0000194.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000195.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000196.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000197Overlapping sections are not supported.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000198.TP
Arthur Heymansc82900b2018-01-10 12:48:16 +0100199.B "\-\-fmap"
200Read layout from fmap in flash chip.
201.sp
202flashrom supports the fmap binary format which is commonly used by coreboot
203for partitioning a flash chip. The on-chip fmap will be read and used to generate
204the layout.
205.sp
206If you only want to update the
207.BR "COREBOOT"
208region defined in the fmap, run
209.sp
210.B " flashrom -p prog \-\-fmap \-\-image COREBOOT \-w some.rom"
211.TP
212.B "\-\-fmap-file <file>"
213Read layout from a
214.BR <file>
215containing binary fmap (e.g. coreboot roms).
216.sp
217flashrom supports the fmap binary format which is commonly used by coreboot
218for partitioning a flash chip. The fmap in the specified file will be read and
219used to generate the layout.
220.sp
221If you only want to update the
222.BR "COREBOOT"
223region defined in the binary fmap file, run
224.sp
225.B " flashrom \-p prog \-\-fmap-file some.rom \-\-image COREBOOT \-w some.rom"
226.TP
Nico Huber305f4172013-06-14 11:55:26 +0200227.B "\-\-ifd"
228Read ROM layout from Intel Firmware Descriptor.
229.sp
230flashrom supports ROM layouts given by an Intel Firmware Descriptor
231(IFD). The on-chip descriptor will be read and used to generate the
232layout. If you need to change the layout, you have to update the IFD
233only first.
234.sp
235The following ROM images may be present in an IFD:
236.sp
237 fd the IFD itself
238 bios the host firmware aka. BIOS
239 me Intel Management Engine firmware
240 gbe gigabit ethernet firmware
241 pd platform specific data
242.TP
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000243.B "\-i, \-\-image <imagename>"
244Only flash region/image
245.B <imagename>
Uwe Hermann67808fe2007-10-18 00:29:05 +0000246from flash layout.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000247.TP
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +1000248.B "\-\-flash\-name"
249Prints out the detected flash chips name.
250.TP
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +1000251.B "\-\-flash\-size"
252Prints out the detected flash chips size.
253.TP
Michael Niewöhner96cc5d32021-09-21 17:37:32 +0200254.B "\-\-flash\-contents <ref\-file>"
255The file contents of
256.BR <ref\-file>
257will be used to decide which parts of the flash need to be written. Providing
258this saves an initial read of the full flash chip. Be careful, if the provided
259data doesn't actually match the flash contents, results are undefined.
260.TP
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000261.B "\-L, \-\-list\-supported"
Uwe Hermann941a2732011-07-25 21:12:57 +0000262List the flash chips, chipsets, mainboards, and external programmers
263(including PCI, USB, parallel port, and serial port based devices)
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000264supported by flashrom.
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000265.sp
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000266There are many unlisted boards which will work out of the box, without
267special support in flashrom. Please let us know if you can verify that
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000268other boards work or do not work out of the box.
269.sp
270.B IMPORTANT:
271For verification you have
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000272to test an ERASE and/or WRITE operation, so make sure you only do that
273if you have proper means to recover from failure!
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000274.TP
Uwe Hermann20a293f2009-06-19 10:42:43 +0000275.B "\-z, \-\-list\-supported-wiki"
276Same as
277.BR \-\-list\-supported ,
278but outputs the supported hardware in MediaWiki syntax, so that it can be
Stefan Tauner4c723152016-01-14 22:47:55 +0000279easily pasted into the
280.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" .
Uwe Hermann941a2732011-07-25 21:12:57 +0000281Please note that MediaWiki output is not compiled in by default.
Uwe Hermann20a293f2009-06-19 10:42:43 +0000282.TP
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000283.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000284Specify the programmer device. This is mandatory for all operations
285involving any chip access (probe/read/write/...). Currently supported are:
Carl-Daniel Hailfingerce986772009-05-09 00:27:07 +0000286.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000287.BR "* internal" " (for in-system flashing in the mainboard)"
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000288.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000289.BR "* dummy" " (virtual programmer for testing flashrom)"
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000290.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000291.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
292.sp
Sergey Lichack98f47102012-08-27 01:24:15 +0000293.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)"
Uwe Hermann829ed842010-05-24 17:39:14 +0000294.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000295.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
296cards)"
297.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000298.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000299.sp
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000300.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
301.sp
TURBO Jb0912c02009-09-02 23:00:46 +0000302.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
303.sp
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000304.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
305.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000306.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
307.sp
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000308.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
309.sp
Stefan Tauner4f094752014-06-01 22:36:30 +0000310.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)"
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000311.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000312.BR "* atapromise" " (for flash ROMs on Promise PDC2026x ATA/RAID controllers)"
313.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000314.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)"
315.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000316.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).
Paul Fox05dfbe62009-06-16 21:08:06 +0000317.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000318.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog, \
Stefan Tauner0be072c2016-03-13 15:16:30 +0000319including some Arduino-based devices)."
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000320.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000321.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000322.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000323.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
324.sp
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000325.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000326.sp
Michael Karchere5449392012-05-05 20:53:59 +0000327.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
328bitbanging adapter)
329.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000330.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
Idwer Vollering004f4b72010-09-03 18:21:21 +0000331.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000332.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
Mark Marshall90021f22010-12-03 14:48:11 +0000333.sp
Steve Markgraf61899472023-01-09 23:06:52 +0100334.BR "* linux_gpio_spi" " (for SPI flash ROMs attached to a GPIO chip device accessible via /dev/gpiochipX on Linux)"
335.sp
David Hendricksf9a30552015-05-23 20:30:30 -0700336.BR "* linux_mtd" " (for SPI flash ROMs accessible via /dev/mtdX on Linux)"
337.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000338.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
339.sp
James Lairdc60de0e2013-03-27 13:00:23 +0000340.BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)"
341.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000342.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
343.sp
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000344.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
345.sp
Justin Chevrier66e554b2015-02-08 21:58:10 +0000346.BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)"
347.sp
Urja Rannikko0870b022016-01-31 22:10:29 +0000348.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)"
349.sp
Nicholas Chin197b7c72022-10-23 13:10:31 -0600350.BR "* ch347_spi" " (for SPI flash ROMs attached to WCH CH347)"
351.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100352.BR "* digilent_spi" " (for SPI flash ROMs attached to iCEblink40 development boards)"
353.sp
Marc Schink3578ec62016-03-17 16:23:03 +0100354.BR "* jlink_spi" " (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)"
355.sp
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100356.BR "* ni845x_spi" " (for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452)"
357.sp
Miklós Márton324929c2019-08-01 19:14:10 +0200358.BR "* stlinkv3_spi" " (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)"
359.sp
Jean THOMASe28d8e42022-10-11 17:54:30 +0200360.BR "* dirtyjtag_spi" " (for SPI flash ROMs attached to DirtyJTAG-compatible devices)"
361.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000362Some programmers have optional or mandatory parameters which are described
363in detail in the
Stefan Tauner6697f712014-08-06 15:09:15 +0000364.B PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000365section. Support for some programmers can be disabled at compile time.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000366.B "flashrom \-h"
Michael Karchere5eafb22010-03-07 12:11:08 +0000367lists all supported programmers.
368.TP
369.B "\-h, \-\-help"
370Show a help text and exit.
371.TP
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000372.B "\-o, \-\-output <logfile>"
373Save the full debug log to
374.BR <logfile> .
375If the file already exists, it will be overwritten. This is the recommended
376way to gather logs from flashrom because they will be verbose even if the
Stefan Tauner6697f712014-08-06 15:09:15 +0000377on-screen messages are not verbose and don't require output redirection.
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000378.TP
Michael Karchere5eafb22010-03-07 12:11:08 +0000379.B "\-R, \-\-version"
380Show version information and exit.
Stefan Tauner6697f712014-08-06 15:09:15 +0000381.SH PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000382Some programmer drivers accept further parameters to set programmer-specific
Uwe Hermann4e3d0b32010-03-25 23:18:41 +0000383parameters. These parameters are separated from the programmer name by a
Michael Karchere5eafb22010-03-07 12:11:08 +0000384colon. While some programmers take arguments at fixed positions, other
385programmers use a key/value interface in which the key and value is separated
386by an equal sign and different pairs are separated by a comma or a colon.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000387.SS
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000388.BR "internal " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000389.TP
390.B Board Enables
391.sp
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000392Some mainboards require to run mainboard specific code to enable flash erase
393and write support (and probe support on old systems with parallel flash).
394The mainboard brand and model (if it requires specific code) is usually
395autodetected using one of the following mechanisms: If your system is
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000396running coreboot, the mainboard type is determined from the coreboot table.
397Otherwise, the mainboard is detected by examining the onboard PCI devices
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000398and possibly DMI info. If PCI and DMI do not contain information to uniquely
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000399identify the mainboard (which is the exception), or if you want to override
400the detected mainboard model, you can specify the mainboard using the
401.sp
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000402.B " flashrom \-p internal:mainboard=<vendor>:<board>"
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000403syntax.
404.sp
405See the 'Known boards' or 'Known laptops' section in the output
406of 'flashrom \-L' for a list of boards which require the specification of
407the board name, if no coreboot table is found.
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000408.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000409Some of these board-specific flash enabling functions (called
410.BR "board enables" )
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000411in flashrom have not yet been tested. If your mainboard is detected needing
412an untested board enable function, a warning message is printed and the
413board enable is not executed, because a wrong board enable function might
414cause the system to behave erratically, as board enable functions touch the
415low-level internals of a mainboard. Not executing a board enable function
416(if one is needed) might cause detection or erasing failure. If your board
417protects only part of the flash (commonly the top end, called boot block),
418flashrom might encounter an error only after erasing the unprotected part,
419so running without the board-enable function might be dangerous for erase
420and write (which includes erase).
421.sp
422The suggested procedure for a mainboard with untested board specific code is
423to first try to probe the ROM (just invoke flashrom and check that it
424detects your flash chip type) without running the board enable code (i.e.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000425without any parameters). If it finds your chip, fine. Otherwise, retry
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000426probing your chip with the board-enable code running, using
427.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000428.B " flashrom \-p internal:boardenable=force"
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000429.sp
430If your chip is still not detected, the board enable code seems to be broken
431or the flash chip unsupported. Otherwise, make a backup of your current ROM
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000432contents (using
433.BR \-r )
434and store it to a medium outside of your computer, like
435a USB drive or a network share. If you needed to run the board enable code
Stefan Taunereb582572012-09-21 12:52:50 +0000436already for probing, use it for reading too.
Martin Rothf6c1cb12022-03-15 10:55:25 -0600437If reading succeeds and the contents of the read file look legit you can try to write the new image.
Stefan Taunereb582572012-09-21 12:52:50 +0000438You should enable the board enable code in any case now, as it
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000439has been written because it is known that writing/erasing without the board
440enable is going to fail. In any case (success or failure), please report to
441the flashrom mailing list, see below.
442.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000443.TP
444.B Coreboot
445.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000446On systems running coreboot, flashrom checks whether the desired image matches
447your mainboard. This needs some special board ID to be present in the image.
448If flashrom detects that the image you want to write and the current board
449do not match, it will refuse to write the image unless you specify
450.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000451.B " flashrom \-p internal:boardmismatch=force"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000452.TP
453.B ITE IT87 Super I/O
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000454.sp
Vadim Girlin4dd0f902013-08-24 12:18:17 +0000455If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an
456ITE IT87 series Super I/O to switch between the two flash chips. Only one of them can be accessed at a time
457and you can manually select which one to use with the
458.sp
459.B " flashrom \-p internal:dualbiosindex=chip"
460.sp
461syntax where
462.B chip
463is the index of the chip to use (0 = main, 1 = backup). You can check which one is currently selected by
464leaving out the
465.B chip
466parameter.
467.sp
Carl-Daniel Hailfinger01f3ef42010-03-25 02:50:40 +0000468If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000469translation, flashrom should autodetect that configuration. If you want to
470set the I/O base port of the IT87 series SPI controller manually instead of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000471using the value provided by the BIOS, use the
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000472.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000473.B " flashrom \-p internal:it87spiport=portnum"
474.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000475syntax where
476.B portnum
477is the I/O port number (must be a multiple of 8). In the unlikely case
478flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
479report so we can diagnose the problem.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000480.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000481.TP
Rudolf Marek70e14592013-07-25 22:58:56 +0000482.B AMD chipsets
483.sp
484Beginning with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in
485every AMD southbridge. Its firmware resides in the same flash chip as the host's which makes writing to the
486flash risky if the IMC is active. Flashrom tries to temporarily disable the IMC but even then changing the
487contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will
488continue executing code from the flash. If the code was removed or changed in an unfortunate way it is
489unpredictable what the IMC will do. Therefore, if flashrom detects an active IMC it will disable write support
490unless the user forces it with the
491.sp
492.B " flashrom \-p internal:amd_imc_force=yes"
493.sp
494syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of
495a layout file. This limitation might be removed in the future when we understand the details better and have
496received enough feedback from users. Please report the outcome if you had to use this option to write a chip.
497.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000498An optional
499.B spispeed
500parameter specifies the frequency of the SPI bus where applicable (i.e.\& SB600 or later with an SPI flash chip
501directly attached to the chipset).
502Syntax is
503.sp
504.B " flashrom \-p internal:spispeed=frequency"
505.sp
506where
507.B frequency
508can be
509.BR "'16.5\ MHz'" ", " "'22\ MHz'" ", " "'33\ MHz'" ", " "'66\ MHz'" ", " "'100\ MHZ'" ", or " "'800\ kHz'" "."
510Support of individual frequencies depends on the generation of the chipset:
511.sp
512* SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
513.sp
514* SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
515.sp
516* Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
517.sp
518The default is to use 16.5 MHz and disable Fast Reads.
Rudolf Marek70e14592013-07-25 22:58:56 +0000519.TP
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000520.B Intel chipsets
521.sp
Stefan Tauner50e7c602011-11-08 10:55:54 +0000522If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
Stefan Taunereb582572012-09-21 12:52:50 +0000523attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
Stefan Tauner50e7c602011-11-08 10:55:54 +0000524chipset provides an alternative way to access the flash chip(s) named
525.BR "Hardware Sequencing" .
526It is much simpler than the normal access method (called
527.BR "Software Sequencing" "),"
528but does not allow the software to choose the SPI commands to be sent.
529You can use the
530.sp
531.B " flashrom \-p internal:ich_spi_mode=value"
532.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000533syntax where
534.BR "value " "can be"
Stefan Tauner50e7c602011-11-08 10:55:54 +0000535.BR auto ", " swseq " or " hwseq .
536By default
537.RB "(or when setting " ich_spi_mode=auto )
Stefan Taunereb582572012-09-21 12:52:50 +0000538the module tries to use swseq and only activates hwseq if need be (e.g.\& if
Stefan Tauner50e7c602011-11-08 10:55:54 +0000539important opcodes are inaccessible due to lockdown; or if more than one flash
540chip is attached). The other options (swseq, hwseq) select the respective mode
541(if possible).
542.sp
Stefan Tauner5210e722012-02-16 01:13:00 +0000543ICH8 and later southbridges may also have locked address ranges of different
544kinds if a valid descriptor was written to it. The flash address space is then
545partitioned in multiple so called "Flash Regions" containing the host firmware,
546the ME firmware and so on respectively. The flash descriptor can also specify up
547to 5 so called "Protected Regions", which are freely chosen address ranges
548independent from the aforementioned "Flash Regions". All of them can be write
Nico Huber7590d1a2016-05-03 13:38:28 +0200549and/or read protected individually.
Stefan Tauner5210e722012-02-16 01:13:00 +0000550.sp
Kyösti Mälkki88ee0402013-09-14 23:37:01 +0000551If you have an Intel chipset with an ICH2 or later southbridge and if you want
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000552to set specific IDSEL values for a non-default flash chip or an embedded
553controller (EC), you can use the
554.sp
555.B " flashrom \-p internal:fwh_idsel=value"
556.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000557syntax where
558.B value
559is the 48-bit hexadecimal raw value to be written in the
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000560IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
561each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
562use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
563The rightmost hex digit corresponds with the lowest address range. All address
564ranges have a corresponding sister range 4 MB below with identical IDSEL
565settings. The default value for ICH7 is given in the example below.
566.sp
567Example:
568.B "flashrom \-p internal:fwh_idsel=0x001122334567"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000569.TP
570.B Laptops
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000571.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +0200572Using flashrom on older laptops that don't boot from the SPI bus is
573dangerous and may easily make your hardware unusable (see also the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000574.B BUGS
Nico Huber2e50cdc2018-09-23 20:20:26 +0200575section). The embedded controller (EC) in some
576machines may interact badly with flashing.
Stefan Tauner4c723152016-01-14 22:47:55 +0000577More information is
578.URLB https://flashrom.org/Laptops "in the wiki" .
Nico Huber2e50cdc2018-09-23 20:20:26 +0200579Problems occur when the flash chip is shared between BIOS
580and EC firmware, and the latter does not expect flashrom
581to access the chip. While flashrom tries to change the contents of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000582that memory the EC might need to fetch new instructions or data from it and
583could stop working correctly. Probing for and reading from the chip may also
584irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
Nico Huber2e50cdc2018-09-23 20:20:26 +0200585other nasty effects. flashrom will attempt to detect if it is running on such a
586laptop and limit probing to SPI buses. If you want to probe the LPC bus
587anyway at your own risk, use
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000588.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000589.B " flashrom \-p internal:laptop=force_I_want_a_brick"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000590.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000591We will not help you if you force flashing on a laptop because this is a really
592dumb idea.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000593.sp
594You have been warned.
595.sp
596Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
597laptops. Some vendors did not implement those bits correctly or set them to
Nico Huber2e50cdc2018-09-23 20:20:26 +0200598generic and/or dummy values. flashrom will then issue a warning and restrict
599buses like above. In this case you can use
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000600.sp
601.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
602.sp
Stefan Tauner6697f712014-08-06 15:09:15 +0000603to tell flashrom (at your own risk) that it is not running on a laptop.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000604.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000605.BR "dummy " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000606.IP
607The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various
608aspects of flashrom and is mainly used in development and while debugging.
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000609It is able to emulate some chips to a certain degree (basic
610identify/read/erase/write operations work).
611.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000612An optional parameter specifies the bus types it
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000613should support. For that you have to use the
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000614.sp
615.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
616.sp
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000617syntax where
618.B type
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000619can be
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000620.BR parallel ", " lpc ", " fwh ", " spi
621in any order. If you specify bus without type, all buses will be disabled.
622If you do not specify bus, all buses will be enabled.
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000623.sp
624Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000625.B "flashrom \-p dummy:bus=lpc+fwh"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000626.sp
627The dummy programmer supports flash chip emulation for automated self-tests
628without hardware access. If you want to emulate a flash chip, use the
629.sp
630.B " flashrom \-p dummy:emulate=chip"
631.sp
632syntax where
633.B chip
634is one of the following chips (please specify only the chip name, not the
635vendor):
636.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000637.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000638.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000639.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000640.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000641.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000642.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000643.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
Stefan Tauner0b9df972012-05-07 22:12:16 +0000644.sp
Sergii Dmytrukd6448932021-12-01 19:21:59 +0200645.RB "* Winbond " W25Q128FV " SPI flash chip (16384 kB, RDID)"
646.sp
Nico Huber4203a472022-05-28 17:28:05 +0200647.RB "* Spansion " S25FL128L " SPI flash chip (16384 kB, RDID)"
648.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000649Example:
650.B "flashrom -p dummy:emulate=SST25VF040.REMS"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000651.TP
652.B Persistent images
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000653.sp
654If you use flash chip emulation, flash image persistence is available as well
655by using the
656.sp
657.B " flashrom \-p dummy:emulate=chip,image=image.rom"
658.sp
659syntax where
660.B image.rom
661is the file where the simulated chip contents are read on flashrom startup and
662where the chip contents on flashrom shutdown are written to.
663.sp
664Example:
665.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000666.TP
667.B SPI write chunk size
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000668.sp
669If you use SPI flash chip emulation for a chip which supports SPI page write
670with the default opcode, you can set the maximum allowed write chunk size with
671the
672.sp
673.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
674.sp
675syntax where
676.B size
Stefan Taunereb582572012-09-21 12:52:50 +0000677is the number of bytes (min.\& 1, max.\& 256).
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000678.sp
679Example:
680.sp
681.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000682.TP
683.B SPI blacklist
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000684.sp
685To simulate a programmer which refuses to send certain SPI commands to the
686flash chip, you can specify a blacklist of SPI commands with the
687.sp
688.B " flashrom -p dummy:spi_blacklist=commandlist"
689.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000690syntax where
691.B commandlist
692is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000693SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000694controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
695commandlist may be up to 512 characters (256 commands) long.
696Implementation note: flashrom will detect an error during command execution.
697.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000698.TP
699.B SPI ignorelist
700.sp
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000701To simulate a flash chip which ignores (doesn't support) certain SPI commands,
702you can specify an ignorelist of SPI commands with the
703.sp
704.B " flashrom -p dummy:spi_ignorelist=commandlist"
705.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000706syntax where
707.B commandlist
708is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000709SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000710command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
711characters (256 commands) long.
712Implementation note: flashrom won't detect an error during command execution.
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000713.sp
714.TP
715.B SPI status register
716.sp
717You can specify the initial content of the chip's status register with the
718.sp
719.B " flashrom -p dummy:spi_status=content"
720.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000721syntax where
722.B content
Sergii Dmytruk59151a42021-11-08 00:05:12 +0200723is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to
724SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to 24 bits with
725zeroes on the left. See datasheet for chosen chip for details about the
726registers content.
Sergii Dmytruk2fc70dc2021-11-08 01:38:52 +0200727.sp
728.TP
729.B Write protection
730.sp
Nico Huber4203a472022-05-28 17:28:05 +0200731Chips with emulated WP: W25Q128FV, S25FL128L.
Sergii Dmytruk2fc70dc2021-11-08 01:38:52 +0200732.sp
733You can simulate state of hardware protection pin (WP) with the
734.sp
735.B " flashrom -p dummy:hwwp=state"
736.sp
737syntax where
738.B state
739is "yes" or "no" (default value). "yes" means active state of the pin implies
740that chip is write-protected (on real hardware the pin is usually negated, but
741not here).
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000742.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000743.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000744, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000745, " satamv" , " atahpt", " atavia ", " atapromise " and " it8212 " programmers
Stefan Tauner4c723152016-01-14 22:47:55 +0000746.IP
Michael Karchere5eafb22010-03-07 12:11:08 +0000747These programmers have an option to specify the PCI address of the card
748your want to use, which must be specified if more than one card supported
749by the selected programmer is installed in your system. The syntax is
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000750.sp
751.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
752.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000753where
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000754.B xxxx
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000755is the name of the programmer,
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000756.B bb
757is the PCI bus number,
758.B dd
759is the PCI device number, and
760.B f
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000761is the PCI function number of the desired device.
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000762.sp
763Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000764.B "flashrom \-p nic3com:pci=05:04.0"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000765.SS
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000766.BR "atavia " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000767.IP
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000768Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the
769.sp
770.B " flashrom \-p atavia:offset=addr"
771.sp
772syntax where
773.B addr
774will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal).
775For more information please see
Stefan Tauner4c723152016-01-14 22:47:55 +0000776.URLB https://flashrom.org/VT6421A "its wiki page" .
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000777.SS
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000778.BR "atapromise " programmer
779.IP
780This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems
781from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were
782actually connected. You may use this programmer to flash firmware updates, since these are only 16 kB in
783size (padding to 32 kB is required).
784.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000785.BR "nicintel_eeprom " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000786.IP
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000787This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs
788mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their
Stefan Tauner0be072c2016-03-13 15:16:30 +0000789size nor allow themselves to be identified, the controller relies on correct size values written to predefined
790addresses within the chip. Flashrom follows this scheme but assumes the minimum size of 16 kB (128 kb) if an
791unprogrammed EEPROM/card is detected. Intel specifies following EEPROMs to be compatible:
792Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000793.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000794.BR "ft2232_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000795.IP
Alexander Goncharov11d85772023-02-25 17:32:21 +0400796This module supports various programmers based on FTDI FT2232/FT4232H/FT4233H/FT232H chips including the DLP Design
Stefan Tauner0be072c2016-03-13 15:16:30 +0000797DLP-USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster,
798Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board (V2+), TIAO/DIYGADGET USB
Jacek Naglak24e1bbb2022-05-18 02:25:13 +0200799Multi-Protocol Adapter (TUMPA), TUMPA Lite, GOEPEL PicoTAP, Google Servo v1/v2, Tin Can Tools
800Flyswatter/Flyswatter 2 and Kristech KT-LINK.
Stefan Tauner0be072c2016-03-13 15:16:30 +0000801.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000802An optional parameter specifies the controller
Michael Niewöhner1da06352021-09-23 21:25:03 +0200803type, channel/interface/port it should support. For that you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000804.sp
Michael Niewöhner1da06352021-09-23 21:25:03 +0200805.B " flashrom \-p ft2232_spi:type=model,port=interface"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000806.sp
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000807syntax where
808.B model
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000809can be
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +0000810.BR 2232H ", " 4232H ", " 232H ", " jtagkey ", " busblaster ", " openmoko ", " \
Uwe Hermann836b26a2011-10-14 20:33:14 +0000811arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
Todd Broch6800c952016-02-14 15:46:00 +0000812", " tumpa ", " tumpalite ", " picotap ", " google-servo ", " google-servo-v2 \
Jacek Naglak24e1bbb2022-05-18 02:25:13 +0200813", " google-servo-v2-legacy " or " kt-link
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000814.B interface
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000815can be
Michael Niewöhner1da06352021-09-23 21:25:03 +0200816.BR A ", " B ", " C ", or " D .
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000817The default model is
818.B 4232H
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300819the default interface is
820.BR A
821and GPIO is not used by default.
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000822.sp
Shik Chen14fbc4b2012-09-17 00:40:54 +0000823If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by
824specifying its serial number with the
825.sp
826.B " flashrom \-p ft2232_spi:serial=number"
827.sp
828syntax where
829.B number
830is the serial number of the device (which can be found for example in the output of lsusb -v).
831.sp
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000832All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The
Stefan Tauner0554ca52013-07-25 22:54:25 +0000833expressible divisors are all
834.B even
835numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
Nicholas Chin32392b52022-12-01 11:51:04 -07008366 MHz down to about 92 Hz for 12 MHz inputs (non-H chips) and 30 MHz down to about 458 Hz for 60 MHz inputs ('H' chips). The default
837divisor is set to 2, but you can use another one by specifying the optional
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000838.B divisor
839parameter with the
840.sp
841.B " flashrom \-p ft2232_spi:divisor=div"
842.sp
843syntax.
Michael Niewöhner1da06352021-09-23 21:25:03 +0200844.sp
845Using the parameter
Michael Niewöhnerece63c82021-09-21 20:15:32 +0200846.B csgpiol (DEPRECATED - use gpiol instead)
Michael Niewöhner1da06352021-09-23 21:25:03 +0200847an additional CS# pin can be chosen, where the value can be a number between 0 and 3, denoting GPIOL0-GPIOL3
848correspondingly. Example:
849.sp
850.B " flashrom \-p ft2232_spi:csgpiol=3"
851.sp
Michael Niewöhnerece63c82021-09-21 20:15:32 +0200852The parameter
853.B gpiolX=[HLC]
Martin Rothf6c1cb12022-03-15 10:55:25 -0600854allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as additional CS#
Michael Niewöhnerece63c82021-09-21 20:15:32 +0200855signal, where
856.B X
857can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. The parameter may be specified
858multiple times, one time per GPIOL pin.
859Valid values are
860.B H
861,
862.B L
863and
864.B C
865:
866.br
867.B " H "
868- Set GPIOL output high
869.br
870.B " L "
871- Set GPIOL output low
872.br
873.B " C "
874- Use GPIOL as additional CS# output
875.sp
876.B Example:
877.sp
878.B " flashrom \-p ft2232_spi:gpiol0=H"
879.sp
880.B Note
881that not all GPIOL pins are freely usable with all programmers as some have special functionality.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000882.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000883.BR "serprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000884.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000885This module supports all programmers speaking the serprog protocol. This includes some Arduino-based devices
886as well as various programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others.
887.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000888A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for
889communicating with the programmer.
890The device/baud combination has to start with
891.B dev=
892and separate the optional baud rate with a colon.
893For example
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000894.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000895.B " flashrom \-p serprog:dev=/dev/ttyS0:115200"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000896.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000897If no baud rate is given the default values by the operating system/hardware will be used.
898For IP connections you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000899.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000900.B " flashrom \-p serprog:ip=ipaddr:port"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000901.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000902syntax.
903In case the device supports it, you can set the SPI clock frequency with the optional
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000904.B spispeed
Stefan Tauner0554ca52013-07-25 22:54:25 +0000905parameter. The frequency is parsed as hertz, unless an
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000906.BR M ", or " k
907suffix is given, then megahertz or kilohertz are used respectively.
908Example that sets the frequency to 2 MHz:
909.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +0000910.B " flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000911.sp
912More information about serprog is available in
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000913.B serprog-protocol.txt
914in the source distribution.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000915.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000916.BR "buspirate_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000917.IP
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000918A required
919.B dev
920parameter specifies the Bus Pirate device node and an optional
921.B spispeed
922parameter specifies the frequency of the SPI bus. The parameter
Michael Karchere5eafb22010-03-07 12:11:08 +0000923delimiter is a comma. Syntax is
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000924.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000925.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
Michael Karchere5eafb22010-03-07 12:11:08 +0000926.sp
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000927where
928.B frequency
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000929can be
930.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
Michael Karchere5eafb22010-03-07 12:11:08 +0000931(in Hz). The default is the maximum frequency of 8 MHz.
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000932.sp
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600933The baud rate for communication between the host and the Bus Pirate can be specified with the optional
934.B serialspeed
935parameter. Syntax is
936.sp
937.B " flashrom -p buspirate_spi:serialspeed=baud
938.sp
939where
940.B baud
941can be
942.BR 115200 ", " 230400 ", " 250000 " or " 2000000 " (" 2M ")."
943The default is 2M baud for Bus Pirate hardware version 3.0 and greater, and 115200 otherwise.
944.sp
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000945An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be
946needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is
947.sp
948.B " flashrom -p buspirate_spi:pullups=state"
949.sp
950where
951.B state
952can be
953.BR on " or " off .
Stefan Tauner4c723152016-01-14 22:47:55 +0000954More information about the Bus Pirate pull-up resistors and their purpose is available
955.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors" \
956"in a guide by dangerousprototypes" .
Jeremy Kerr98bdcb42021-05-23 17:58:06 +0800957.sp
958The state of the Bus Pirate power supply pins is controllable through an optional
959.B psus
960parameter. Syntax is
961.sp
962.B " flashrom -p buspirate_spi:psus=state"
963.sp
964where
965.B state
966can be
967.BR on " or " off .
968This allows the bus pirate to power the ROM chip directly. This may also be used to provide the
969required pullup voltage (when using the
970.B pullups
971option), by connecting the Bus Pirate's Vpu input to the appropriate Vcc pin.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000972.SS
Justin Chevrier66e554b2015-02-08 21:58:10 +0000973.BR "pickit2_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000974.IP
Justin Chevrier66e554b2015-02-08 21:58:10 +0000975An optional
976.B voltage
977parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified.
978You can use
979.BR mV ", " millivolt ", " V " or " Volt
980as unit specifier. Syntax is
981.sp
982.B " flashrom \-p pickit2_spi:voltage=value"
983.sp
984where
985.B value
986can be
987.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
988or the equivalent in mV.
989.sp
990An optional
991.B spispeed
992parameter specifies the frequency of the SPI bus. Syntax is
993.sp
994.B " flashrom \-p pickit2_spi:spispeed=frequency"
995.sp
996where
997.B frequency
998can be
999.BR 250k ", " 333k ", " 500k " or " 1M "
1000(in Hz). The default is a frequency of 1 MHz.
1001.SS
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001002.BR "dediprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001003.IP
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +00001004An optional
1005.B voltage
1006parameter specifies the voltage the Dediprog should use. The default unit is
1007Volt if no unit is specified. You can use
1008.BR mV ", " milliVolt ", " V " or " Volt
1009as unit specifier. Syntax is
1010.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001011.B " flashrom \-p dediprog:voltage=value"
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +00001012.sp
1013where
1014.B value
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001015can be
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +00001016.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
1017or the equivalent in mV.
Nathan Laredo21541a62012-12-24 22:07:36 +00001018.sp
1019An optional
1020.B device
1021parameter specifies which of multiple connected Dediprog devices should be used.
1022Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts
1023at 0.
1024Usage example to select the second device:
1025.sp
1026.B " flashrom \-p dediprog:device=1"
Nico Huber77fa67d2013-02-20 18:03:36 +00001027.sp
1028An optional
1029.B spispeed
Patrick Georgiefe2d432013-05-23 21:47:46 +00001030parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer.
1031Syntax is
Nico Huber77fa67d2013-02-20 18:03:36 +00001032.sp
1033.B " flashrom \-p dediprog:spispeed=frequency"
1034.sp
1035where
1036.B frequency
1037can be
1038.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M
1039(in Hz). The default is a frequency of 12 MHz.
Stefan Taunere659d2d2013-05-03 21:58:28 +00001040.sp
1041An optional
1042.B target
1043parameter specifies which target chip should be used. Syntax is
1044.sp
1045.B " flashrom \-p dediprog:target=value"
1046.sp
1047where
1048.B value
1049can be
1050.BR 1 " or " 2
Stefan Tauner6697f712014-08-06 15:09:15 +00001051to select target chip 1 or 2 respectively. The default is target chip 1.
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001052.SS
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001053.BR "rayer_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001054.IP
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +00001055The default I/O base address used for the parallel port is 0x378 and you can use
1056the optional
1057.B iobase
1058parameter to specify an alternate base I/O address with the
1059.sp
1060.B " flashrom \-p rayer_spi:iobase=baseaddr"
1061.sp
1062syntax where
1063.B baseaddr
1064is base I/O port address of the parallel port, which must be a multiple of
1065four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
1066.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +00001067The default cable type is the RayeR cable. You can use the optional
1068.B type
1069parameter to specify the cable type with the
1070.sp
1071.B " flashrom \-p rayer_spi:type=model"
1072.sp
1073syntax where
1074.B model
1075can be
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +00001076.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
Stefan Taunerfdb16592016-02-28 17:04:38 +00001077STK200/300, " wiggler " for the Macraigor Wiggler, " xilinx " for the Xilinx Parallel Cable III (DLC 5), or" \
1078" spi_tt" " for SPI Tiny Tools-compatible hardware.
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +00001079.sp
1080More information about the RayeR hardware is available at
Stefan Tauner23e10b82016-01-23 16:16:49 +00001081.nh
Stefan Tauner4c723152016-01-14 22:47:55 +00001082.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" .
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +00001083The Altera ByteBlasterMV datasheet can be obtained from
Stefan Tauner4c723152016-01-14 22:47:55 +00001084.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera .
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +00001085For more information about the Macraigor Wiggler see
Stefan Tauner4c723152016-01-14 22:47:55 +00001086.URLB "http://www.macraigor.com/wiggler.htm" "their company homepage" .
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +00001087The schematic of the Xilinx DLC 5 was published in
Stefan Tauner4c723152016-01-14 22:47:55 +00001088.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001089.SS
Michael Karchere5449392012-05-05 20:53:59 +00001090.BR "pony_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001091.IP
Michael Karchere5449392012-05-05 20:53:59 +00001092The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
1093specified using the mandatory
Stefan Taunere34e3e82013-01-01 00:06:51 +00001094.B dev
Michael Karchere5449392012-05-05 20:53:59 +00001095parameter. The adapter type is selectable between SI-Prog (used for
1096SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer
1097named "serbang". The optional
Stefan Taunere34e3e82013-01-01 00:06:51 +00001098.B type
Michael Karchere5449392012-05-05 20:53:59 +00001099parameter accepts the values "si_prog" (default) or "serbang".
1100.sp
1101Information about the SI-Prog adapter can be found at
Stefan Tauner4c723152016-01-14 22:47:55 +00001102.URLB "http://www.lancos.com/siprogsch.html" "its website" .
Michael Karchere5449392012-05-05 20:53:59 +00001103.sp
1104An example call to flashrom is
1105.sp
1106.B " flashrom \-p pony_spi:dev=/dev/ttyS0,type=serbang"
1107.sp
1108Please note that while USB-to-serial adapters work under certain circumstances,
1109this slows down operation considerably.
1110.SS
Mark Marshall90021f22010-12-03 14:48:11 +00001111.BR "ogp_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001112.IP
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001113The flash ROM chip to access must be specified with the
Mark Marshall90021f22010-12-03 14:48:11 +00001114.B rom
1115parameter.
1116.sp
1117.B " flashrom \-p ogp_spi:rom=name"
1118.sp
1119Where
1120.B name
1121is either
1122.B cprom
1123or
1124.B s3
Stefan Taunere34e3e82013-01-01 00:06:51 +00001125for the configuration ROM and
Mark Marshall90021f22010-12-03 14:48:11 +00001126.B bprom
1127or
1128.B bios
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001129for the BIOS ROM. If more than one card supported by the ogp_spi programmer
Mark Marshall90021f22010-12-03 14:48:11 +00001130is installed in your system, you have to specify the PCI address of the card
1131you want to use with the
1132.B pci=
1133parameter as explained in the
Stefan Taunere34e3e82013-01-01 00:06:51 +00001134.B nic3com et al.\&
Mark Marshall90021f22010-12-03 14:48:11 +00001135section above.
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001136.SS
Steve Markgraf61899472023-01-09 23:06:52 +01001137.BR "linux_gpio_spi " programmer
1138.IP
1139Either the GPIO device node or the chip number as well as the GPIO numbers
1140of the SPI lines must be specified like in the following examples:
1141.sp
1142.B " flashrom \-p linux_gpio_spi:dev=/dev/gpiochip0,cs=8,sck=11,mosi=10,miso=9"
1143.sp
1144or
1145.sp
1146.B " flashrom \-p linux_gpio_spi:gpiochip=0,cs=8,sck=11,mosi=10,miso=9"
1147.sp
1148Here,
1149.B gpiochip=0
1150selects the GPIO chip 0, accessible through Linux device node /dev/gpiochip0, and the
1151.B cs, sck, mosi, miso
1152arguments select the GPIO numbers used as SPI lines connected to the flash ROM chip. In this example
1153the GPIO numbers of the hardware SPI lines of of a Raspberry Pi single board computer are specified.
1154All programmer arguments are mandatory.
1155Note that this is a bitbanged driver, and if your device has a hardware SPI controller, use the
1156.B linux_spi
1157programmer driver instead for better performance.
1158.sp
1159Refer to the output of the
1160.B gpioinfo
1161utility to make sure the GPIO numbers are correct and unused.
1162.sp
1163Please note that the linux_gpio_spi driver only works on Linux, and depends on libgpiod.
1164.SS
David Hendricksf9a30552015-05-23 20:30:30 -07001165.BR "linux_mtd " programmer
1166.IP
1167You may specify the MTD device to use with the
1168.sp
1169.B " flashrom \-p linux_mtd:dev=/dev/mtdX"
1170.sp
1171syntax where
1172.B /dev/mtdX
1173is the Linux device node for your MTD device. If left unspecified the first MTD
1174device found (e.g. /dev/mtd0) will be used by default.
1175.sp
1176Please note that the linux_mtd driver only works on Linux.
1177.SS
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001178.BR "linux_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001179.IP
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001180You have to specify the SPI controller to use with the
1181.sp
1182.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y"
1183.sp
1184syntax where
1185.B /dev/spidevX.Y
1186is the Linux device node for your SPI controller.
1187.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +00001188In case the device supports it, you can set the SPI clock frequency with the optional
1189.B spispeed
1190parameter. The frequency is parsed as kilohertz.
1191Example that sets the frequency to 8 MHz:
1192.sp
1193.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000"
1194.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001195Please note that the linux_spi driver only works on Linux.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001196.SS
1197.BR "mstarddc_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001198.IP
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001199The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging
Stefan Tauner0be072c2016-03-13 15:16:30 +00001200information between a computer and attached displays. Its most common uses are getting display capabilities
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001201through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address
12020x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to
1203the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49.
1204This flashrom module allows the latter via Linux's I2C driver.
1205.sp
1206.B IMPORTANT:
1207Before using this programmer, the display
1208.B MUST
1209be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an
1210inactive VGA output. It absolutely
1211.B MUST NOT
1212be used as a display during the procedure!
1213.sp
1214You have to specify the DDC/I2C controller and I2C address to use with the
1215.sp
1216.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY"
1217.sp
1218syntax where
1219.B /dev/i2c-X
1220is the Linux device node for your I2C controller connected to the display's DDC channel, and
1221.B YY
1222is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used).
1223Example that uses I2C controller /dev/i2c-1 and address 0x49:
1224.sp
1225.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49
1226.sp
1227It is also possible to inhibit the reset command that is normally sent to the display once the flashrom
1228operation is completed using the optional
1229.B noreset
1230parameter. A value of 1 prevents flashrom from sending the reset command.
1231Example that does not reset the display at the end of the operation:
1232.sp
1233.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
1234.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +00001235Please note that sending the reset command is also inhibited if an error occurred during the operation.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001236To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying
1237an operation), without the
1238.B noreset
1239parameter, once the flash read/write operation you intended to perform has completed successfully.
1240.sp
1241Please also note that the mstarddc_spi driver only works on Linux.
Urja Rannikko0870b022016-01-31 22:10:29 +00001242.SS
1243.BR "ch341a_spi " programmer
1244The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is
1245used as per the device.
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001246.SS
Nicholas Chin197b7c72022-10-23 13:10:31 -06001247.BR "ch347_spi " programmer
1248The WCH CH347 programmer does not currently support any parameters. SPI frequency is fixed at 2 MHz, and CS0 is
1249used as per the device.
1250.SS
Miklós Márton2d20d6d2018-01-30 20:20:15 +01001251.BR "ni845x_spi " programmer
1252.IP
1253An optional
1254.B voltage
1255parameter could be used to specify the IO voltage. This parameter is available for the NI USB-8452 device.
1256The default unit is Volt if no unit is specified. You can use
1257.BR mV ", " milliVolt ", " V " or " Volt
1258as unit specifier.
1259Syntax is
1260.sp
1261.B " flashrom \-p ni845x_spi:voltage=value"
1262.sp
1263where
1264.B value
1265can be
1266.BR 1.2V ", " 1.5V ", " 1.8V ", " 2.5V ", " 3.3V
1267or the equivalent in mV.
1268.sp
1269In the case if none of the programmer's supported IO voltage is within the supported voltage range of
1270the detected flash chip the flashrom will abort the operation (to prevent damaging the flash chip).
1271You can override this behaviour by passing "yes" to the
1272.B ignore_io_voltage_limits
1273parameter (for e.g. if you are using an external voltage translator circuit).
1274Syntax is
1275.sp
1276.B " flashrom \-p ni845x_spi:ignore_io_voltage_limits=yes"
1277.sp
1278You can use the
1279.B serial
1280parameter to explicitly specify which connected NI USB-845x device should be used.
1281You should use your device's 7 digit hexadecimal serial number.
1282Usage example to select the device with 1230A12 serial number:
1283.sp
1284.B " flashrom \-p ni845x_spi:serial=1230A12"
1285.sp
1286An optional
1287.B spispeed
1288parameter specifies the frequency of the SPI bus.
1289Syntax is
1290.sp
1291.B " flashrom \-p ni845x_spi:spispeed=frequency"
1292.sp
1293where
1294.B frequency
1295should a number corresponding to the desired frequency in kHz.
1296The maximum
1297.B frequency
1298is 12 MHz (12000 kHz) for the USB-8451 and 50 MHz (50000 kHz) for the USB-8452.
1299The default is a frequency of 1 MHz (1000 kHz).
1300.sp
1301An optional
1302.B cs
1303parameter specifies which target chip select line should be used. Syntax is
1304.sp
1305.B " flashrom \-p ni845x_spi:csnumber=value"
1306.sp
1307where
1308.B value
1309should be between
1310.BR 0 " and " 7
1311By default the CS0 is used.
1312.SS
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001313.BR "digilent_spi " programmer
1314.IP
1315An optional
1316.B spispeed
1317parameter specifies the frequency of the SPI bus.
1318Syntax is
1319.sp
1320.B " flashrom \-p digilent_spi:spispeed=frequency"
1321.sp
1322where
1323.B frequency
1324can be
1325.BR 62.5k ", " 125k ", " 250k ", " 500k ", " 1M ", " 2M " or " 4M
1326(in Hz). The default is a frequency of 4 MHz.
1327.sp
Jean THOMASe28d8e42022-10-11 17:54:30 +02001328.BR "dirtyjtag_spi " programmer
1329.IP
1330An optional
1331.B freq
1332parameter specifies the frequency of the SPI bus.
1333Syntax is
1334.sp
1335.B " flashrom \-p dirtyjtag_spi:spispeed=frequency"
1336.sp
1337where
1338.B spispeed
1339can be
1340.BR any value in hertz, kilohertz or megahertz supported by the
1341programmer. The default is a frequency of 100 KHz.
1342.sp
1343.SS
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001344.SS
Marc Schink3578ec62016-03-17 16:23:03 +01001345.BR "jlink_spi " programmer
1346.IP
1347This module supports SEGGER J-Link and compatible devices.
1348
1349The \fBMOSI\fP signal of the flash chip must be attached to \fBTDI\fP pin of
1350the programmer, \fBMISO\fP to \fBTDO\fP and \fBSCK\fP to \fBTCK\fP.
1351The chip select (\fBCS\fP) signal of the flash chip can be attached to
1352different pins of the programmer which can be selected with the
1353.sp
1354.B " flashrom \-p jlink_spi:cs=pin"
1355.sp
1356syntax where \fBpin\fP can be either \fBTRST\fP or \fBRESET\fP.
1357The default pin for chip select is \fBRESET\fP.
1358Note that, when using \fBRESET\fP, it is normal that the indicator LED blinks
1359orange or red.
1360.br
1361Additionally, the \fBVTref\fP pin of the programmer must be attached to the
1362logic level of the flash chip.
1363The programmer measures the voltage on this pin and generates the reference
1364voltage for its input comparators and adapts its output voltages to it.
1365.sp
1366Pinout for devices with 20-pin JTAG connector:
1367.sp
1368 +-------+
1369 | 1 2 | 1: VTref 2:
1370 | 3 4 | 3: TRST 4: GND
1371 | 5 6 | 5: TDI 6: GND
1372 +-+ 7 8 | 7: 8: GND
1373 | 9 10 | 9: TCK 10: GND
1374 | 11 12 | 11: 12: GND
1375 +-+ 13 14 | 13: TDO 14:
1376 | 15 16 | 15: RESET 16:
1377 | 17 18 | 17: 18:
1378 | 19 20 | 19: PWR_5V 20:
1379 +-------+
1380.sp
1381If there is more than one compatible device connected, you can select which one
1382should be used by specifying its serial number with the
1383.sp
1384.B " flashrom \-p jlink_spi:serial=number"
1385.sp
1386syntax where
1387.B number
1388is the serial number of the device (which can be found for example in the
1389output of lsusb -v).
1390.sp
1391The SPI speed can be selected by using the
1392.sp
1393.B " flashrom \-p jlink_spi:spispeed=frequency"
1394.sp
1395syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
1396The maximum speed depends on the device in use.
Marc Schink137f02f2020-08-23 16:19:44 +02001397.sp
1398The \fBpower=on\fP option can be used to activate the 5 V power supply (PWR_5V)
1399of the J-Link during a flash operation.
Marc Schink3578ec62016-03-17 16:23:03 +01001400.SS
Miklós Márton324929c2019-08-01 19:14:10 +02001401.BR "stlinkv3_spi " programmer
1402.IP
1403This module supports SPI flash programming through the STMicroelectronics
1404STLINK V3 programmer/debugger's SPI bridge interface
1405.sp
1406.B " flashrom \-p stlinkv3_spi"
1407.sp
1408If there is more than one compatible device connected, you can select which one
1409should be used by specifying its serial number with the
1410.sp
1411.B " flashrom \-p stlinkv3_spi:serial=number"
1412.sp
1413syntax where
1414.B number
1415is the serial number of the device (which can be found for example in the
1416output of lsusb -v).
1417.sp
1418The SPI speed can be selected by using the
1419.sp
1420.B " flashrom \-p stlinkv3_spi:spispeed=frequency"
1421.sp
1422syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
1423If the passed frequency is not supported by the adapter the nearest lower
1424supported frequency will be used.
1425.SS
Marc Schink3578ec62016-03-17 16:23:03 +01001426
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +00001427.SH EXAMPLES
1428To back up and update your BIOS, run
1429.sp
1430.B flashrom -p internal -r backup.rom -o backuplog.txt
1431.br
1432.B flashrom -p internal -w newbios.rom -o writelog.txt
1433.sp
1434Please make sure to copy backup.rom to some external media before you try
1435to write. That makes offline recovery easier.
1436.br
1437If writing fails and flashrom complains about the chip being in an unknown
1438state, you can try to restore the backup by running
1439.sp
1440.B flashrom -p internal -w backup.rom -o restorelog.txt
1441.sp
1442If you encounter any problems, please contact us and supply
1443backuplog.txt, writelog.txt and restorelog.txt. See section
1444.B BUGS
1445for contact info.
Peter Stuge42688e52009-01-26 02:20:56 +00001446.SH EXIT STATUS
Niklas Söderlund2d8b7ef2013-09-13 19:19:25 +00001447flashrom exits with 0 on success, 1 on most failures but with 3 if a call to mmap() fails.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001448.SH REQUIREMENTS
1449flashrom needs different access permissions for different programmers.
1450.sp
1451.B internal
1452needs raw memory access, PCI configuration space access, raw I/O port
1453access (x86) and MSR access (x86).
1454.sp
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +00001455.B atavia
1456needs PCI configuration space access.
1457.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001458.BR nic3com ", " nicrealtek " and " nicnatsemi "
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001459need PCI configuration space read access and raw I/O port access.
1460.sp
1461.B atahpt
1462needs PCI configuration space access and raw I/O port access.
1463.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001464.BR gfxnvidia ", " drkaiser " and " it8212
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001465need PCI configuration space access and raw memory access.
1466.sp
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001467.B rayer_spi
1468needs raw I/O port access.
1469.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +00001470.BR satasii ", " nicintel ", " nicintel_eeprom " and " nicintel_spi
1471need PCI configuration space read access and raw memory access.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001472.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001473.BR satamv " and " atapromise
1474need PCI configuration space read access, raw I/O port access and raw memory
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +00001475access.
1476.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001477.B serprog
1478needs TCP access to the network or userspace access to a serial port.
1479.sp
1480.B buspirate_spi
1481needs userspace access to a serial port.
1482.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001483.BR ft2232_spi ", " usbblaster_spi " and " pickit2_spi
Stefan Taunere49edbb2016-01-31 22:10:14 +00001484need access to the respective USB device via libusb API version 0.1.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001485.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001486.BR ch341a_spi " and " dediprog
1487need access to the respective USB device via libusb API version 1.0.
Urja Rannikko0870b022016-01-31 22:10:29 +00001488.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001489.B dummy
1490needs no access permissions at all.
1491.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001492.BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", "
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001493.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001494have to be run as superuser/root, and need additional raw access permission.
1495.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001496.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi ", " \
Jean THOMASe28d8e42022-10-11 17:54:30 +02001497ch341a_spi ", " digilent_spi " and " dirtyjtag_spi
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001498can be run as normal user on most operating systems if appropriate device
1499permissions are set.
1500.sp
Mark Marshall90021f22010-12-03 14:48:11 +00001501.B ogp
1502needs PCI configuration space read access and raw memory access.
1503.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001504On OpenBSD, you can obtain raw access permission by setting
Uwe Hermann941a2732011-07-25 21:12:57 +00001505.B "securelevel=-1"
1506in
1507.B "/etc/rc.securelevel"
1508and rebooting, or rebooting into single user mode.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001509.SH BUGS
Angel Pons1900e1d2021-07-02 12:42:23 +02001510You can report bugs, ask us questions or send success reports
1511via our communication channels listed here:
1512.URLB "https://www.flashrom.org/Contact" "" .
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001513.sp
Angel Pons1900e1d2021-07-02 12:42:23 +02001514Also, we provide a
Stefan Tauner4c723152016-01-14 22:47:55 +00001515.URLB https://paste.flashrom.org "pastebin service"
Angel Pons1900e1d2021-07-02 12:42:23 +02001516that is very useful to share logs without spamming the communication channels.
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001517.SS
1518.B Laptops
1519.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +02001520Using flashrom on older laptops is dangerous and may easily make your hardware
1521unusable. flashrom will attempt to detect if it is running on a susceptible
1522laptop and restrict flash-chip probing for safety reasons. Please see the
1523detailed discussion of this topic and associated flashrom options in the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001524.B Laptops
1525paragraph in the
1526.B internal programmer
1527subsection of the
Stefan Tauner6697f712014-08-06 15:09:15 +00001528.B PROGRAMMER-SPECIFIC INFORMATION
Stefan Tauner4c723152016-01-14 22:47:55 +00001529section and the information
1530.URLB "https://flashrom.org/Laptops" "in our wiki" .
Daniel Lenski65922a32012-02-15 23:40:23 +00001531.SS
1532One-time programmable (OTP) memory and unique IDs
1533.sp
1534Some flash chips contain OTP memory often denoted as "security registers".
1535They usually have a capacity in the range of some bytes to a few hundred
Stefan Taunereb582572012-09-21 12:52:50 +00001536bytes and can be used to give devices unique IDs etc. flashrom is not able
Daniel Lenski65922a32012-02-15 23:40:23 +00001537to read or write these memories and may therefore not be able to duplicate a
1538chip completely. For chip types known to include OTP memories a warning is
1539printed when they are detected.
1540.sp
1541Similar to OTP memories are unique, factory programmed, unforgeable IDs.
1542They are not modifiable by the user at all.
Stefan Taunerac54fbe2011-07-21 19:52:00 +00001543.SH LICENSE
Stefan Reinauer261144c2006-07-27 23:29:02 +00001544.B flashrom
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001545is covered by the GNU General Public License (GPL), version 2. Some files are
Stefan Tauner23e10b82016-01-23 16:16:49 +00001546additionally available under any later version of the GPL.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001547.SH COPYRIGHT
Stefan Reinauer261144c2006-07-27 23:29:02 +00001548.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001549Please see the individual files.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001550.SH AUTHORS
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001551Andrew Morgan
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001552.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001553Carl-Daniel Hailfinger
1554.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001555Claus Gindhart
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001556.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001557David Borg
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001558.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001559David Hendricks
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001560.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001561Dominik Geyer
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001562.br
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +10001563Edward O'Callaghan
1564.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001565Eric Biederman
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001566.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001567Giampiero Giancipoli
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001568.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001569Helge Wagner
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001570.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001571Idwer Vollering
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001572.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001573Joe Bao
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001574.br
Stefan Taunerc0aaf952011-05-19 02:58:17 +00001575Joerg Fischer
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001576.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001577Joshua Roys
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001578.br
Stefan Tauner5c316f92015-02-08 21:57:52 +00001579Ky\[:o]sti M\[:a]lkki
1580.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001581Luc Verhaegen
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001582.br
Carl-Daniel Hailfinger451dc802009-05-01 11:00:39 +00001583Li-Ta Lo
1584.br
Mark Marshall90021f22010-12-03 14:48:11 +00001585Mark Marshall
1586.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001587Markus Boas
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001588.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001589Mattias Mattsson
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001590.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001591Michael Karcher
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001592.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001593Nikolay Petukhov
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001594.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001595Patrick Georgi
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001596.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001597Peter Lemenkov
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001598.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001599Peter Stuge
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001600.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001601Reinder E.N. de Haan
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001602.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001603Ronald G. Minnich
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001604.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001605Ronald Hoogenboom
Stefan Reinauer261144c2006-07-27 23:29:02 +00001606.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001607Sean Nelson
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001608.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001609Stefan Reinauer
Stefan Reinauer261144c2006-07-27 23:29:02 +00001610.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001611Stefan Tauner
1612.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001613Stefan Wildemann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001614.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001615Stephan Guilloux
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001616.br
Steve Markgraf61899472023-01-09 23:06:52 +01001617Steve Markgraf
1618.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001619Steven James
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001620.br
Stefan Tauner23e10b82016-01-23 16:16:49 +00001621Urja Rannikko
1622.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001623Uwe Hermann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001624.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001625Wang Qingpei
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001626.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001627Yinghai Lu
Stefan Reinauerf8337dd2006-08-03 10:49:09 +00001628.br
Michael Niewöhner72139682021-09-21 20:14:42 +02001629some others, please see the flashrom git history for details.
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001630.br
Nico Huberac90af62022-12-18 00:22:47 +00001631Active maintainers can be reached via
1632.MTOB "flashrom-stable@flashrom.org" "the mailing list" .
Stefan Reinauer261144c2006-07-27 23:29:02 +00001633.PP
Stefan Tauner4c723152016-01-14 22:47:55 +00001634This manual page was written by
1635.MTOB "uwe@hermann-uwe.de" "Uwe Hermann" ,
1636Carl-Daniel Hailfinger, Stefan Tauner and others.
Uwe Hermann42eb17f2008-01-18 17:48:51 +00001637It is licensed under the terms of the GNU GPL (version 2 or later).