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Stefan Tauner9e9f6842012-02-16 20:55:27 +00001.TH FLASHROM 8 "Feb 15, 2012"
Stefan Reinauer261144c2006-07-27 23:29:02 +00002.SH NAME
Uwe Hermann530cb2d2009-05-14 22:58:21 +00003flashrom \- detect, read, write, verify and erase flash chips
Stefan Reinauer261144c2006-07-27 23:29:02 +00004.SH SYNOPSIS
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00005.B flashrom \fR[\fB\-n\fR] [\fB\-V\fR] [\fB\-f\fR] [\fB\-h\fR|\fB\-R\fR|\
6\fB\-L\fR|\fB\-z\fR|\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\
7\fB\-v\fR <file>]
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +00008 [\fB\-c\fR <chipname>] \
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00009[\fB\-l\fR <file>]
10 [\fB\-i\fR <image>] [\fB\-p\fR <programmername>[:<parameters>]]
Stefan Reinauer261144c2006-07-27 23:29:02 +000011.SH DESCRIPTION
12.B flashrom
Uwe Hermanne8ba5382009-05-22 11:37:27 +000013is a utility for detecting, reading, writing, verifying and erasing flash
Uwe Hermann530cb2d2009-05-14 22:58:21 +000014chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
Uwe Hermann941a2732011-07-25 21:12:57 +000015using a supported mainboard. However, it also supports various external
16PCI/USB/parallel-port/serial-port based devices which can program flash chips,
17including some network cards (NICs), SATA/IDE controller cards, graphics cards,
18the Bus Pirate device, various FTDI FT2232/FT4232H based USB devices, and more.
Uwe Hermanne74b9f82009-04-10 14:41:29 +000019.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000020It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
Uwe Hermann941a2732011-07-25 21:12:57 +000021TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
22parallel flash, or SPI.
Stefan Reinauer261144c2006-07-27 23:29:02 +000023.SH OPTIONS
Uwe Hermann9ff514d2010-06-07 19:41:25 +000024.B IMPORTANT:
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000025Please note that the command line interface for flashrom will change before
26flashrom 1.0. Do not use flashrom in scripts or other automated tools without
Uwe Hermanne8ba5382009-05-22 11:37:27 +000027checking that your flashrom version won't interpret options in a different way.
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000028.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000029You can specify one of
30.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
31or no operation.
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000032If no operation is specified, flashrom will only probe for flash chips. It is
Michael Karcher31fd8252010-03-12 06:41:39 +000033recommended that if you try flashrom the first time on a system, you run it
Uwe Hermann941a2732011-07-25 21:12:57 +000034in probe-only mode and check the output. Also you are advised to make a
Uwe Hermann9ff514d2010-06-07 19:41:25 +000035backup of your current ROM contents with
36.B \-r
37before you try to write a new image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000038.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000039.B "\-r, \-\-read <file>"
40Read flash ROM contents and save them into the given
41.BR <file> .
Uwe Hermann941a2732011-07-25 21:12:57 +000042If the file already exists, it will be overwritten.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000043.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000044.B "\-w, \-\-write <file>"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000045Write
46.B <file>
Uwe Hermann9ff514d2010-06-07 19:41:25 +000047into flash ROM. This will first automatically
48.B erase
49the chip, then write to it.
Stefan Taunerac54fbe2011-07-21 19:52:00 +000050.sp
51In the process the chip is also read several times. First an in-memory backup
52is made for disaster recovery and to be able to skip regions that are
53already equal to the image file. This copy is updated along with the write
54operation. In case of erase errors it is even re-read completely. After
55writing has finished and if verification is enabled, the whole flash chip is
56read out and compared with the input image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000057.TP
Uwe Hermannea07f622009-06-24 17:31:08 +000058.B "\-n, \-\-noverify"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000059Skip the automatic verification of flash ROM contents after writing. Using this
Uwe Hermannea07f622009-06-24 17:31:08 +000060option is
61.B not
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000062recommended, you should only use it if you know what you are doing and if you
Uwe Hermannea07f622009-06-24 17:31:08 +000063feel that the time for verification takes too long.
64.sp
65Typical usage is:
Uwe Hermann9ff514d2010-06-07 19:41:25 +000066.B "flashrom \-n \-w <file>"
Uwe Hermannea07f622009-06-24 17:31:08 +000067.sp
68This option is only useful in combination with
69.BR \-\-write .
70.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000071.B "\-v, \-\-verify <file>"
72Verify the flash ROM contents against the given
73.BR <file> .
Stefan Reinauerde063bf2006-09-21 13:09:22 +000074.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +000075.B "\-E, \-\-erase"
Uwe Hermanne74b9f82009-04-10 14:41:29 +000076Erase the flash ROM chip.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000077.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +000078.B "\-V, \-\-verbose"
Uwe Hermann9ff514d2010-06-07 19:41:25 +000079More verbose output. This option can be supplied multiple times
Stefan Taunereebeb532011-08-04 17:40:25 +000080(max. 3 times, i.e.
81.BR \-VVV )
Uwe Hermann9ff514d2010-06-07 19:41:25 +000082for even more debug output.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000083.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +000084.B "\-c, \-\-chip" <chipname>
Uwe Hermann9ff514d2010-06-07 19:41:25 +000085Probe only for the specified flash ROM chip. This option takes the chip name as
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +000086printed by
87.B "flashrom \-L"
Uwe Hermann9ff514d2010-06-07 19:41:25 +000088without the vendor name as parameter. Please note that the chip name is
89case sensitive.
Joerg Mayer645c6df2010-03-13 14:47:48 +000090.TP
Joerg Mayer645c6df2010-03-13 14:47:48 +000091.B "\-f, \-\-force"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +000092Force one or more of the following actions:
Joerg Mayer645c6df2010-03-13 14:47:48 +000093.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +000094* Force chip read and pretend the chip is there.
95.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +000096* Force chip access even if the chip is bigger than the maximum supported \
Uwe Hermann9ff514d2010-06-07 19:41:25 +000097size for the flash bus.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +000098.sp
99* Force erase even if erase is known bad.
100.sp
101* Force write even if write is known bad.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000102.TP
103.B "\-l, \-\-layout <file>"
104Read ROM layout from
105.BR <file> .
Uwe Hermann87c07932009-05-05 16:15:46 +0000106.sp
107flashrom supports ROM layouts. This allows you to flash certain parts of
108the flash chip only. A ROM layout file looks like follows:
109.sp
110 00000000:00008fff gfxrom
111 00009000:0003ffff normal
112 00040000:0007ffff fallback
113.sp
114 i.e.:
115 startaddr:endaddr name
116.sp
117All addresses are offsets within the file, not absolute addresses!
118If you only want to update the normal image in a ROM you can say:
119.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000120.B " flashrom \-\-layout rom.layout \-\-image normal \-w agami_aruma.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000121.sp
122To update normal and fallback but leave the VGA BIOS alone, say:
123.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000124.B " flashrom \-l rom.layout \-i normal \"
Uwe Hermann87c07932009-05-05 16:15:46 +0000125.br
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000126.B " \-i fallback \-w agami_aruma.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000127.sp
128Currently overlapping sections are not supported.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000129.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000130.B "\-i, \-\-image <name>"
Uwe Hermann67808fe2007-10-18 00:29:05 +0000131Only flash image
132.B <name>
133from flash layout.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000134.TP
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000135.B "\-L, \-\-list\-supported"
Uwe Hermann941a2732011-07-25 21:12:57 +0000136List the flash chips, chipsets, mainboards, and external programmers
137(including PCI, USB, parallel port, and serial port based devices)
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000138supported by flashrom.
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000139.sp
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000140There are many unlisted boards which will work out of the box, without
141special support in flashrom. Please let us know if you can verify that
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000142other boards work or do not work out of the box.
143.sp
144.B IMPORTANT:
145For verification you have
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000146to test an ERASE and/or WRITE operation, so make sure you only do that
147if you have proper means to recover from failure!
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000148.TP
Uwe Hermann20a293f2009-06-19 10:42:43 +0000149.B "\-z, \-\-list\-supported-wiki"
150Same as
151.BR \-\-list\-supported ,
152but outputs the supported hardware in MediaWiki syntax, so that it can be
Uwe Hermann941a2732011-07-25 21:12:57 +0000153easily pasted into the wiki page at
154.BR http://www.flashrom.org/ .
155Please note that MediaWiki output is not compiled in by default.
Uwe Hermann20a293f2009-06-19 10:42:43 +0000156.TP
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000157.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Carl-Daniel Hailfingerce986772009-05-09 00:27:07 +0000158Specify the programmer device. Currently supported are:
159.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000160.BR "* internal" " (default, for in-system flashing in the mainboard)"
161.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000162.BR "* dummy" " (virtual programmer for testing flashrom)"
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000163.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000164.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
165.sp
Uwe Hermann829ed842010-05-24 17:39:14 +0000166.BR "* nicrealtek" " (for flash ROMs on Realtek network cards)"
167.sp
168.BR "* nicsmc1211" " (for flash ROMs on RTL8139-compatible SMC2 network cards)"
169.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000170.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
171cards)"
172.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000173.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000174.sp
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000175.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
176.sp
TURBO Jb0912c02009-09-02 23:00:46 +0000177.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
178.sp
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000179.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
180.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000181.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
182.sp
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000183.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
184.sp
Pete Batardc0207062011-06-11 12:21:37 +0000185.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H family \
Uwe Hermann314cfba2011-07-28 19:23:09 +0000186based USB SPI programmer), including the DLP Design DLP-USB1232H, \
187FTDI FT2232H Mini-Module, FTDI FT4232H Mini-Module, openbiosprog-spi, Amontec \
Steve Markgraf0528b7f2011-08-12 01:19:32 +0000188JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster, \
Samir Ibradžić7189a5f2011-10-20 23:14:10 +0000189Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, TIAO/DIYGADGET USB
190Multi-Protocol Adapter (TUMPA), and GOEPEL PicoTAP.
Paul Fox05dfbe62009-06-16 21:08:06 +0000191.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000192.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog), \
193including AVR flasher by Urja Rannikko, AVR flasher by eightdot, \
194Arduino Mega flasher by fritz, InSystemFlasher by Juhana Helovuo, and \
195atmegaXXu2-flasher by Stefan Tauner."
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000196.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000197.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000198.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000199.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
200.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000201.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport "
202or Xilinx DLC5 compatible cable)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000203.sp
Michael Karchere5449392012-05-05 20:53:59 +0000204.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
205bitbanging adapter)
206.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000207.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
Idwer Vollering004f4b72010-09-03 18:21:21 +0000208.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000209.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
Mark Marshall90021f22010-12-03 14:48:11 +0000210.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000211.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
212.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000213Some programmers have optional or mandatory parameters which are described
214in detail in the
215.B PROGRAMMER SPECIFIC INFO
216section. Support for some programmers can be disabled at compile time.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000217.B "flashrom \-h"
Michael Karchere5eafb22010-03-07 12:11:08 +0000218lists all supported programmers.
219.TP
220.B "\-h, \-\-help"
221Show a help text and exit.
222.TP
223.B "\-R, \-\-version"
224Show version information and exit.
225.SH PROGRAMMER SPECIFIC INFO
226Some programmer drivers accept further parameters to set programmer-specific
Uwe Hermann4e3d0b32010-03-25 23:18:41 +0000227parameters. These parameters are separated from the programmer name by a
Michael Karchere5eafb22010-03-07 12:11:08 +0000228colon. While some programmers take arguments at fixed positions, other
229programmers use a key/value interface in which the key and value is separated
230by an equal sign and different pairs are separated by a comma or a colon.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000231.SS
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000232.BR "internal " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000233.TP
234.B Board Enables
235.sp
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000236Some mainboards require to run mainboard specific code to enable flash erase
237and write support (and probe support on old systems with parallel flash).
238The mainboard brand and model (if it requires specific code) is usually
239autodetected using one of the following mechanisms: If your system is
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000240running coreboot, the mainboard type is determined from the coreboot table.
241Otherwise, the mainboard is detected by examining the onboard PCI devices
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000242and possibly DMI info. If PCI and DMI do not contain information to uniquely
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000243identify the mainboard (which is the exception), or if you want to override
244the detected mainboard model, you can specify the mainboard using the
245.sp
246.B " flashrom \-p internal:mainboard=[<vendor>:]<board>"
247syntax.
248.sp
249See the 'Known boards' or 'Known laptops' section in the output
250of 'flashrom \-L' for a list of boards which require the specification of
251the board name, if no coreboot table is found.
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000252.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000253Some of these board-specific flash enabling functions (called
254.BR "board enables" )
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000255in flashrom have not yet been tested. If your mainboard is detected needing
256an untested board enable function, a warning message is printed and the
257board enable is not executed, because a wrong board enable function might
258cause the system to behave erratically, as board enable functions touch the
259low-level internals of a mainboard. Not executing a board enable function
260(if one is needed) might cause detection or erasing failure. If your board
261protects only part of the flash (commonly the top end, called boot block),
262flashrom might encounter an error only after erasing the unprotected part,
263so running without the board-enable function might be dangerous for erase
264and write (which includes erase).
265.sp
266The suggested procedure for a mainboard with untested board specific code is
267to first try to probe the ROM (just invoke flashrom and check that it
268detects your flash chip type) without running the board enable code (i.e.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000269without any parameters). If it finds your chip, fine. Otherwise, retry
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000270probing your chip with the board-enable code running, using
271.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000272.B " flashrom \-p internal:boardenable=force"
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000273.sp
274If your chip is still not detected, the board enable code seems to be broken
275or the flash chip unsupported. Otherwise, make a backup of your current ROM
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000276contents (using
277.BR \-r )
278and store it to a medium outside of your computer, like
279a USB drive or a network share. If you needed to run the board enable code
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000280already for probing, use it for reading too. Now you can try to write the
281new image. You should enable the board enable code in any case now, as it
282has been written because it is known that writing/erasing without the board
283enable is going to fail. In any case (success or failure), please report to
284the flashrom mailing list, see below.
285.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000286.TP
287.B Coreboot
288.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000289On systems running coreboot, flashrom checks whether the desired image matches
290your mainboard. This needs some special board ID to be present in the image.
291If flashrom detects that the image you want to write and the current board
292do not match, it will refuse to write the image unless you specify
293.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000294.B " flashrom \-p internal:boardmismatch=force"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000295.TP
296.B ITE IT87 Super I/O
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000297.sp
Carl-Daniel Hailfinger01f3ef42010-03-25 02:50:40 +0000298If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000299translation, flashrom should autodetect that configuration. If you want to
300set the I/O base port of the IT87 series SPI controller manually instead of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000301using the value provided by the BIOS, use the
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000302.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000303.B " flashrom \-p internal:it87spiport=portnum"
304.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000305syntax where
306.B portnum
307is the I/O port number (must be a multiple of 8). In the unlikely case
308flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
309report so we can diagnose the problem.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000310.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000311.TP
312.B Intel chipsets
313.sp
Stefan Tauner50e7c602011-11-08 10:55:54 +0000314If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
315attached, and if a valid descriptor was written to it (e.g. by the vendor), the
316chipset provides an alternative way to access the flash chip(s) named
317.BR "Hardware Sequencing" .
318It is much simpler than the normal access method (called
319.BR "Software Sequencing" "),"
320but does not allow the software to choose the SPI commands to be sent.
321You can use the
322.sp
323.B " flashrom \-p internal:ich_spi_mode=value"
324.sp
325syntax where value can be
326.BR auto ", " swseq " or " hwseq .
327By default
328.RB "(or when setting " ich_spi_mode=auto )
329the module tries to use swseq and only activates hwseq if need be (e.g. if
330important opcodes are inaccessible due to lockdown; or if more than one flash
331chip is attached). The other options (swseq, hwseq) select the respective mode
332(if possible).
333.sp
Stefan Tauner5210e722012-02-16 01:13:00 +0000334ICH8 and later southbridges may also have locked address ranges of different
335kinds if a valid descriptor was written to it. The flash address space is then
336partitioned in multiple so called "Flash Regions" containing the host firmware,
337the ME firmware and so on respectively. The flash descriptor can also specify up
338to 5 so called "Protected Regions", which are freely chosen address ranges
339independent from the aforementioned "Flash Regions". All of them can be write
340and/or read protected individually. If flashrom detects such a lock it will
341disable write support unless the user forces it with the
342.sp
343.B " flashrom \-p internal:ich_spi_force=yes"
344.sp
345syntax. If this leads to erase or write accesses to the flash it would most
346probably bring it into an inconsistent and unbootable state and we will not
347provide any support in such a case.
348.sp
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000349If you have an Intel chipset with an ICH6 or later southbridge and if you want
350to set specific IDSEL values for a non-default flash chip or an embedded
351controller (EC), you can use the
352.sp
353.B " flashrom \-p internal:fwh_idsel=value"
354.sp
355syntax where value is the 48-bit hexadecimal raw value to be written in the
356IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
357each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
358use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
359The rightmost hex digit corresponds with the lowest address range. All address
360ranges have a corresponding sister range 4 MB below with identical IDSEL
361settings. The default value for ICH7 is given in the example below.
362.sp
363Example:
364.B "flashrom \-p internal:fwh_idsel=0x001122334567"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000365.TP
366.B Laptops
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000367.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000368Using flashrom on laptops is dangerous and may easily make your hardware
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000369unusable (see also the
370.B BUGS
371section). The embedded controller (EC) in these
372machines often interacts badly with flashing.
373.B http://www.flashrom.org/Laptops
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000374has more information. For example the EC firmware sometimes resides on the same
375flash chip as the host firmware. While flashrom tries to change the contents of
376that memory the EC might need to fetch new instructions or data from it and
377could stop working correctly. Probing for and reading from the chip may also
378irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
379other nasty effects. flashrom will attempt to detect if it is running on a
380laptop and abort immediately for safety reasons if it clearly identifies the
381host computer as one. If you want to proceed anyway at your own risk, use
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000382.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000383.B " flashrom \-p internal:laptop=force_I_want_a_brick"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000384.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000385We will not help you if you force flashing on a laptop because this is a really
386dumb idea.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000387.sp
388You have been warned.
389.sp
390Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
391laptops. Some vendors did not implement those bits correctly or set them to
392generic and/or dummy values. flashrom will then issue a warning and bail out
393like above. In this case you can use
394.sp
395.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
396.sp
397to tell flashrom (at your own risk) that it does not running on a laptop.
398.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000399.BR "dummy " programmer
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000400The dummy programmer operates on a buffer in memory only. It provides a safe
401and fast way to test various aspects of flashrom and is mainly used in
402development and while debugging.
403.sp
404It is able to emulate some chips to a certain degree (basic
405identify/read/erase/write operations work).
406.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000407An optional parameter specifies the bus types it
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000408should support. For that you have to use the
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000409.sp
410.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
411.sp
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000412syntax where
413.B type
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000414can be
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000415.BR parallel ", " lpc ", " fwh ", " spi
416in any order. If you specify bus without type, all buses will be disabled.
417If you do not specify bus, all buses will be enabled.
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000418.sp
419Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000420.B "flashrom \-p dummy:bus=lpc+fwh"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000421.sp
422The dummy programmer supports flash chip emulation for automated self-tests
423without hardware access. If you want to emulate a flash chip, use the
424.sp
425.B " flashrom \-p dummy:emulate=chip"
426.sp
427syntax where
428.B chip
429is one of the following chips (please specify only the chip name, not the
430vendor):
431.sp
432.RB "* ST " M25P10.RES " SPI flash chip (RES, page write)"
433.sp
434.RB "* SST " SST25VF040.REMS " SPI flash chip (REMS, byte write)"
435.sp
436.RB "* SST " SST25VF032B " SPI flash chip (RDID, AAI write)"
437.sp
Stefan Tauner0b9df972012-05-07 22:12:16 +0000438.RB "* Macronix " MX25L6436 " SPI flash chip (RDID, SFDP)"
439.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000440Example:
441.B "flashrom -p dummy:emulate=SST25VF040.REMS"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000442.TP
443.B Persistent images
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000444.sp
445If you use flash chip emulation, flash image persistence is available as well
446by using the
447.sp
448.B " flashrom \-p dummy:emulate=chip,image=image.rom"
449.sp
450syntax where
451.B image.rom
452is the file where the simulated chip contents are read on flashrom startup and
453where the chip contents on flashrom shutdown are written to.
454.sp
455Example:
456.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000457.TP
458.B SPI write chunk size
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000459.sp
460If you use SPI flash chip emulation for a chip which supports SPI page write
461with the default opcode, you can set the maximum allowed write chunk size with
462the
463.sp
464.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
465.sp
466syntax where
467.B size
468is the number of bytes (min. 1, max. 256).
469.sp
470Example:
471.sp
472.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000473.TP
474.B SPI blacklist
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000475.sp
476To simulate a programmer which refuses to send certain SPI commands to the
477flash chip, you can specify a blacklist of SPI commands with the
478.sp
479.B " flashrom -p dummy:spi_blacklist=commandlist"
480.sp
481syntax where commandlist is a list of two-digit hexadecimal representations of
482SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI
483controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
484commandlist may be up to 512 characters (256 commands) long.
485Implementation note: flashrom will detect an error during command execution.
486.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000487.TP
488.B SPI ignorelist
489.sp
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000490To simulate a flash chip which ignores (doesn't support) certain SPI commands,
491you can specify an ignorelist of SPI commands with the
492.sp
493.B " flashrom -p dummy:spi_ignorelist=commandlist"
494.sp
495syntax where commandlist is a list of two-digit hexadecimal representations of
496SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
497command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
498characters (256 commands) long.
499Implementation note: flashrom won't detect an error during command execution.
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000500.sp
501.TP
502.B SPI status register
503.sp
504You can specify the initial content of the chip's status register with the
505.sp
506.B " flashrom -p dummy:spi_status=content"
507.sp
508syntax where content is an 8-bit hexadecimal value.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000509.SS
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000510.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
511" , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
512" , " satamv" ", and " atahpt " programmers
Michael Karchere5eafb22010-03-07 12:11:08 +0000513These programmers have an option to specify the PCI address of the card
514your want to use, which must be specified if more than one card supported
515by the selected programmer is installed in your system. The syntax is
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000516.sp
517.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
518.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000519where
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000520.B xxxx
521is the name of the programmer
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000522.B bb
523is the PCI bus number,
524.B dd
525is the PCI device number, and
526.B f
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000527is the PCI function number of the desired device.
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000528.sp
529Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000530.B "flashrom \-p nic3com:pci=05:04.0"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000531.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000532.BR "ft2232_spi " programmer
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000533An optional parameter specifies the controller
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000534type and interface/port it should support. For that you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000535.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000536.B " flashrom \-p ft2232_spi:type=model,port=interface"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000537.sp
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000538syntax where
539.B model
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000540can be
Steve Markgraf0528b7f2011-08-12 01:19:32 +0000541.BR 2232H ", " 4232H ", " jtagkey ", " busblaster ", " openmoko ", " \
Uwe Hermann836b26a2011-10-14 20:33:14 +0000542arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
Samir Ibradžić7189a5f2011-10-20 23:14:10 +0000543", " tumpa ", or " picotap
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000544and
545.B interface
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000546can be
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000547.BR A ", or " B .
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000548The default model is
549.B 4232H
550and the default interface is
551.BR B .
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000552.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000553.BR "serprog " programmer
554A mandatory parameter specifies either a serial
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000555device/baud combination or an IP/port combination for communication with the
Michael Karchere5eafb22010-03-07 12:11:08 +0000556programmer. In the device/baud combination, the device has to start with a
557slash. For serial, you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000558.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000559.B " flashrom \-p serprog:dev=/dev/device:baud"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000560.sp
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000561syntax and for IP, you have to use
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000562.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000563.B " flashrom \-p serprog:ip=ipaddr:port"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000564.sp
565instead. More information about serprog is available in
566.B serprog-protocol.txt
567in the source distribution.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000568.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000569.BR "buspirate_spi " programmer
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000570A required
571.B dev
572parameter specifies the Bus Pirate device node and an optional
573.B spispeed
574parameter specifies the frequency of the SPI bus. The parameter
Michael Karchere5eafb22010-03-07 12:11:08 +0000575delimiter is a comma. Syntax is
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000576.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000577.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
Michael Karchere5eafb22010-03-07 12:11:08 +0000578.sp
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000579where
580.B frequency
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000581can be
582.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
Michael Karchere5eafb22010-03-07 12:11:08 +0000583(in Hz). The default is the maximum frequency of 8 MHz.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000584.SS
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000585.BR "dediprog " programmer
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000586An optional
587.B voltage
588parameter specifies the voltage the Dediprog should use. The default unit is
589Volt if no unit is specified. You can use
590.BR mV ", " milliVolt ", " V " or " Volt
591as unit specifier. Syntax is
592.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000593.B " flashrom \-p dediprog:voltage=value"
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000594.sp
595where
596.B value
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000597can be
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000598.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
599or the equivalent in mV.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000600.SS
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000601.BR "rayer_spi " programmer
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000602The default I/O base address used for the parallel port is 0x378 and you can use
603the optional
604.B iobase
605parameter to specify an alternate base I/O address with the
606.sp
607.B " flashrom \-p rayer_spi:iobase=baseaddr"
608.sp
609syntax where
610.B baseaddr
611is base I/O port address of the parallel port, which must be a multiple of
612four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
613.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000614The default cable type is the RayeR cable. You can use the optional
615.B type
616parameter to specify the cable type with the
617.sp
618.B " flashrom \-p rayer_spi:type=model"
619.sp
620syntax where
621.B model
622can be
623.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III
624(DLC 5).
625.sp
626More information about the RayeR hardware is available at
627.BR "http://rayer.ic.cz/elektro/spipgm.htm " .
628The schematic of the Xilinx DLC 5 was published at
629.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000630.SS
Michael Karchere5449392012-05-05 20:53:59 +0000631.BR "pony_spi " programmer
632The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
633specified using the mandatory
634.B dev
635parameter. The adapter type is selectable between SI-Prog (used for
636SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer
637named "serbang". The optional
638.B type
639parameter accepts the values "si_prog" (default) or "serbang".
640.sp
641Information about the SI-Prog adapter can be found at
642.BR "http://www.lancos.com/siprogsch.html " .
643.sp
644An example call to flashrom is
645.sp
646.B " flashrom \-p pony_spi:dev=/dev/ttyS0,type=serbang"
647.sp
648Please note that while USB-to-serial adapters work under certain circumstances,
649this slows down operation considerably.
650.SS
Mark Marshall90021f22010-12-03 14:48:11 +0000651.BR "ogp_spi " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000652The flash ROM chip to access must be specified with the
Mark Marshall90021f22010-12-03 14:48:11 +0000653.B rom
654parameter.
655.sp
656.B " flashrom \-p ogp_spi:rom=name"
657.sp
658Where
659.B name
660is either
661.B cprom
662or
663.B s3
664for the configuration ROM and
665.B bprom
666or
667.B bios
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000668for the BIOS ROM. If more than one card supported by the ogp_spi programmer
Mark Marshall90021f22010-12-03 14:48:11 +0000669is installed in your system, you have to specify the PCI address of the card
670you want to use with the
671.B pci=
672parameter as explained in the
673.B nic3com
674section above.
675.sp
676More information about the hardware is available at
Uwe Hermann941a2732011-07-25 21:12:57 +0000677.BR http://wiki.opengraphics.org .
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000678.SS
679.BR "linux_spi " programmer
680You have to specify the SPI controller to use with the
681.sp
682.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y"
683.sp
684syntax where
685.B /dev/spidevX.Y
686is the Linux device node for your SPI controller.
687.sp
688Please note that the linux_spi driver only works on Linux.
Peter Stuge42688e52009-01-26 02:20:56 +0000689.SH EXIT STATUS
690flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
691(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000692.SH REQUIREMENTS
693flashrom needs different access permissions for different programmers.
694.sp
695.B internal
696needs raw memory access, PCI configuration space access, raw I/O port
697access (x86) and MSR access (x86).
698.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000699.BR nic3com ", " nicrealtek ", " nicsmc1211 " and " nicnatsemi "
700need PCI configuration space read access and raw I/O port access.
701.sp
702.B atahpt
703needs PCI configuration space access and raw I/O port access.
704.sp
705.BR gfxnvidia " and " drkaiser
706need PCI configuration space access and raw memory access.
707.sp
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000708.B rayer_spi
709needs raw I/O port access.
710.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000711.B satasii
712needs PCI configuration space read access and raw memory access.
713.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000714.B satamv
715needs PCI configuration space read access, raw I/O port access and raw memory
716access.
717.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000718.B serprog
719needs TCP access to the network or userspace access to a serial port.
720.sp
721.B buspirate_spi
722needs userspace access to a serial port.
723.sp
724.BR dediprog " and " ft2232_spi
725need access to the USB device via libusb.
726.sp
727.B dummy
728needs no access permissions at all.
729.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000730.BR internal ", " nic3com ", " nicrealtek ", " nicsmc1211 ", " nicnatsemi ", "
731.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv " and " atahpt
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000732have to be run as superuser/root, and need additional raw access permission.
733.sp
734.BR serprog ", " buspirate_spi ", " dediprog " and " ft2232_spi
735can be run as normal user on most operating systems if appropriate device
736permissions are set.
737.sp
Mark Marshall90021f22010-12-03 14:48:11 +0000738.B ogp
739needs PCI configuration space read access and raw memory access.
740.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +0000741On OpenBSD, you can obtain raw access permission by setting
Uwe Hermann941a2732011-07-25 21:12:57 +0000742.B "securelevel=-1"
743in
744.B "/etc/rc.securelevel"
745and rebooting, or rebooting into single user mode.
Stefan Reinauer261144c2006-07-27 23:29:02 +0000746.SH BUGS
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000747Please report any bugs to the flashrom mailing list at
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000748.B "<flashrom@flashrom.org>"
749.sp
750We recommend to subscribe first at
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000751.sp
752.B " http://www.flashrom.org/mailman/listinfo/flashrom"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000753.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000754Many of the developers communicate via the
755.B "#flashrom"
756IRC channel on
757.BR chat.freenode.net .
758You are welcome to join and ask questions, send us bug and success reports there
759too. Please provide a way to contact you later (e.g. a mail address) and be
760patient if there is no immediate reaction. Also, we provide a pastebin service
761at
762.B http://paste.flashrom.org
763that is very useful when you want to share logs etc. without spamming the
764channel.
765.SS
766.B Laptops
767.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000768Using flashrom on laptops is dangerous and may easily make your hardware
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000769unusable. flashrom will attempt to detect if it is running on a laptop and abort
770immediately for safety reasons. Please see the detailed discussion of this topic
771and associated flashrom options in the
772.B Laptops
773paragraph in the
774.B internal programmer
775subsection of the
776.B PROGRAMMER SPECIFIC INFO
777section.
Uwe Hermann941a2732011-07-25 21:12:57 +0000778.B " http://www.flashrom.org/Laptops"
Daniel Lenski65922a32012-02-15 23:40:23 +0000779.SS
780One-time programmable (OTP) memory and unique IDs
781.sp
782Some flash chips contain OTP memory often denoted as "security registers".
783They usually have a capacity in the range of some bytes to a few hundred
784bytes and can be used to give devices unique IDs etc. flashrom is not able
785to read or write these memories and may therefore not be able to duplicate a
786chip completely. For chip types known to include OTP memories a warning is
787printed when they are detected.
788.sp
789Similar to OTP memories are unique, factory programmed, unforgeable IDs.
790They are not modifiable by the user at all.
Stefan Taunerac54fbe2011-07-21 19:52:00 +0000791.SH LICENSE
Stefan Reinauer261144c2006-07-27 23:29:02 +0000792.B flashrom
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000793is covered by the GNU General Public License (GPL), version 2. Some files are
794additionally available under the GPL (version 2, or any later version).
Stefan Reinauer261144c2006-07-27 23:29:02 +0000795.SH COPYRIGHT
Stefan Reinauer261144c2006-07-27 23:29:02 +0000796.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000797Please see the individual files.
Stefan Reinauer261144c2006-07-27 23:29:02 +0000798.SH AUTHORS
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000799Andrew Morgan
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000800.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000801Carl-Daniel Hailfinger
802.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000803Claus Gindhart
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000804.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000805David Borg
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000806.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000807David Hendricks
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000808.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000809Dominik Geyer
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000810.br
Stefan Reinaueredc61882010-01-03 14:40:30 +0000811Eric Biederman
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000812.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000813Giampiero Giancipoli
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000814.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000815Helge Wagner
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000816.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000817Idwer Vollering
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000818.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000819Joe Bao
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000820.br
Stefan Taunerc0aaf952011-05-19 02:58:17 +0000821Joerg Fischer
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000822.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000823Joshua Roys
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000824.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000825Luc Verhaegen
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000826.br
Carl-Daniel Hailfinger451dc802009-05-01 11:00:39 +0000827Li-Ta Lo
828.br
Mark Marshall90021f22010-12-03 14:48:11 +0000829Mark Marshall
830.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000831Markus Boas
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000832.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000833Mattias Mattsson
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000834.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000835Michael Karcher
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000836.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000837Nikolay Petukhov
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000838.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000839Patrick Georgi
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000840.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000841Peter Lemenkov
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000842.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000843Peter Stuge
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000844.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000845Reinder E.N. de Haan
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000846.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000847Ronald G. Minnich
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000848.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000849Ronald Hoogenboom
Stefan Reinauer261144c2006-07-27 23:29:02 +0000850.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000851Sean Nelson
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000852.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000853Stefan Reinauer
Stefan Reinauer261144c2006-07-27 23:29:02 +0000854.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000855Stefan Tauner
856.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000857Stefan Wildemann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000858.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000859Stephan Guilloux
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000860.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000861Steven James
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000862.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000863Uwe Hermann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000864.br
Stefan Reinaueredc61882010-01-03 14:40:30 +0000865Wang Qingpei
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +0000866.br
Stefan Reinaueredc61882010-01-03 14:40:30 +0000867Yinghai Lu
Stefan Reinauerf8337dd2006-08-03 10:49:09 +0000868.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000869some others, please see the flashrom svn changelog for details.
870.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000871All authors can be reached via email at <flashrom@flashrom.org>.
Stefan Reinauer261144c2006-07-27 23:29:02 +0000872.PP
Stefan Taunerac54fbe2011-07-21 19:52:00 +0000873This manual page was written by Uwe Hermann <uwe@hermann-uwe.de>,
874Carl-Daniel Hailfinger and others.
Uwe Hermann42eb17f2008-01-18 17:48:51 +0000875It is licensed under the terms of the GNU GPL (version 2 or later).