blob: 27f38465aaca3dad46542a802f5535d397e646a8 [file] [log] [blame]
Stefan Tauner4c723152016-01-14 22:47:55 +00001.\" Load the www device when using groff; provide a fallback for groff's MTO macro that formats email addresses.
2.ie \n[.g] \
3. mso www.tmac
Stefan Tauner0be072c2016-03-13 15:16:30 +00004.el \{
5. de MTO
6 \\$2 \(la\\$1 \(ra\\$3 \
Stefan Tauner4c723152016-01-14 22:47:55 +00007. .
Stefan Tauner0be072c2016-03-13 15:16:30 +00008.\}
Stefan Tauner4c723152016-01-14 22:47:55 +00009.\" Create wrappers for .MTO and .URL that print only text on systems w/o groff or if not outputting to a HTML
10.\" device. To that end we need to distinguish HTML output on groff from other configurations first.
11.nr groffhtml 0
12.if \n[.g] \
13. if "\*[.T]"html" \
14. nr groffhtml 1
15.\" For code reuse it would be nice to have a single wrapper that gets its target macro as parameter.
16.\" However, this did not work out with NetBSD's and OpenBSD's groff...
17.de URLB
18. ie (\n[groffhtml]==1) \{\
19. URL \\$@
20. \}
21. el \{\
22. ie "\\$2"" \{\
23. BR "\\$1" "\\$3"
24. \}
25. el \{\
26. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
27. \}
28. \}
29..
30.de MTOB
31. ie (\n[groffhtml]==1) \{\
32. MTO \\$@
33. \}
34. el \{\
35. ie "\\$2"" \{\
36. BR "\\$1" "\\$3"
37. \}
38. el \{\
39. RB "\\$2 \(la" "\\$1" "\(ra\\$3"
40. \}
41. \}
42..
Joerg Mayera93d9dc2013-08-29 00:38:19 +000043.TH FLASHROM 8 "" ""
Stefan Reinauer261144c2006-07-27 23:29:02 +000044.SH NAME
Uwe Hermann530cb2d2009-05-14 22:58:21 +000045flashrom \- detect, read, write, verify and erase flash chips
Stefan Reinauer261144c2006-07-27 23:29:02 +000046.SH SYNOPSIS
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100047.B flashrom \fR[\fB\-h\fR|\fB\-R\fR|\fB\-L\fR|\fB\-z\fR|
48 \fB\-p\fR <programmername>[:<parameters>] [\fB\-c\fR <chipname>]
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +100049 (\fB\-\-flash\-name\fR|\fB\-\-flash\-size\fR|
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +100050 [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>]
51 [(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>) [\fB\-i\fR <image>]]
52 [\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])]
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +000053 [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
Stefan Reinauer261144c2006-07-27 23:29:02 +000054.SH DESCRIPTION
55.B flashrom
Uwe Hermanne8ba5382009-05-22 11:37:27 +000056is a utility for detecting, reading, writing, verifying and erasing flash
Uwe Hermann530cb2d2009-05-14 22:58:21 +000057chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
Uwe Hermann941a2732011-07-25 21:12:57 +000058using a supported mainboard. However, it also supports various external
59PCI/USB/parallel-port/serial-port based devices which can program flash chips,
60including some network cards (NICs), SATA/IDE controller cards, graphics cards,
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +000061the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
Uwe Hermanne74b9f82009-04-10 14:41:29 +000062.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000063It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
Uwe Hermann941a2732011-07-25 21:12:57 +000064TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
65parallel flash, or SPI.
Stefan Reinauer261144c2006-07-27 23:29:02 +000066.SH OPTIONS
Uwe Hermann9ff514d2010-06-07 19:41:25 +000067.B IMPORTANT:
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000068Please note that the command line interface for flashrom will change before
69flashrom 1.0. Do not use flashrom in scripts or other automated tools without
Uwe Hermanne8ba5382009-05-22 11:37:27 +000070checking that your flashrom version won't interpret options in a different way.
Carl-Daniel Hailfinger5de93412009-05-01 10:53:49 +000071.PP
Uwe Hermann9ff514d2010-06-07 19:41:25 +000072You can specify one of
73.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
74or no operation.
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000075If no operation is specified, flashrom will only probe for flash chips. It is
Michael Karcher31fd8252010-03-12 06:41:39 +000076recommended that if you try flashrom the first time on a system, you run it
Uwe Hermann941a2732011-07-25 21:12:57 +000077in probe-only mode and check the output. Also you are advised to make a
Uwe Hermann9ff514d2010-06-07 19:41:25 +000078backup of your current ROM contents with
79.B \-r
Stefan Taunere34e3e82013-01-01 00:06:51 +000080before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the
81.B -p/--programmer
82option to be used (please see below).
Stefan Reinauerde063bf2006-09-21 13:09:22 +000083.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000084.B "\-r, \-\-read <file>"
85Read flash ROM contents and save them into the given
86.BR <file> .
Uwe Hermann941a2732011-07-25 21:12:57 +000087If the file already exists, it will be overwritten.
Stefan Reinauerde063bf2006-09-21 13:09:22 +000088.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +000089.B "\-w, \-\-write <file>"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +000090Write
91.B <file>
Uwe Hermann9ff514d2010-06-07 19:41:25 +000092into flash ROM. This will first automatically
93.B erase
94the chip, then write to it.
Stefan Taunerac54fbe2011-07-21 19:52:00 +000095.sp
96In the process the chip is also read several times. First an in-memory backup
97is made for disaster recovery and to be able to skip regions that are
98already equal to the image file. This copy is updated along with the write
99operation. In case of erase errors it is even re-read completely. After
100writing has finished and if verification is enabled, the whole flash chip is
101read out and compared with the input image.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000102.TP
Uwe Hermannea07f622009-06-24 17:31:08 +0000103.B "\-n, \-\-noverify"
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000104Skip the automatic verification of flash ROM contents after writing. Using this
Uwe Hermannea07f622009-06-24 17:31:08 +0000105option is
106.B not
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000107recommended, you should only use it if you know what you are doing and if you
Uwe Hermannea07f622009-06-24 17:31:08 +0000108feel that the time for verification takes too long.
109.sp
110Typical usage is:
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000111.B "flashrom \-p prog \-n \-w <file>"
Uwe Hermannea07f622009-06-24 17:31:08 +0000112.sp
113This option is only useful in combination with
114.BR \-\-write .
115.TP
Nico Huber99d15952016-05-02 16:54:24 +0200116.B "\-N, \-\-noverify-all"
117Skip not included regions during automatic verification after writing (cf.
118.BR "\-l " "and " "\-i" ).
119You should only use this option if you are sure that communication with
120the flash chip is reliable (e.g. when using the
121.BR internal
122programmer). Even if flashrom is instructed not to touch parts of the
123flash chip, their contents could be damaged (e.g. due to misunderstood
124erase commands).
125.sp
126This option is required to flash an Intel system with locked ME flash
127region using the
128.BR internal
129programmer. It may be enabled by default in this case in the future.
130.TP
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000131.B "\-v, \-\-verify <file>"
132Verify the flash ROM contents against the given
133.BR <file> .
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000134.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000135.B "\-E, \-\-erase"
Uwe Hermanne74b9f82009-04-10 14:41:29 +0000136Erase the flash ROM chip.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000137.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000138.B "\-V, \-\-verbose"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000139More verbose output. This option can be supplied multiple times
Stefan Taunereebeb532011-08-04 17:40:25 +0000140(max. 3 times, i.e.
141.BR \-VVV )
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000142for even more debug output.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000143.TP
Stefan Reinauer261144c2006-07-27 23:29:02 +0000144.B "\-c, \-\-chip" <chipname>
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000145Probe only for the specified flash ROM chip. This option takes the chip name as
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000146printed by
147.B "flashrom \-L"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000148without the vendor name as parameter. Please note that the chip name is
149case sensitive.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000150.TP
Joerg Mayer645c6df2010-03-13 14:47:48 +0000151.B "\-f, \-\-force"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000152Force one or more of the following actions:
Joerg Mayer645c6df2010-03-13 14:47:48 +0000153.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000154* Force chip read and pretend the chip is there.
155.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000156* Force chip access even if the chip is bigger than the maximum supported \
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000157size for the flash bus.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000158.sp
159* Force erase even if erase is known bad.
160.sp
161* Force write even if write is known bad.
Joerg Mayer645c6df2010-03-13 14:47:48 +0000162.TP
163.B "\-l, \-\-layout <file>"
164Read ROM layout from
165.BR <file> .
Uwe Hermann87c07932009-05-05 16:15:46 +0000166.sp
167flashrom supports ROM layouts. This allows you to flash certain parts of
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000168the flash chip only. A ROM layout file contains multiple lines with the
169following syntax:
170.sp
171.B " startaddr:endaddr imagename"
172.sp
173.BR "startaddr " "and " "endaddr "
174are hexadecimal addresses within the ROM file and do not refer to any
175physical address. Please note that using a 0x prefix for those hexadecimal
176numbers is not necessary, but you can't specify decimal/octal numbers.
177.BR "imagename " "is an arbitrary name for the region/image from"
178.BR " startaddr " "to " "endaddr " "(both addresses included)."
179.sp
180Example:
Uwe Hermann87c07932009-05-05 16:15:46 +0000181.sp
182 00000000:00008fff gfxrom
183 00009000:0003ffff normal
184 00040000:0007ffff fallback
185.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000186If you only want to update the image named
187.BR "normal " "in a ROM based on the layout above, run"
Uwe Hermann87c07932009-05-05 16:15:46 +0000188.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000189.B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000190.sp
Stefan Taunere34e3e82013-01-01 00:06:51 +0000191To update only the images named
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000192.BR "normal " "and " "fallback" ", run:"
Uwe Hermann87c07932009-05-05 16:15:46 +0000193.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000194.B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom"
Uwe Hermann87c07932009-05-05 16:15:46 +0000195.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000196Overlapping sections are not supported.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000197.TP
Arthur Heymansc82900b2018-01-10 12:48:16 +0100198.B "\-\-fmap"
199Read layout from fmap in flash chip.
200.sp
201flashrom supports the fmap binary format which is commonly used by coreboot
202for partitioning a flash chip. The on-chip fmap will be read and used to generate
203the layout.
204.sp
205If you only want to update the
206.BR "COREBOOT"
207region defined in the fmap, run
208.sp
209.B " flashrom -p prog \-\-fmap \-\-image COREBOOT \-w some.rom"
210.TP
211.B "\-\-fmap-file <file>"
212Read layout from a
213.BR <file>
214containing binary fmap (e.g. coreboot roms).
215.sp
216flashrom supports the fmap binary format which is commonly used by coreboot
217for partitioning a flash chip. The fmap in the specified file will be read and
218used to generate the layout.
219.sp
220If you only want to update the
221.BR "COREBOOT"
222region defined in the binary fmap file, run
223.sp
224.B " flashrom \-p prog \-\-fmap-file some.rom \-\-image COREBOOT \-w some.rom"
225.TP
Nico Huber305f4172013-06-14 11:55:26 +0200226.B "\-\-ifd"
227Read ROM layout from Intel Firmware Descriptor.
228.sp
229flashrom supports ROM layouts given by an Intel Firmware Descriptor
230(IFD). The on-chip descriptor will be read and used to generate the
231layout. If you need to change the layout, you have to update the IFD
232only first.
233.sp
234The following ROM images may be present in an IFD:
235.sp
236 fd the IFD itself
237 bios the host firmware aka. BIOS
238 me Intel Management Engine firmware
239 gbe gigabit ethernet firmware
240 pd platform specific data
241.TP
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000242.B "\-i, \-\-image <imagename>"
243Only flash region/image
244.B <imagename>
Uwe Hermann67808fe2007-10-18 00:29:05 +0000245from flash layout.
Stefan Reinauerde063bf2006-09-21 13:09:22 +0000246.TP
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +1000247.B "\-\-flash\-name"
248Prints out the detected flash chips name.
249.TP
Edward O'Callaghan7d6b5262019-09-23 22:53:14 +1000250.B "\-\-flash\-size"
251Prints out the detected flash chips size.
252.TP
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000253.B "\-L, \-\-list\-supported"
Uwe Hermann941a2732011-07-25 21:12:57 +0000254List the flash chips, chipsets, mainboards, and external programmers
255(including PCI, USB, parallel port, and serial port based devices)
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000256supported by flashrom.
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000257.sp
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000258There are many unlisted boards which will work out of the box, without
259special support in flashrom. Please let us know if you can verify that
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000260other boards work or do not work out of the box.
261.sp
262.B IMPORTANT:
263For verification you have
Uwe Hermanne8ba5382009-05-22 11:37:27 +0000264to test an ERASE and/or WRITE operation, so make sure you only do that
265if you have proper means to recover from failure!
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000266.TP
Uwe Hermann20a293f2009-06-19 10:42:43 +0000267.B "\-z, \-\-list\-supported-wiki"
268Same as
269.BR \-\-list\-supported ,
270but outputs the supported hardware in MediaWiki syntax, so that it can be
Stefan Tauner4c723152016-01-14 22:47:55 +0000271easily pasted into the
272.URLB https://flashrom.org/Supported_hardware "supported hardware wiki page" .
Uwe Hermann941a2732011-07-25 21:12:57 +0000273Please note that MediaWiki output is not compiled in by default.
Uwe Hermann20a293f2009-06-19 10:42:43 +0000274.TP
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000275.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000276Specify the programmer device. This is mandatory for all operations
277involving any chip access (probe/read/write/...). Currently supported are:
Carl-Daniel Hailfingerce986772009-05-09 00:27:07 +0000278.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000279.BR "* internal" " (for in-system flashing in the mainboard)"
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000280.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000281.BR "* dummy" " (virtual programmer for testing flashrom)"
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000282.sp
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000283.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
284.sp
Sergey Lichack98f47102012-08-27 01:24:15 +0000285.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)"
Uwe Hermann829ed842010-05-24 17:39:14 +0000286.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000287.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
288cards)"
289.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000290.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000291.sp
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000292.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
293.sp
TURBO Jb0912c02009-09-02 23:00:46 +0000294.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
295.sp
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000296.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
297.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000298.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
299.sp
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000300.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
301.sp
Stefan Tauner4f094752014-06-01 22:36:30 +0000302.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)"
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000303.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000304.BR "* atapromise" " (for flash ROMs on Promise PDC2026x ATA/RAID controllers)"
305.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000306.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)"
307.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +0000308.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).
Paul Fox05dfbe62009-06-16 21:08:06 +0000309.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000310.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog, \
Stefan Tauner0be072c2016-03-13 15:16:30 +0000311including some Arduino-based devices)."
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000312.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000313.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000314.sp
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000315.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
316.sp
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000317.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000318.sp
Michael Karchere5449392012-05-05 20:53:59 +0000319.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
320bitbanging adapter)
321.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000322.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
Idwer Vollering004f4b72010-09-03 18:21:21 +0000323.sp
Uwe Hermann314cfba2011-07-28 19:23:09 +0000324.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
Mark Marshall90021f22010-12-03 14:48:11 +0000325.sp
David Hendricksf9a30552015-05-23 20:30:30 -0700326.BR "* linux_mtd" " (for SPI flash ROMs accessible via /dev/mtdX on Linux)"
327.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +0000328.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
329.sp
James Lairdc60de0e2013-03-27 13:00:23 +0000330.BR "* usbblaster_spi" " (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)"
331.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000332.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
333.sp
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000334.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
335.sp
Justin Chevrier66e554b2015-02-08 21:58:10 +0000336.BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)"
337.sp
Urja Rannikko0870b022016-01-31 22:10:29 +0000338.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)"
339.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +0100340.BR "* digilent_spi" " (for SPI flash ROMs attached to iCEblink40 development boards)"
341.sp
Marc Schink3578ec62016-03-17 16:23:03 +0100342.BR "* jlink_spi" " (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)"
343.sp
Miklós Márton2d20d6d2018-01-30 20:20:15 +0100344.BR "* ni845x_spi" " (for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452)"
345.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000346Some programmers have optional or mandatory parameters which are described
347in detail in the
Stefan Tauner6697f712014-08-06 15:09:15 +0000348.B PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000349section. Support for some programmers can be disabled at compile time.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000350.B "flashrom \-h"
Michael Karchere5eafb22010-03-07 12:11:08 +0000351lists all supported programmers.
352.TP
353.B "\-h, \-\-help"
354Show a help text and exit.
355.TP
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000356.B "\-o, \-\-output <logfile>"
357Save the full debug log to
358.BR <logfile> .
359If the file already exists, it will be overwritten. This is the recommended
360way to gather logs from flashrom because they will be verbose even if the
Stefan Tauner6697f712014-08-06 15:09:15 +0000361on-screen messages are not verbose and don't require output redirection.
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +0000362.TP
Michael Karchere5eafb22010-03-07 12:11:08 +0000363.B "\-R, \-\-version"
364Show version information and exit.
Stefan Tauner6697f712014-08-06 15:09:15 +0000365.SH PROGRAMMER-SPECIFIC INFORMATION
Michael Karchere5eafb22010-03-07 12:11:08 +0000366Some programmer drivers accept further parameters to set programmer-specific
Uwe Hermann4e3d0b32010-03-25 23:18:41 +0000367parameters. These parameters are separated from the programmer name by a
Michael Karchere5eafb22010-03-07 12:11:08 +0000368colon. While some programmers take arguments at fixed positions, other
369programmers use a key/value interface in which the key and value is separated
370by an equal sign and different pairs are separated by a comma or a colon.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000371.SS
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000372.BR "internal " programmer
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000373.TP
374.B Board Enables
375.sp
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000376Some mainboards require to run mainboard specific code to enable flash erase
377and write support (and probe support on old systems with parallel flash).
378The mainboard brand and model (if it requires specific code) is usually
379autodetected using one of the following mechanisms: If your system is
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000380running coreboot, the mainboard type is determined from the coreboot table.
381Otherwise, the mainboard is detected by examining the onboard PCI devices
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000382and possibly DMI info. If PCI and DMI do not contain information to uniquely
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000383identify the mainboard (which is the exception), or if you want to override
384the detected mainboard model, you can specify the mainboard using the
385.sp
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000386.B " flashrom \-p internal:mainboard=<vendor>:<board>"
Carl-Daniel Hailfinger2d927fb2012-01-04 00:48:27 +0000387syntax.
388.sp
389See the 'Known boards' or 'Known laptops' section in the output
390of 'flashrom \-L' for a list of boards which require the specification of
391the board name, if no coreboot table is found.
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000392.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000393Some of these board-specific flash enabling functions (called
394.BR "board enables" )
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000395in flashrom have not yet been tested. If your mainboard is detected needing
396an untested board enable function, a warning message is printed and the
397board enable is not executed, because a wrong board enable function might
398cause the system to behave erratically, as board enable functions touch the
399low-level internals of a mainboard. Not executing a board enable function
400(if one is needed) might cause detection or erasing failure. If your board
401protects only part of the flash (commonly the top end, called boot block),
402flashrom might encounter an error only after erasing the unprotected part,
403so running without the board-enable function might be dangerous for erase
404and write (which includes erase).
405.sp
406The suggested procedure for a mainboard with untested board specific code is
407to first try to probe the ROM (just invoke flashrom and check that it
408detects your flash chip type) without running the board enable code (i.e.
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000409without any parameters). If it finds your chip, fine. Otherwise, retry
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000410probing your chip with the board-enable code running, using
411.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000412.B " flashrom \-p internal:boardenable=force"
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000413.sp
414If your chip is still not detected, the board enable code seems to be broken
415or the flash chip unsupported. Otherwise, make a backup of your current ROM
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000416contents (using
417.BR \-r )
418and store it to a medium outside of your computer, like
419a USB drive or a network share. If you needed to run the board enable code
Stefan Taunereb582572012-09-21 12:52:50 +0000420already for probing, use it for reading too.
421If reading succeeds and the contens of the read file look legit you can try to write the new image.
422You should enable the board enable code in any case now, as it
Michael Karcher7f0c3ec2010-03-07 22:29:28 +0000423has been written because it is known that writing/erasing without the board
424enable is going to fail. In any case (success or failure), please report to
425the flashrom mailing list, see below.
426.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000427.TP
428.B Coreboot
429.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000430On systems running coreboot, flashrom checks whether the desired image matches
431your mainboard. This needs some special board ID to be present in the image.
432If flashrom detects that the image you want to write and the current board
433do not match, it will refuse to write the image unless you specify
434.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000435.B " flashrom \-p internal:boardmismatch=force"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000436.TP
437.B ITE IT87 Super I/O
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000438.sp
Vadim Girlin4dd0f902013-08-24 12:18:17 +0000439If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an
440ITE IT87 series Super I/O to switch between the two flash chips. Only one of them can be accessed at a time
441and you can manually select which one to use with the
442.sp
443.B " flashrom \-p internal:dualbiosindex=chip"
444.sp
445syntax where
446.B chip
447is the index of the chip to use (0 = main, 1 = backup). You can check which one is currently selected by
448leaving out the
449.B chip
450parameter.
451.sp
Carl-Daniel Hailfinger01f3ef42010-03-25 02:50:40 +0000452If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000453translation, flashrom should autodetect that configuration. If you want to
454set the I/O base port of the IT87 series SPI controller manually instead of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000455using the value provided by the BIOS, use the
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000456.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000457.B " flashrom \-p internal:it87spiport=portnum"
458.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000459syntax where
460.B portnum
461is the I/O port number (must be a multiple of 8). In the unlikely case
462flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
463report so we can diagnose the problem.
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000464.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000465.TP
Rudolf Marek70e14592013-07-25 22:58:56 +0000466.B AMD chipsets
467.sp
468Beginning with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in
469every AMD southbridge. Its firmware resides in the same flash chip as the host's which makes writing to the
470flash risky if the IMC is active. Flashrom tries to temporarily disable the IMC but even then changing the
471contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will
472continue executing code from the flash. If the code was removed or changed in an unfortunate way it is
473unpredictable what the IMC will do. Therefore, if flashrom detects an active IMC it will disable write support
474unless the user forces it with the
475.sp
476.B " flashrom \-p internal:amd_imc_force=yes"
477.sp
478syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of
479a layout file. This limitation might be removed in the future when we understand the details better and have
480received enough feedback from users. Please report the outcome if you had to use this option to write a chip.
481.sp
Stefan Tauner21071b02014-05-16 21:39:48 +0000482An optional
483.B spispeed
484parameter specifies the frequency of the SPI bus where applicable (i.e.\& SB600 or later with an SPI flash chip
485directly attached to the chipset).
486Syntax is
487.sp
488.B " flashrom \-p internal:spispeed=frequency"
489.sp
490where
491.B frequency
492can be
493.BR "'16.5\ MHz'" ", " "'22\ MHz'" ", " "'33\ MHz'" ", " "'66\ MHz'" ", " "'100\ MHZ'" ", or " "'800\ kHz'" "."
494Support of individual frequencies depends on the generation of the chipset:
495.sp
496* SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
497.sp
498* SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
499.sp
500* Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
501.sp
502The default is to use 16.5 MHz and disable Fast Reads.
Rudolf Marek70e14592013-07-25 22:58:56 +0000503.TP
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000504.B Intel chipsets
505.sp
Stefan Tauner50e7c602011-11-08 10:55:54 +0000506If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
Stefan Taunereb582572012-09-21 12:52:50 +0000507attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the
Stefan Tauner50e7c602011-11-08 10:55:54 +0000508chipset provides an alternative way to access the flash chip(s) named
509.BR "Hardware Sequencing" .
510It is much simpler than the normal access method (called
511.BR "Software Sequencing" "),"
512but does not allow the software to choose the SPI commands to be sent.
513You can use the
514.sp
515.B " flashrom \-p internal:ich_spi_mode=value"
516.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000517syntax where
518.BR "value " "can be"
Stefan Tauner50e7c602011-11-08 10:55:54 +0000519.BR auto ", " swseq " or " hwseq .
520By default
521.RB "(or when setting " ich_spi_mode=auto )
Stefan Taunereb582572012-09-21 12:52:50 +0000522the module tries to use swseq and only activates hwseq if need be (e.g.\& if
Stefan Tauner50e7c602011-11-08 10:55:54 +0000523important opcodes are inaccessible due to lockdown; or if more than one flash
524chip is attached). The other options (swseq, hwseq) select the respective mode
525(if possible).
526.sp
Stefan Tauner5210e722012-02-16 01:13:00 +0000527ICH8 and later southbridges may also have locked address ranges of different
528kinds if a valid descriptor was written to it. The flash address space is then
529partitioned in multiple so called "Flash Regions" containing the host firmware,
530the ME firmware and so on respectively. The flash descriptor can also specify up
531to 5 so called "Protected Regions", which are freely chosen address ranges
532independent from the aforementioned "Flash Regions". All of them can be write
Nico Huber7590d1a2016-05-03 13:38:28 +0200533and/or read protected individually.
Stefan Tauner5210e722012-02-16 01:13:00 +0000534.sp
Kyösti Mälkki88ee0402013-09-14 23:37:01 +0000535If you have an Intel chipset with an ICH2 or later southbridge and if you want
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000536to set specific IDSEL values for a non-default flash chip or an embedded
537controller (EC), you can use the
538.sp
539.B " flashrom \-p internal:fwh_idsel=value"
540.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000541syntax where
542.B value
543is the 48-bit hexadecimal raw value to be written in the
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000544IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
545each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
546use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
547The rightmost hex digit corresponds with the lowest address range. All address
548ranges have a corresponding sister range 4 MB below with identical IDSEL
549settings. The default value for ICH7 is given in the example below.
550.sp
551Example:
552.B "flashrom \-p internal:fwh_idsel=0x001122334567"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000553.TP
554.B Laptops
Carl-Daniel Hailfinger46fa0682011-07-25 22:44:09 +0000555.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +0200556Using flashrom on older laptops that don't boot from the SPI bus is
557dangerous and may easily make your hardware unusable (see also the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000558.B BUGS
Nico Huber2e50cdc2018-09-23 20:20:26 +0200559section). The embedded controller (EC) in some
560machines may interact badly with flashing.
Stefan Tauner4c723152016-01-14 22:47:55 +0000561More information is
562.URLB https://flashrom.org/Laptops "in the wiki" .
Nico Huber2e50cdc2018-09-23 20:20:26 +0200563Problems occur when the flash chip is shared between BIOS
564and EC firmware, and the latter does not expect flashrom
565to access the chip. While flashrom tries to change the contents of
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000566that memory the EC might need to fetch new instructions or data from it and
567could stop working correctly. Probing for and reading from the chip may also
568irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
Nico Huber2e50cdc2018-09-23 20:20:26 +0200569other nasty effects. flashrom will attempt to detect if it is running on such a
570laptop and limit probing to SPI buses. If you want to probe the LPC bus
571anyway at your own risk, use
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000572.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000573.B " flashrom \-p internal:laptop=force_I_want_a_brick"
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000574.sp
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000575We will not help you if you force flashing on a laptop because this is a really
576dumb idea.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000577.sp
578You have been warned.
579.sp
580Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
581laptops. Some vendors did not implement those bits correctly or set them to
Nico Huber2e50cdc2018-09-23 20:20:26 +0200582generic and/or dummy values. flashrom will then issue a warning and restrict
583buses like above. In this case you can use
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000584.sp
585.B " flashrom \-p internal:laptop=this_is_not_a_laptop"
586.sp
Stefan Tauner6697f712014-08-06 15:09:15 +0000587to tell flashrom (at your own risk) that it is not running on a laptop.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000588.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000589.BR "dummy " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000590.IP
591The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various
592aspects of flashrom and is mainly used in development and while debugging.
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000593It is able to emulate some chips to a certain degree (basic
594identify/read/erase/write operations work).
595.sp
Michael Karchere5eafb22010-03-07 12:11:08 +0000596An optional parameter specifies the bus types it
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000597should support. For that you have to use the
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000598.sp
599.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
600.sp
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000601syntax where
602.B type
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000603can be
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000604.BR parallel ", " lpc ", " fwh ", " spi
605in any order. If you specify bus without type, all buses will be disabled.
606If you do not specify bus, all buses will be enabled.
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000607.sp
608Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000609.B "flashrom \-p dummy:bus=lpc+fwh"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000610.sp
611The dummy programmer supports flash chip emulation for automated self-tests
612without hardware access. If you want to emulate a flash chip, use the
613.sp
614.B " flashrom \-p dummy:emulate=chip"
615.sp
616syntax where
617.B chip
618is one of the following chips (please specify only the chip name, not the
619vendor):
620.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000621.RB "* ST " M25P10.RES " SPI flash chip (128 kB, RES, page write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000622.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000623.RB "* SST " SST25VF040.REMS " SPI flash chip (512 kB, REMS, byte write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000624.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000625.RB "* SST " SST25VF032B " SPI flash chip (4096 kB, RDID, AAI write)"
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000626.sp
Stefan Tauner23e10b82016-01-23 16:16:49 +0000627.RB "* Macronix " MX25L6436 " SPI flash chip (8192 kB, RDID, SFDP)"
Stefan Tauner0b9df972012-05-07 22:12:16 +0000628.sp
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000629Example:
630.B "flashrom -p dummy:emulate=SST25VF040.REMS"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000631.TP
632.B Persistent images
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000633.sp
634If you use flash chip emulation, flash image persistence is available as well
635by using the
636.sp
637.B " flashrom \-p dummy:emulate=chip,image=image.rom"
638.sp
639syntax where
640.B image.rom
641is the file where the simulated chip contents are read on flashrom startup and
642where the chip contents on flashrom shutdown are written to.
643.sp
644Example:
645.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000646.TP
647.B SPI write chunk size
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000648.sp
649If you use SPI flash chip emulation for a chip which supports SPI page write
650with the default opcode, you can set the maximum allowed write chunk size with
651the
652.sp
653.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
654.sp
655syntax where
656.B size
Stefan Taunereb582572012-09-21 12:52:50 +0000657is the number of bytes (min.\& 1, max.\& 256).
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000658.sp
659Example:
660.sp
661.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000662.TP
663.B SPI blacklist
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000664.sp
665To simulate a programmer which refuses to send certain SPI commands to the
666flash chip, you can specify a blacklist of SPI commands with the
667.sp
668.B " flashrom -p dummy:spi_blacklist=commandlist"
669.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000670syntax where
671.B commandlist
672is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000673SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000674controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
675commandlist may be up to 512 characters (256 commands) long.
676Implementation note: flashrom will detect an error during command execution.
677.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000678.TP
679.B SPI ignorelist
680.sp
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000681To simulate a flash chip which ignores (doesn't support) certain SPI commands,
682you can specify an ignorelist of SPI commands with the
683.sp
684.B " flashrom -p dummy:spi_ignorelist=commandlist"
685.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000686syntax where
687.B commandlist
688is a list of two-digit hexadecimal representations of
Stefan Taunereb582572012-09-21 12:52:50 +0000689SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000690command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
691characters (256 commands) long.
692Implementation note: flashrom won't detect an error during command execution.
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000693.sp
694.TP
695.B SPI status register
696.sp
697You can specify the initial content of the chip's status register with the
698.sp
699.B " flashrom -p dummy:spi_status=content"
700.sp
Carl-Daniel Hailfinger4e3391f2012-07-22 12:01:43 +0000701syntax where
702.B content
703is an 8-bit hexadecimal value.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000704.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000705.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000706, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000707, " satamv" , " atahpt", " atavia ", " atapromise " and " it8212 " programmers
Stefan Tauner4c723152016-01-14 22:47:55 +0000708.IP
Michael Karchere5eafb22010-03-07 12:11:08 +0000709These programmers have an option to specify the PCI address of the card
710your want to use, which must be specified if more than one card supported
711by the selected programmer is installed in your system. The syntax is
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +0000712.sp
713.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
714.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000715where
Uwe Hermannc7e8a0c2009-05-19 14:14:21 +0000716.B xxxx
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000717is the name of the programmer,
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000718.B bb
719is the PCI bus number,
720.B dd
721is the PCI device number, and
722.B f
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000723is the PCI function number of the desired device.
Uwe Hermann530cb2d2009-05-14 22:58:21 +0000724.sp
725Example:
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000726.B "flashrom \-p nic3com:pci=05:04.0"
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000727.SS
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000728.BR "atavia " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000729.IP
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000730Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the
731.sp
732.B " flashrom \-p atavia:offset=addr"
733.sp
734syntax where
735.B addr
736will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal).
737For more information please see
Stefan Tauner4c723152016-01-14 22:47:55 +0000738.URLB https://flashrom.org/VT6421A "its wiki page" .
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000739.SS
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000740.BR "atapromise " programmer
741.IP
742This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems
743from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were
744actually connected. You may use this programmer to flash firmware updates, since these are only 16 kB in
745size (padding to 32 kB is required).
746.SS
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000747.BR "nicintel_eeprom " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000748.IP
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000749This is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs
750mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEPROMs normally do not announce their
Stefan Tauner0be072c2016-03-13 15:16:30 +0000751size nor allow themselves to be identified, the controller relies on correct size values written to predefined
752addresses within the chip. Flashrom follows this scheme but assumes the minimum size of 16 kB (128 kb) if an
753unprogrammed EEPROM/card is detected. Intel specifies following EEPROMs to be compatible:
754Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000755.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000756.BR "ft2232_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000757.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000758This module supports various programmers based on FTDI FT2232/FT4232H/FT232H chips including the DLP Design
759DLP-USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster,
760Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board (V2+), TIAO/DIYGADGET USB
761Multi-Protocol Adapter (TUMPA), TUMPA Lite, GOEPEL PicoTAP and Google Servo v1/v2.
762.sp
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000763An optional parameter specifies the controller
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300764type, channel/interface/port and GPIO-based chip select it should support. For that you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000765.sp
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300766.B " flashrom \-p ft2232_spi:type=model,port=interface,csgpiol=gpio"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000767.sp
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000768syntax where
769.B model
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000770can be
Ilya A. Volynets-Evenbakh2c714ab2012-09-26 00:47:09 +0000771.BR 2232H ", " 4232H ", " 232H ", " jtagkey ", " busblaster ", " openmoko ", " \
Uwe Hermann836b26a2011-10-14 20:33:14 +0000772arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
Todd Broch6800c952016-02-14 15:46:00 +0000773", " tumpa ", " tumpalite ", " picotap ", " google-servo ", " google-servo-v2 \
774" or " google-servo-v2-legacy
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000775.B interface
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000776can be
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300777.BR A ", " B ", " C ", or " D
778and
779.B csgpiol
780can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly.
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000781The default model is
782.B 4232H
Sergey Alirzaev4acc3f32018-08-01 16:39:17 +0300783the default interface is
784.BR A
785and GPIO is not used by default.
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000786.sp
Shik Chen14fbc4b2012-09-17 00:40:54 +0000787If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by
788specifying its serial number with the
789.sp
790.B " flashrom \-p ft2232_spi:serial=number"
791.sp
792syntax where
793.B number
794is the serial number of the device (which can be found for example in the output of lsusb -v).
795.sp
Samir Ibradžićb482c6d2012-05-15 22:58:19 +0000796All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The
Stefan Tauner0554ca52013-07-25 22:54:25 +0000797expressible divisors are all
798.B even
799numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
Samir Ibradžićb482c6d2012-05-15 22:58:19 +00008006 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by
801specifying the optional
802.B divisor
803parameter with the
804.sp
805.B " flashrom \-p ft2232_spi:divisor=div"
806.sp
807syntax.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000808.SS
Michael Karchere5eafb22010-03-07 12:11:08 +0000809.BR "serprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000810.IP
Stefan Tauner0be072c2016-03-13 15:16:30 +0000811This module supports all programmers speaking the serprog protocol. This includes some Arduino-based devices
812as well as various programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others.
813.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000814A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for
815communicating with the programmer.
816The device/baud combination has to start with
817.B dev=
818and separate the optional baud rate with a colon.
819For example
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000820.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000821.B " flashrom \-p serprog:dev=/dev/ttyS0:115200"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000822.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000823If no baud rate is given the default values by the operating system/hardware will be used.
824For IP connections you have to use the
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000825.sp
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000826.B " flashrom \-p serprog:ip=ipaddr:port"
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000827.sp
Stefan Tauner72587f82016-01-04 03:05:15 +0000828syntax.
829In case the device supports it, you can set the SPI clock frequency with the optional
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000830.B spispeed
Stefan Tauner0554ca52013-07-25 22:54:25 +0000831parameter. The frequency is parsed as hertz, unless an
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000832.BR M ", or " k
833suffix is given, then megahertz or kilohertz are used respectively.
834Example that sets the frequency to 2 MHz:
835.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +0000836.B " flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
Stefan Taunerb98f6eb2012-08-13 16:33:04 +0000837.sp
838More information about serprog is available in
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000839.B serprog-protocol.txt
840in the source distribution.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000841.SS
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000842.BR "buspirate_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000843.IP
Uwe Hermann9ff514d2010-06-07 19:41:25 +0000844A required
845.B dev
846parameter specifies the Bus Pirate device node and an optional
847.B spispeed
848parameter specifies the frequency of the SPI bus. The parameter
Michael Karchere5eafb22010-03-07 12:11:08 +0000849delimiter is a comma. Syntax is
Carl-Daniel Hailfingerdfade102009-08-18 23:51:22 +0000850.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000851.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
Michael Karchere5eafb22010-03-07 12:11:08 +0000852.sp
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000853where
854.B frequency
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000855can be
856.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
Michael Karchere5eafb22010-03-07 12:11:08 +0000857(in Hz). The default is the maximum frequency of 8 MHz.
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000858.sp
Shawn Anastasio2b5adfb2017-12-31 00:17:15 -0600859The baud rate for communication between the host and the Bus Pirate can be specified with the optional
860.B serialspeed
861parameter. Syntax is
862.sp
863.B " flashrom -p buspirate_spi:serialspeed=baud
864.sp
865where
866.B baud
867can be
868.BR 115200 ", " 230400 ", " 250000 " or " 2000000 " (" 2M ")."
869The default is 2M baud for Bus Pirate hardware version 3.0 and greater, and 115200 otherwise.
870.sp
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000871An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be
872needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is
873.sp
874.B " flashrom -p buspirate_spi:pullups=state"
875.sp
876where
877.B state
878can be
879.BR on " or " off .
Stefan Tauner4c723152016-01-14 22:47:55 +0000880More information about the Bus Pirate pull-up resistors and their purpose is available
881.URLB "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors" \
882"in a guide by dangerousprototypes" .
Brian Salcedo30dfdba2013-01-03 20:44:30 +0000883Only the external supply voltage (Vpu) is supported as of this writing.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000884.SS
Justin Chevrier66e554b2015-02-08 21:58:10 +0000885.BR "pickit2_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000886.IP
Justin Chevrier66e554b2015-02-08 21:58:10 +0000887An optional
888.B voltage
889parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified.
890You can use
891.BR mV ", " millivolt ", " V " or " Volt
892as unit specifier. Syntax is
893.sp
894.B " flashrom \-p pickit2_spi:voltage=value"
895.sp
896where
897.B value
898can be
899.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
900or the equivalent in mV.
901.sp
902An optional
903.B spispeed
904parameter specifies the frequency of the SPI bus. Syntax is
905.sp
906.B " flashrom \-p pickit2_spi:spispeed=frequency"
907.sp
908where
909.B frequency
910can be
911.BR 250k ", " 333k ", " 500k " or " 1M "
912(in Hz). The default is a frequency of 1 MHz.
913.SS
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000914.BR "dediprog " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000915.IP
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000916An optional
917.B voltage
918parameter specifies the voltage the Dediprog should use. The default unit is
919Volt if no unit is specified. You can use
920.BR mV ", " milliVolt ", " V " or " Volt
921as unit specifier. Syntax is
922.sp
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000923.B " flashrom \-p dediprog:voltage=value"
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000924.sp
925where
926.B value
Uwe Hermann68b9cca2011-06-15 23:44:52 +0000927can be
Carl-Daniel Hailfingerc2441382010-11-09 22:00:31 +0000928.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
929or the equivalent in mV.
Nathan Laredo21541a62012-12-24 22:07:36 +0000930.sp
931An optional
932.B device
933parameter specifies which of multiple connected Dediprog devices should be used.
934Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts
935at 0.
936Usage example to select the second device:
937.sp
938.B " flashrom \-p dediprog:device=1"
Nico Huber77fa67d2013-02-20 18:03:36 +0000939.sp
940An optional
941.B spispeed
Patrick Georgiefe2d432013-05-23 21:47:46 +0000942parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer.
943Syntax is
Nico Huber77fa67d2013-02-20 18:03:36 +0000944.sp
945.B " flashrom \-p dediprog:spispeed=frequency"
946.sp
947where
948.B frequency
949can be
950.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M
951(in Hz). The default is a frequency of 12 MHz.
Stefan Taunere659d2d2013-05-03 21:58:28 +0000952.sp
953An optional
954.B target
955parameter specifies which target chip should be used. Syntax is
956.sp
957.B " flashrom \-p dediprog:target=value"
958.sp
959where
960.B value
961can be
962.BR 1 " or " 2
Stefan Tauner6697f712014-08-06 15:09:15 +0000963to select target chip 1 or 2 respectively. The default is target chip 1.
Stefan Tauner9e9f6842012-02-16 20:55:27 +0000964.SS
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000965.BR "rayer_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +0000966.IP
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000967The default I/O base address used for the parallel port is 0x378 and you can use
968the optional
969.B iobase
970parameter to specify an alternate base I/O address with the
971.sp
972.B " flashrom \-p rayer_spi:iobase=baseaddr"
973.sp
974syntax where
975.B baseaddr
976is base I/O port address of the parallel port, which must be a multiple of
977four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
978.sp
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000979The default cable type is the RayeR cable. You can use the optional
980.B type
981parameter to specify the cable type with the
982.sp
983.B " flashrom \-p rayer_spi:type=model"
984.sp
985syntax where
986.B model
987can be
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000988.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
Stefan Taunerfdb16592016-02-28 17:04:38 +0000989STK200/300, " wiggler " for the Macraigor Wiggler, " xilinx " for the Xilinx Parallel Cable III (DLC 5), or" \
990" spi_tt" " for SPI Tiny Tools-compatible hardware.
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000991.sp
992More information about the RayeR hardware is available at
Stefan Tauner23e10b82016-01-23 16:16:49 +0000993.nh
Stefan Tauner4c723152016-01-14 22:47:55 +0000994.URLB "http://rayer.g6.cz/elektro/spipgm.htm" "RayeR's website" .
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000995The Altera ByteBlasterMV datasheet can be obtained from
Stefan Tauner4c723152016-01-14 22:47:55 +0000996.URLB "http://www.altera.co.jp/literature/ds/dsbytemv.pdf" Altera .
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000997For more information about the Macraigor Wiggler see
Stefan Tauner4c723152016-01-14 22:47:55 +0000998.URLB "http://www.macraigor.com/wiggler.htm" "their company homepage" .
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000999The schematic of the Xilinx DLC 5 was published in
Stefan Tauner4c723152016-01-14 22:47:55 +00001000.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001001.SS
Michael Karchere5449392012-05-05 20:53:59 +00001002.BR "pony_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001003.IP
Michael Karchere5449392012-05-05 20:53:59 +00001004The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
1005specified using the mandatory
Stefan Taunere34e3e82013-01-01 00:06:51 +00001006.B dev
Michael Karchere5449392012-05-05 20:53:59 +00001007parameter. The adapter type is selectable between SI-Prog (used for
1008SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer
1009named "serbang". The optional
Stefan Taunere34e3e82013-01-01 00:06:51 +00001010.B type
Michael Karchere5449392012-05-05 20:53:59 +00001011parameter accepts the values "si_prog" (default) or "serbang".
1012.sp
1013Information about the SI-Prog adapter can be found at
Stefan Tauner4c723152016-01-14 22:47:55 +00001014.URLB "http://www.lancos.com/siprogsch.html" "its website" .
Michael Karchere5449392012-05-05 20:53:59 +00001015.sp
1016An example call to flashrom is
1017.sp
1018.B " flashrom \-p pony_spi:dev=/dev/ttyS0,type=serbang"
1019.sp
1020Please note that while USB-to-serial adapters work under certain circumstances,
1021this slows down operation considerably.
1022.SS
Mark Marshall90021f22010-12-03 14:48:11 +00001023.BR "ogp_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001024.IP
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001025The flash ROM chip to access must be specified with the
Mark Marshall90021f22010-12-03 14:48:11 +00001026.B rom
1027parameter.
1028.sp
1029.B " flashrom \-p ogp_spi:rom=name"
1030.sp
1031Where
1032.B name
1033is either
1034.B cprom
1035or
1036.B s3
Stefan Taunere34e3e82013-01-01 00:06:51 +00001037for the configuration ROM and
Mark Marshall90021f22010-12-03 14:48:11 +00001038.B bprom
1039or
1040.B bios
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001041for the BIOS ROM. If more than one card supported by the ogp_spi programmer
Mark Marshall90021f22010-12-03 14:48:11 +00001042is installed in your system, you have to specify the PCI address of the card
1043you want to use with the
1044.B pci=
1045parameter as explained in the
Stefan Taunere34e3e82013-01-01 00:06:51 +00001046.B nic3com et al.\&
Mark Marshall90021f22010-12-03 14:48:11 +00001047section above.
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001048.SS
David Hendricksf9a30552015-05-23 20:30:30 -07001049.BR "linux_mtd " programmer
1050.IP
1051You may specify the MTD device to use with the
1052.sp
1053.B " flashrom \-p linux_mtd:dev=/dev/mtdX"
1054.sp
1055syntax where
1056.B /dev/mtdX
1057is the Linux device node for your MTD device. If left unspecified the first MTD
1058device found (e.g. /dev/mtd0) will be used by default.
1059.sp
1060Please note that the linux_mtd driver only works on Linux.
1061.SS
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001062.BR "linux_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001063.IP
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001064You have to specify the SPI controller to use with the
1065.sp
1066.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y"
1067.sp
1068syntax where
1069.B /dev/spidevX.Y
1070is the Linux device node for your SPI controller.
1071.sp
Stefan Tauner0554ca52013-07-25 22:54:25 +00001072In case the device supports it, you can set the SPI clock frequency with the optional
1073.B spispeed
1074parameter. The frequency is parsed as kilohertz.
1075Example that sets the frequency to 8 MHz:
1076.sp
1077.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000"
1078.sp
Carl-Daniel Hailfinger8541d232012-02-16 21:00:27 +00001079Please note that the linux_spi driver only works on Linux.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001080.SS
1081.BR "mstarddc_spi " programmer
Stefan Tauner4c723152016-01-14 22:47:55 +00001082.IP
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001083The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging
Stefan Tauner0be072c2016-03-13 15:16:30 +00001084information between a computer and attached displays. Its most common uses are getting display capabilities
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001085through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address
10860x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to
1087the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49.
1088This flashrom module allows the latter via Linux's I2C driver.
1089.sp
1090.B IMPORTANT:
1091Before using this programmer, the display
1092.B MUST
1093be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an
1094inactive VGA output. It absolutely
1095.B MUST NOT
1096be used as a display during the procedure!
1097.sp
1098You have to specify the DDC/I2C controller and I2C address to use with the
1099.sp
1100.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY"
1101.sp
1102syntax where
1103.B /dev/i2c-X
1104is the Linux device node for your I2C controller connected to the display's DDC channel, and
1105.B YY
1106is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used).
1107Example that uses I2C controller /dev/i2c-1 and address 0x49:
1108.sp
1109.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49
1110.sp
1111It is also possible to inhibit the reset command that is normally sent to the display once the flashrom
1112operation is completed using the optional
1113.B noreset
1114parameter. A value of 1 prevents flashrom from sending the reset command.
1115Example that does not reset the display at the end of the operation:
1116.sp
1117.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
1118.sp
Stefan Tauner0be072c2016-03-13 15:16:30 +00001119Please note that sending the reset command is also inhibited if an error occurred during the operation.
Alexandre Boeglin80e64712014-12-20 20:25:19 +00001120To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying
1121an operation), without the
1122.B noreset
1123parameter, once the flash read/write operation you intended to perform has completed successfully.
1124.sp
1125Please also note that the mstarddc_spi driver only works on Linux.
Urja Rannikko0870b022016-01-31 22:10:29 +00001126.SS
1127.BR "ch341a_spi " programmer
1128The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is
1129used as per the device.
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001130.SS
Miklós Márton2d20d6d2018-01-30 20:20:15 +01001131.BR "ni845x_spi " programmer
1132.IP
1133An optional
1134.B voltage
1135parameter could be used to specify the IO voltage. This parameter is available for the NI USB-8452 device.
1136The default unit is Volt if no unit is specified. You can use
1137.BR mV ", " milliVolt ", " V " or " Volt
1138as unit specifier.
1139Syntax is
1140.sp
1141.B " flashrom \-p ni845x_spi:voltage=value"
1142.sp
1143where
1144.B value
1145can be
1146.BR 1.2V ", " 1.5V ", " 1.8V ", " 2.5V ", " 3.3V
1147or the equivalent in mV.
1148.sp
1149In the case if none of the programmer's supported IO voltage is within the supported voltage range of
1150the detected flash chip the flashrom will abort the operation (to prevent damaging the flash chip).
1151You can override this behaviour by passing "yes" to the
1152.B ignore_io_voltage_limits
1153parameter (for e.g. if you are using an external voltage translator circuit).
1154Syntax is
1155.sp
1156.B " flashrom \-p ni845x_spi:ignore_io_voltage_limits=yes"
1157.sp
1158You can use the
1159.B serial
1160parameter to explicitly specify which connected NI USB-845x device should be used.
1161You should use your device's 7 digit hexadecimal serial number.
1162Usage example to select the device with 1230A12 serial number:
1163.sp
1164.B " flashrom \-p ni845x_spi:serial=1230A12"
1165.sp
1166An optional
1167.B spispeed
1168parameter specifies the frequency of the SPI bus.
1169Syntax is
1170.sp
1171.B " flashrom \-p ni845x_spi:spispeed=frequency"
1172.sp
1173where
1174.B frequency
1175should a number corresponding to the desired frequency in kHz.
1176The maximum
1177.B frequency
1178is 12 MHz (12000 kHz) for the USB-8451 and 50 MHz (50000 kHz) for the USB-8452.
1179The default is a frequency of 1 MHz (1000 kHz).
1180.sp
1181An optional
1182.B cs
1183parameter specifies which target chip select line should be used. Syntax is
1184.sp
1185.B " flashrom \-p ni845x_spi:csnumber=value"
1186.sp
1187where
1188.B value
1189should be between
1190.BR 0 " and " 7
1191By default the CS0 is used.
1192.SS
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001193.BR "digilent_spi " programmer
1194.IP
1195An optional
1196.B spispeed
1197parameter specifies the frequency of the SPI bus.
1198Syntax is
1199.sp
1200.B " flashrom \-p digilent_spi:spispeed=frequency"
1201.sp
1202where
1203.B frequency
1204can be
1205.BR 62.5k ", " 125k ", " 250k ", " 500k ", " 1M ", " 2M " or " 4M
1206(in Hz). The default is a frequency of 4 MHz.
1207.sp
1208.SS
Marc Schink3578ec62016-03-17 16:23:03 +01001209.BR "jlink_spi " programmer
1210.IP
1211This module supports SEGGER J-Link and compatible devices.
1212
1213The \fBMOSI\fP signal of the flash chip must be attached to \fBTDI\fP pin of
1214the programmer, \fBMISO\fP to \fBTDO\fP and \fBSCK\fP to \fBTCK\fP.
1215The chip select (\fBCS\fP) signal of the flash chip can be attached to
1216different pins of the programmer which can be selected with the
1217.sp
1218.B " flashrom \-p jlink_spi:cs=pin"
1219.sp
1220syntax where \fBpin\fP can be either \fBTRST\fP or \fBRESET\fP.
1221The default pin for chip select is \fBRESET\fP.
1222Note that, when using \fBRESET\fP, it is normal that the indicator LED blinks
1223orange or red.
1224.br
1225Additionally, the \fBVTref\fP pin of the programmer must be attached to the
1226logic level of the flash chip.
1227The programmer measures the voltage on this pin and generates the reference
1228voltage for its input comparators and adapts its output voltages to it.
1229.sp
1230Pinout for devices with 20-pin JTAG connector:
1231.sp
1232 +-------+
1233 | 1 2 | 1: VTref 2:
1234 | 3 4 | 3: TRST 4: GND
1235 | 5 6 | 5: TDI 6: GND
1236 +-+ 7 8 | 7: 8: GND
1237 | 9 10 | 9: TCK 10: GND
1238 | 11 12 | 11: 12: GND
1239 +-+ 13 14 | 13: TDO 14:
1240 | 15 16 | 15: RESET 16:
1241 | 17 18 | 17: 18:
1242 | 19 20 | 19: PWR_5V 20:
1243 +-------+
1244.sp
1245If there is more than one compatible device connected, you can select which one
1246should be used by specifying its serial number with the
1247.sp
1248.B " flashrom \-p jlink_spi:serial=number"
1249.sp
1250syntax where
1251.B number
1252is the serial number of the device (which can be found for example in the
1253output of lsusb -v).
1254.sp
1255The SPI speed can be selected by using the
1256.sp
1257.B " flashrom \-p jlink_spi:spispeed=frequency"
1258.sp
1259syntax where \fBfrequency\fP is the SPI clock frequency in kHz.
1260The maximum speed depends on the device in use.
1261.SS
1262
Carl-Daniel Hailfinger0b9af362012-07-21 16:56:04 +00001263.SH EXAMPLES
1264To back up and update your BIOS, run
1265.sp
1266.B flashrom -p internal -r backup.rom -o backuplog.txt
1267.br
1268.B flashrom -p internal -w newbios.rom -o writelog.txt
1269.sp
1270Please make sure to copy backup.rom to some external media before you try
1271to write. That makes offline recovery easier.
1272.br
1273If writing fails and flashrom complains about the chip being in an unknown
1274state, you can try to restore the backup by running
1275.sp
1276.B flashrom -p internal -w backup.rom -o restorelog.txt
1277.sp
1278If you encounter any problems, please contact us and supply
1279backuplog.txt, writelog.txt and restorelog.txt. See section
1280.B BUGS
1281for contact info.
Peter Stuge42688e52009-01-26 02:20:56 +00001282.SH EXIT STATUS
Niklas Söderlund2d8b7ef2013-09-13 19:19:25 +00001283flashrom exits with 0 on success, 1 on most failures but with 3 if a call to mmap() fails.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001284.SH REQUIREMENTS
1285flashrom needs different access permissions for different programmers.
1286.sp
1287.B internal
1288needs raw memory access, PCI configuration space access, raw I/O port
1289access (x86) and MSR access (x86).
1290.sp
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +00001291.B atavia
1292needs PCI configuration space access.
1293.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001294.BR nic3com ", " nicrealtek " and " nicnatsemi "
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001295need PCI configuration space read access and raw I/O port access.
1296.sp
1297.B atahpt
1298needs PCI configuration space access and raw I/O port access.
1299.sp
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001300.BR gfxnvidia ", " drkaiser " and " it8212
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001301need PCI configuration space access and raw memory access.
1302.sp
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001303.B rayer_spi
1304needs raw I/O port access.
1305.sp
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +00001306.BR satasii ", " nicintel ", " nicintel_eeprom " and " nicintel_spi
1307need PCI configuration space read access and raw memory access.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001308.sp
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001309.BR satamv " and " atapromise
1310need PCI configuration space read access, raw I/O port access and raw memory
Carl-Daniel Hailfinger9321f062011-07-24 18:41:13 +00001311access.
1312.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001313.B serprog
1314needs TCP access to the network or userspace access to a serial port.
1315.sp
1316.B buspirate_spi
1317needs userspace access to a serial port.
1318.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001319.BR ft2232_spi ", " usbblaster_spi " and " pickit2_spi
Stefan Taunere49edbb2016-01-31 22:10:14 +00001320need access to the respective USB device via libusb API version 0.1.
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001321.sp
Nico Huberd99a2bd2016-02-18 21:42:49 +00001322.BR ch341a_spi " and " dediprog
1323need access to the respective USB device via libusb API version 1.0.
Urja Rannikko0870b022016-01-31 22:10:29 +00001324.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001325.B dummy
1326needs no access permissions at all.
1327.sp
Sergey Lichack98f47102012-08-27 01:24:15 +00001328.BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", "
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001329.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001330have to be run as superuser/root, and need additional raw access permission.
1331.sp
Lubomir Rintelb2154e82018-01-14 17:35:33 +01001332.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi ", " \
1333ch341a_spi " and " digilent_spi
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001334can be run as normal user on most operating systems if appropriate device
1335permissions are set.
1336.sp
Mark Marshall90021f22010-12-03 14:48:11 +00001337.B ogp
1338needs PCI configuration space read access and raw memory access.
1339.sp
Carl-Daniel Hailfingerb63b0672010-07-02 17:12:50 +00001340On OpenBSD, you can obtain raw access permission by setting
Uwe Hermann941a2732011-07-25 21:12:57 +00001341.B "securelevel=-1"
1342in
1343.B "/etc/rc.securelevel"
1344and rebooting, or rebooting into single user mode.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001345.SH BUGS
Stefan Tauner4c723152016-01-14 22:47:55 +00001346Please report any bugs to the
1347.MTOB "flashrom@flashrom.org" "flashrom mailing list" .
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001348.sp
1349We recommend to subscribe first at
Stefan Tauner4c723152016-01-14 22:47:55 +00001350.URLB "https://flashrom.org/mailman/listinfo/flashrom" "" .
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +00001351.sp
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001352Many of the developers communicate via the
1353.B "#flashrom"
1354IRC channel on
1355.BR chat.freenode.net .
Stefan Tauner4c723152016-01-14 22:47:55 +00001356If you don't have an IRC client, you can use the
1357.URLB http://webchat.freenode.net/?channels=flashrom "freenode webchat" .
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001358You are welcome to join and ask questions, send us bug and success reports there
Stefan Taunereb582572012-09-21 12:52:50 +00001359too. Please provide a way to contact you later (e.g.\& a mail address) and be
Stefan Tauner4c723152016-01-14 22:47:55 +00001360patient if there is no immediate reaction. Also, we provide a
1361.URLB https://paste.flashrom.org "pastebin service"
Stefan Taunereb582572012-09-21 12:52:50 +00001362that is very useful when you want to share logs etc.\& without spamming the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001363channel.
1364.SS
1365.B Laptops
1366.sp
Nico Huber2e50cdc2018-09-23 20:20:26 +02001367Using flashrom on older laptops is dangerous and may easily make your hardware
1368unusable. flashrom will attempt to detect if it is running on a susceptible
1369laptop and restrict flash-chip probing for safety reasons. Please see the
1370detailed discussion of this topic and associated flashrom options in the
Stefan Tauner9e9f6842012-02-16 20:55:27 +00001371.B Laptops
1372paragraph in the
1373.B internal programmer
1374subsection of the
Stefan Tauner6697f712014-08-06 15:09:15 +00001375.B PROGRAMMER-SPECIFIC INFORMATION
Stefan Tauner4c723152016-01-14 22:47:55 +00001376section and the information
1377.URLB "https://flashrom.org/Laptops" "in our wiki" .
Daniel Lenski65922a32012-02-15 23:40:23 +00001378.SS
1379One-time programmable (OTP) memory and unique IDs
1380.sp
1381Some flash chips contain OTP memory often denoted as "security registers".
1382They usually have a capacity in the range of some bytes to a few hundred
Stefan Taunereb582572012-09-21 12:52:50 +00001383bytes and can be used to give devices unique IDs etc. flashrom is not able
Daniel Lenski65922a32012-02-15 23:40:23 +00001384to read or write these memories and may therefore not be able to duplicate a
1385chip completely. For chip types known to include OTP memories a warning is
1386printed when they are detected.
1387.sp
1388Similar to OTP memories are unique, factory programmed, unforgeable IDs.
1389They are not modifiable by the user at all.
Stefan Taunerac54fbe2011-07-21 19:52:00 +00001390.SH LICENSE
Stefan Reinauer261144c2006-07-27 23:29:02 +00001391.B flashrom
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001392is covered by the GNU General Public License (GPL), version 2. Some files are
Stefan Tauner23e10b82016-01-23 16:16:49 +00001393additionally available under any later version of the GPL.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001394.SH COPYRIGHT
Stefan Reinauer261144c2006-07-27 23:29:02 +00001395.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001396Please see the individual files.
Stefan Reinauer261144c2006-07-27 23:29:02 +00001397.SH AUTHORS
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001398Andrew Morgan
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001399.br
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001400Carl-Daniel Hailfinger
1401.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001402Claus Gindhart
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001403.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001404David Borg
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001405.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001406David Hendricks
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001407.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001408Dominik Geyer
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001409.br
Edward O'Callaghan0cd11d82019-09-23 22:46:12 +10001410Edward O'Callaghan
1411.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001412Eric Biederman
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001413.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001414Giampiero Giancipoli
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001415.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001416Helge Wagner
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001417.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001418Idwer Vollering
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001419.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001420Joe Bao
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001421.br
Stefan Taunerc0aaf952011-05-19 02:58:17 +00001422Joerg Fischer
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001423.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001424Joshua Roys
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001425.br
Stefan Tauner5c316f92015-02-08 21:57:52 +00001426Ky\[:o]sti M\[:a]lkki
1427.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001428Luc Verhaegen
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001429.br
Carl-Daniel Hailfinger451dc802009-05-01 11:00:39 +00001430Li-Ta Lo
1431.br
Mark Marshall90021f22010-12-03 14:48:11 +00001432Mark Marshall
1433.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001434Markus Boas
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001435.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001436Mattias Mattsson
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001437.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001438Michael Karcher
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001439.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001440Nikolay Petukhov
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001441.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001442Patrick Georgi
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001443.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001444Peter Lemenkov
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001445.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001446Peter Stuge
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001447.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001448Reinder E.N. de Haan
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001449.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001450Ronald G. Minnich
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001451.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001452Ronald Hoogenboom
Stefan Reinauer261144c2006-07-27 23:29:02 +00001453.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001454Sean Nelson
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +00001455.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001456Stefan Reinauer
Stefan Reinauer261144c2006-07-27 23:29:02 +00001457.br
Uwe Hermann68b9cca2011-06-15 23:44:52 +00001458Stefan Tauner
1459.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001460Stefan Wildemann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001461.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001462Stephan Guilloux
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +00001463.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001464Steven James
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001465.br
Stefan Tauner23e10b82016-01-23 16:16:49 +00001466Urja Rannikko
1467.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001468Uwe Hermann
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001469.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001470Wang Qingpei
Carl-Daniel Hailfinger851ecf22009-01-08 04:56:59 +00001471.br
Stefan Reinaueredc61882010-01-03 14:40:30 +00001472Yinghai Lu
Stefan Reinauerf8337dd2006-08-03 10:49:09 +00001473.br
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +00001474some others, please see the flashrom svn changelog for details.
1475.br
Stefan Tauner4c723152016-01-14 22:47:55 +00001476All still active authors can be reached via
1477.MTOB "flashrom@flashrom.org" "the mailing list" .
Stefan Reinauer261144c2006-07-27 23:29:02 +00001478.PP
Stefan Tauner4c723152016-01-14 22:47:55 +00001479This manual page was written by
1480.MTOB "uwe@hermann-uwe.de" "Uwe Hermann" ,
1481Carl-Daniel Hailfinger, Stefan Tauner and others.
Uwe Hermann42eb17f2008-01-18 17:48:51 +00001482It is licensed under the terms of the GNU GPL (version 2 or later).