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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
Stefan Reinauer8fa64812009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
Carl-Daniel Hailfingera0a6ae92009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
Adam Kaufman064b1f22007-02-06 19:47:50 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000013 *
Uwe Hermannd1107642007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000018 *
Uwe Hermannd1107642007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000022 */
23
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
Ollie Lho184a4042005-11-26 21:55:36 +000027#include <stdint.h>
Carl-Daniel Hailfingerdd128c92010-06-03 00:49:50 +000028#include <stddef.h>
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +000029#include "hwaccess.h"
Patrick Georgie48654c2010-01-06 22:14:39 +000030#ifdef _WIN32
31#include <windows.h>
32#undef min
33#undef max
34#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000035
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000036typedef unsigned long chipaddr;
37
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000038enum programmer {
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000039#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000040 PROGRAMMER_INTERNAL,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000041#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000042#if CONFIG_DUMMY == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000043 PROGRAMMER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000044#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000045#if CONFIG_NIC3COM == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000046 PROGRAMMER_NIC3COM,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000047#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000048#if CONFIG_NICREALTEK == 1
Joerg Fischer5665ef32010-05-21 21:54:07 +000049 PROGRAMMER_NICREALTEK,
50 PROGRAMMER_NICREALTEK2,
51#endif
Andrew Morganc29c2e72010-06-07 22:37:54 +000052#if CONFIG_NICNATSEMI == 1
53 PROGRAMMER_NICNATSEMI,
54#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000055#if CONFIG_GFXNVIDIA == 1
Uwe Hermann2bc98f62009-09-30 18:29:55 +000056 PROGRAMMER_GFXNVIDIA,
57#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000058#if CONFIG_DRKAISER == 1
TURBO Jb0912c02009-09-02 23:00:46 +000059 PROGRAMMER_DRKAISER,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000060#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000061#if CONFIG_SATASII == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000062 PROGRAMMER_SATASII,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000063#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000064#if CONFIG_ATAHPT == 1
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000065 PROGRAMMER_ATAHPT,
66#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000067#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000068#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000069 PROGRAMMER_IT87SPI,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000070#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000071#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000072#if CONFIG_FT2232_SPI == 1
73 PROGRAMMER_FT2232_SPI,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000074#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000075#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000076 PROGRAMMER_SERPROG,
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000077#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000078#if CONFIG_BUSPIRATE_SPI == 1
79 PROGRAMMER_BUSPIRATE_SPI,
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +000080#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000081#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +000082 PROGRAMMER_DEDIPROG,
83#endif
Carl-Daniel Hailfinger37fc4692009-08-12 14:34:35 +000084 PROGRAMMER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000085};
86
87extern enum programmer programmer;
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000088
89struct programmer_entry {
90 const char *vendor;
91 const char *name;
92
93 int (*init) (void);
94 int (*shutdown) (void);
95
Uwe Hermannd1129ac2009-05-28 15:07:42 +000096 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
97 size_t len);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +000098 void (*unmap_flash_region) (void *virt_addr, size_t len);
99
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000100 void (*chip_writeb) (uint8_t val, chipaddr addr);
101 void (*chip_writew) (uint16_t val, chipaddr addr);
102 void (*chip_writel) (uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000103 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000104 uint8_t (*chip_readb) (const chipaddr addr);
105 uint16_t (*chip_readw) (const chipaddr addr);
106 uint32_t (*chip_readl) (const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000107 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000108 void (*delay) (int usecs);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000109};
110
111extern const struct programmer_entry programmer_table[];
112
Carl-Daniel Hailfingercc389fc2010-02-14 01:20:28 +0000113int register_shutdown(void (*function) (void *data), void *data);
114
Uwe Hermann09e04f72009-05-16 22:36:00 +0000115int programmer_init(void);
116int programmer_shutdown(void);
117void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
118 size_t len);
119void programmer_unmap_flash_region(void *virt_addr, size_t len);
120void chip_writeb(uint8_t val, chipaddr addr);
121void chip_writew(uint16_t val, chipaddr addr);
122void chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000123void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Uwe Hermann09e04f72009-05-16 22:36:00 +0000124uint8_t chip_readb(const chipaddr addr);
125uint16_t chip_readw(const chipaddr addr);
126uint32_t chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000127void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000128void programmer_delay(int usecs);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000129
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000130enum bitbang_spi_master {
131 BITBANG_SPI_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000132};
133
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000134extern const int bitbang_spi_master_count;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000135
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000136extern enum bitbang_spi_master bitbang_spi_master;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000137
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000138struct bitbang_spi_master_entry {
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000139 void (*set_cs) (int val);
140 void (*set_sck) (int val);
141 void (*set_mosi) (int val);
142 int (*get_miso) (void);
143};
144
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000145#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
146
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000147enum chipbustype {
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000148 CHIP_BUSTYPE_NONE = 0,
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000149 CHIP_BUSTYPE_PARALLEL = 1 << 0,
150 CHIP_BUSTYPE_LPC = 1 << 1,
151 CHIP_BUSTYPE_FWH = 1 << 2,
152 CHIP_BUSTYPE_SPI = 1 << 3,
153 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
154 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
155};
156
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000157/*
158 * How many different contiguous runs of erase blocks with one size each do
159 * we have for a given erase function?
160 */
161#define NUM_ERASEREGIONS 5
162
163/*
164 * How many different erase functions do we have per chip?
165 */
166#define NUM_ERASEFUNCTIONS 5
167
Carl-Daniel Hailfinger4bf4e792010-01-09 03:15:50 +0000168#define FEATURE_REGISTERMAP (1 << 0)
169#define FEATURE_BYTEWRITES (1 << 1)
Sean Nelson35727f72010-01-28 23:55:12 +0000170#define FEATURE_LONG_RESET (0 << 4)
171#define FEATURE_SHORT_RESET (1 << 4)
172#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
Carl-Daniel Hailfinger4bf4e792010-01-09 03:15:50 +0000173#define FEATURE_ADDR_FULL (0 << 2)
174#define FEATURE_ADDR_MASK (3 << 2)
Sean Nelson35727f72010-01-28 23:55:12 +0000175#define FEATURE_ADDR_2AA (1 << 2)
176#define FEATURE_ADDR_AAA (2 << 2)
Michael Karcherad0010a2010-04-03 10:27:08 +0000177#define FEATURE_ADDR_SHIFTED (1 << 5)
Sean Nelsonc57a9202010-01-04 17:15:23 +0000178
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000179struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000180 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000181 const char *name;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000182
183 enum chipbustype bustype;
184
Uwe Hermann394131e2008-10-18 21:14:13 +0000185 /*
186 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000187 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
188 * Identification code.
189 */
190 uint32_t manufacture_id;
191 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000192
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000193 int total_size;
194 int page_size;
Sean Nelsonc57a9202010-01-04 17:15:23 +0000195 int feature_bits;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000196
Uwe Hermann394131e2008-10-18 21:14:13 +0000197 /*
198 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000199 * everything worked correctly.
200 */
201 uint32_t tested;
202
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000203 int (*probe) (struct flashchip *flash);
Maciej Pijankac6e11112009-06-03 14:46:22 +0000204
205 /* Delay after "enter/exit ID mode" commands in microseconds. */
206 int probe_timing;
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000207
208 /*
Carl-Daniel Hailfinger63ce4bb2009-12-22 13:04:53 +0000209 * Erase blocks and associated erase function. Any chip erase function
210 * is stored as chip-sized virtual block together with said function.
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000211 */
212 struct block_eraser {
213 struct eraseblock{
214 unsigned int size; /* Eraseblock size */
215 unsigned int count; /* Number of contiguous blocks with that size */
216 } eraseblocks[NUM_ERASEREGIONS];
217 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
218 } block_erasers[NUM_ERASEFUNCTIONS];
219
Sean Nelson6e0b9122010-02-19 00:52:10 +0000220 int (*printlock) (struct flashchip *flash);
221 int (*unlock) (struct flashchip *flash);
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000222 int (*write) (struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000223 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000224
Uwe Hermann372eeb52007-12-04 21:49:06 +0000225 /* Some flash devices have an additional register space. */
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000226 chipaddr virtual_memory;
227 chipaddr virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000228};
229
Peter Stuge1159d582008-05-03 04:34:37 +0000230#define TEST_UNTESTED 0
231
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000232#define TEST_OK_PROBE (1 << 0)
233#define TEST_OK_READ (1 << 1)
234#define TEST_OK_ERASE (1 << 2)
235#define TEST_OK_WRITE (1 << 3)
236#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
237#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
Carl-Daniel Hailfingera06287c2009-09-23 22:01:33 +0000238#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000239#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000240#define TEST_OK_MASK 0x0f
241
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000242#define TEST_BAD_PROBE (1 << 4)
243#define TEST_BAD_READ (1 << 5)
244#define TEST_BAD_ERASE (1 << 6)
245#define TEST_BAD_WRITE (1 << 7)
246#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000247#define TEST_BAD_MASK 0xf0
248
Maciej Pijankac6e11112009-06-03 14:46:22 +0000249/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
250 * field and zero delay.
251 *
252 * SPI devices will always have zero delay and ignore this field.
253 */
254#define TIMING_FIXME -1
255/* this is intentionally same value as fixme */
256#define TIMING_IGNORED -1
257#define TIMING_ZERO -2
258
Ollie Lho184a4042005-11-26 21:55:36 +0000259extern struct flashchip flashchips[];
260
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000261#if CONFIG_INTERNAL == 1
Uwe Hermann05fab752009-05-16 23:42:17 +0000262struct penable {
263 uint16_t vendor_id;
264 uint16_t device_id;
265 int status;
266 const char *vendor_name;
267 const char *device_name;
268 int (*doit) (struct pci_dev *dev, const char *name);
269};
270
271extern const struct penable chipset_enables[];
272
273struct board_pciid_enable {
274 /* Any device, but make it sensible, like the ISA bridge. */
275 uint16_t first_vendor;
276 uint16_t first_device;
277 uint16_t first_card_vendor;
278 uint16_t first_card_device;
279
280 /* Any device, but make it sensible, like
281 * the host bridge. May be NULL.
282 */
283 uint16_t second_vendor;
284 uint16_t second_device;
285 uint16_t second_card_vendor;
286 uint16_t second_card_device;
287
Michael Karcher6701ee82010-01-20 14:14:11 +0000288 /* Pattern to match DMI entries */
289 const char *dmi_pattern;
290
Uwe Hermann05fab752009-05-16 23:42:17 +0000291 /* The vendor / part name from the coreboot table. */
292 const char *lb_vendor;
293 const char *lb_part;
294
295 const char *vendor_name;
296 const char *board_name;
297
Luc Verhaegen93938c32010-01-20 14:45:03 +0000298 int max_rom_decode_parallel;
Michael Karcher0bdc0922010-02-28 01:33:48 +0000299 int status;
Uwe Hermann36dec8b2010-06-07 19:06:26 +0000300 int (*enable) (void);
Uwe Hermann05fab752009-05-16 23:42:17 +0000301};
302
303extern struct board_pciid_enable board_pciid_enables[];
304
305struct board_info {
306 const char *vendor;
307 const char *name;
Peter Lemenkov4adf8a62010-06-01 10:13:17 +0000308 const int working;
309#ifdef CONFIG_PRINT_WIKI
310 const char *url;
311 const char *note;
312#endif
Uwe Hermann05fab752009-05-16 23:42:17 +0000313};
314
Peter Lemenkov4adf8a62010-06-01 10:13:17 +0000315extern const struct board_info boards_known[];
316extern const struct board_info laptops_known[];
317
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000318#endif
Uwe Hermann05fab752009-05-16 23:42:17 +0000319
Uwe Hermann372eeb52007-12-04 21:49:06 +0000320/* udelay.c */
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000321void myusec_delay(int usecs);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000322void myusec_calibrate_delay(void);
Carl-Daniel Hailfinger36cc1c82009-12-24 03:11:55 +0000323void internal_delay(int usecs);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000324
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000325#if NEED_PCI == 1
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000326/* pcidev.c */
Rudolf Marek68720c72009-05-17 19:39:27 +0000327
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000328extern uint32_t io_base_addr;
329extern struct pci_access *pacc;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000330extern struct pci_dev *pcidev_dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000331struct pcidev_status {
332 uint16_t vendor_id;
333 uint16_t device_id;
334 int status;
335 const char *vendor_name;
336 const char *device_name;
337};
TURBO Jb0912c02009-09-02 23:00:46 +0000338uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs);
339uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000340#endif
Uwe Hermannba290d12009-06-17 12:07:12 +0000341
342/* print.c */
343char *flashbuses_to_text(enum chipbustype bustype);
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000344void print_supported(void);
Andrew Morganc29c2e72010-06-07 22:37:54 +0000345#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000346void print_supported_pcidevs(struct pcidev_status *devs);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000347#endif
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000348void print_supported_wiki(void);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000349
Uwe Hermann372eeb52007-12-04 21:49:06 +0000350/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000351void w836xx_ext_enter(uint16_t port);
352void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000353uint8_t sio_read(uint16_t port, uint8_t reg);
354void sio_write(uint16_t port, uint8_t reg, uint8_t data);
355void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000356int board_flash_enable(const char *vendor, const char *part);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000357
Uwe Hermann372eeb52007-12-04 21:49:06 +0000358/* chipset_enable.c */
359int chipset_flash_enable(void);
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000360
Carl-Daniel Hailfingerb5b161b2010-06-04 19:05:39 +0000361/* processor_enable.c */
362int processor_flash_enable(void);
363
Stefan Reinauer0593f212009-01-26 01:10:48 +0000364/* physmap.c */
365void *physmap(const char *descr, unsigned long phys_addr, size_t len);
Carl-Daniel Hailfingerbaaffe02010-02-02 11:09:03 +0000366void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
Stefan Reinauer0593f212009-01-26 01:10:48 +0000367void physunmap(void *virt_addr, size_t len);
Stefan Reinauer8fa64812009-08-12 09:27:45 +0000368int setup_cpu_msr(int cpu);
369void cleanup_cpu_msr(void);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000370
371/* cbtable.c */
372void lb_vendor_dev_from_string(char *boardstring);
373int coreboot_init(void);
374extern char *lb_part, *lb_vendor;
375extern int partvendor_from_cbtable;
Stefan Reinauer0593f212009-01-26 01:10:48 +0000376
Michael Karcher6701ee82010-01-20 14:14:11 +0000377/* dmi.c */
378extern int has_dmi_support;
379void dmi_init(void);
380int dmi_match(const char *pattern);
381
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000382/* internal.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000383#if NEED_PCI == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000384struct superio {
385 uint16_t vendor;
386 uint16_t port;
387 uint16_t model;
388};
389extern struct superio superio;
390#define SUPERIO_VENDOR_NONE 0x0
391#define SUPERIO_VENDOR_ITE 0x1
Uwe Hermann2cac6862009-05-16 22:05:42 +0000392struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Carl-Daniel Hailfinger9f46cfc2009-11-15 17:13:29 +0000393struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
Uwe Hermann2cac6862009-05-16 22:05:42 +0000394struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
395struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
396 uint16_t card_vendor, uint16_t card_device);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000397#endif
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000398void get_io_perms(void);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +0000399void release_io_perms(void);
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000400#if CONFIG_INTERNAL == 1
Michael Karcher8c1df282010-02-26 09:51:20 +0000401extern int is_laptop;
Michael Karcher0bdc0922010-02-28 01:33:48 +0000402extern int force_boardenable;
Carl-Daniel Hailfinger27023762010-04-28 15:22:14 +0000403extern int force_boardmismatch;
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000404void probe_superio(void);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000405int internal_init(void);
406int internal_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000407void internal_chip_writeb(uint8_t val, chipaddr addr);
408void internal_chip_writew(uint16_t val, chipaddr addr);
409void internal_chip_writel(uint32_t val, chipaddr addr);
410uint8_t internal_chip_readb(const chipaddr addr);
411uint16_t internal_chip_readw(const chipaddr addr);
412uint32_t internal_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000413void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000414#endif
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000415void mmio_writeb(uint8_t val, void *addr);
416void mmio_writew(uint16_t val, void *addr);
417void mmio_writel(uint32_t val, void *addr);
418uint8_t mmio_readb(void *addr);
419uint16_t mmio_readw(void *addr);
420uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000421void mmio_le_writeb(uint8_t val, void *addr);
422void mmio_le_writew(uint16_t val, void *addr);
423void mmio_le_writel(uint32_t val, void *addr);
424uint8_t mmio_le_readb(void *addr);
425uint16_t mmio_le_readw(void *addr);
426uint32_t mmio_le_readl(void *addr);
Carl-Daniel Hailfingercc1802d2010-01-06 10:21:00 +0000427
428/* programmer.c */
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000429int noop_shutdown(void);
Uwe Hermannc6915932009-05-17 23:12:17 +0000430void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
431void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000432uint8_t noop_chip_readb(const chipaddr addr);
433void noop_chip_writeb(uint8_t val, chipaddr addr);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000434void fallback_chip_writew(uint16_t val, chipaddr addr);
435void fallback_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000436void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000437uint16_t fallback_chip_readw(const chipaddr addr);
438uint32_t fallback_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000439void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000440
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000441/* dummyflasher.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000442#if CONFIG_DUMMY == 1
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000443int dummy_init(void);
444int dummy_shutdown(void);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000445void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
446void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000447void dummy_chip_writeb(uint8_t val, chipaddr addr);
448void dummy_chip_writew(uint16_t val, chipaddr addr);
449void dummy_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000450void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000451uint8_t dummy_chip_readb(const chipaddr addr);
452uint16_t dummy_chip_readw(const chipaddr addr);
453uint32_t dummy_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000454void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000455int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000456 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger1b0ba892010-06-20 10:58:32 +0000457int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000458#endif
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000459
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000460/* nic3com.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000461#if CONFIG_NIC3COM == 1
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000462int nic3com_init(void);
463int nic3com_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000464void nic3com_chip_writeb(uint8_t val, chipaddr addr);
465uint8_t nic3com_chip_readb(const chipaddr addr);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000466extern struct pcidev_status nics_3com[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000467#endif
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000468
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000469/* gfxnvidia.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000470#if CONFIG_GFXNVIDIA == 1
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000471int gfxnvidia_init(void);
472int gfxnvidia_shutdown(void);
473void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
474uint8_t gfxnvidia_chip_readb(const chipaddr addr);
475extern struct pcidev_status gfx_nvidia[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000476#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000477
TURBO Jb0912c02009-09-02 23:00:46 +0000478/* drkaiser.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000479#if CONFIG_DRKAISER == 1
TURBO Jb0912c02009-09-02 23:00:46 +0000480int drkaiser_init(void);
481int drkaiser_shutdown(void);
482void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
483uint8_t drkaiser_chip_readb(const chipaddr addr);
484extern struct pcidev_status drkaiser_pcidev[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000485#endif
TURBO Jb0912c02009-09-02 23:00:46 +0000486
Joerg Fischer5665ef32010-05-21 21:54:07 +0000487/* nicrealtek.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000488#if CONFIG_NICREALTEK == 1
Joerg Fischer5665ef32010-05-21 21:54:07 +0000489int nicrealtek_init(void);
490int nicsmc1211_init(void);
491int nicrealtek_shutdown(void);
492void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
493uint8_t nicrealtek_chip_readb(const chipaddr addr);
494extern struct pcidev_status nics_realtek[];
495extern struct pcidev_status nics_realteksmc1211[];
496#endif
497
Andrew Morganc29c2e72010-06-07 22:37:54 +0000498/* nicnatsemi.c */
499#if CONFIG_NICNATSEMI == 1
500int nicnatsemi_init(void);
501int nicnatsemi_shutdown(void);
502void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);
503uint8_t nicnatsemi_chip_readb(const chipaddr addr);
504extern struct pcidev_status nics_natsemi[];
505#endif
Joerg Fischer5665ef32010-05-21 21:54:07 +0000506
Rudolf Marek68720c72009-05-17 19:39:27 +0000507/* satasii.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000508#if CONFIG_SATASII == 1
Rudolf Marek68720c72009-05-17 19:39:27 +0000509int satasii_init(void);
510int satasii_shutdown(void);
Rudolf Marek68720c72009-05-17 19:39:27 +0000511void satasii_chip_writeb(uint8_t val, chipaddr addr);
512uint8_t satasii_chip_readb(const chipaddr addr);
513extern struct pcidev_status satas_sii[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000514#endif
Rudolf Marek68720c72009-05-17 19:39:27 +0000515
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000516/* atahpt.c */
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000517#if CONFIG_ATAHPT == 1
Uwe Hermannddd5c9e2010-02-21 21:17:00 +0000518int atahpt_init(void);
519int atahpt_shutdown(void);
520void atahpt_chip_writeb(uint8_t val, chipaddr addr);
521uint8_t atahpt_chip_readb(const chipaddr addr);
522extern struct pcidev_status ata_hpt[];
523#endif
524
Paul Fox05dfbe62009-06-16 21:08:06 +0000525/* ft2232_spi.c */
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000526#define FTDI_FT2232H 0x6010
527#define FTDI_FT4232H 0x6011
Paul Fox05dfbe62009-06-16 21:08:06 +0000528int ft2232_spi_init(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000529int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
Paul Fox05dfbe62009-06-16 21:08:06 +0000530int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Paul Fox05dfbe62009-06-16 21:08:06 +0000531int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
532
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000533/* bitbang_spi.c */
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000534extern int bitbang_spi_half_period;
535extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000536int bitbang_spi_init(void);
537int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
538int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
539int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
540
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000541/* buspirate_spi.c */
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000542struct buspirate_spispeeds {
543 const char *name;
544 const int speed;
545};
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000546int buspirate_spi_init(void);
547int buspirate_spi_shutdown(void);
548int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
549int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger408e47a2010-03-22 03:30:58 +0000550int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000551
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000552/* dediprog.c */
553int dediprog_init(void);
554int dediprog_shutdown(void);
555int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
556int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
557
Uwe Hermann0846f892007-08-23 13:34:59 +0000558/* flashrom.c */
Carl-Daniel Hailfingere8e369f2010-03-08 00:42:32 +0000559enum write_granularity {
560 write_gran_1bit,
561 write_gran_1byte,
562 write_gran_256bytes,
563};
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000564extern enum chipbustype buses_supported;
565struct decode_sizes {
566 uint32_t parallel;
567 uint32_t lpc;
568 uint32_t fwh;
569 uint32_t spi;
570};
571extern struct decode_sizes max_rom_decode;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000572extern char *programmer_param;
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000573extern unsigned long flashbase;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000574extern int verbose;
Carl-Daniel Hailfingera80cfbc2009-07-22 20:13:00 +0000575extern const char *flashrom_version;
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000576extern char *chip_to_probe;
Peter Stuge776d2022009-01-26 00:39:57 +0000577void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000578int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000579int erase_flash(struct flashchip *flash);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000580struct flashchip *probe_flash(struct flashchip *first_flash, int force);
581int read_flash(struct flashchip *flash, char *filename);
582void check_chip_supported(struct flashchip *flash);
583int check_max_decode(enum chipbustype buses, uint32_t size);
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +0000584int min(int a, int b);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000585int max(int a, int b);
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000586char *extract_param(char **haystack, char *needle, char *delim);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000587int check_erased_range(struct flashchip *flash, int start, int len);
588int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
Carl-Daniel Hailfingere8e369f2010-03-08 00:42:32 +0000589int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran);
Uwe Hermannba290d12009-06-17 12:07:12 +0000590char *strcat_realloc(char *dest, const char *src);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000591void print_version(void);
Carl-Daniel Hailfinger8841d3e2010-05-15 15:04:37 +0000592void print_banner(void);
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000593int selfcheck(void);
Carl-Daniel Hailfinger552420b2009-12-24 02:15:55 +0000594int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it);
Uwe Hermannba290d12009-06-17 12:07:12 +0000595
596#define OK 0
597#define NT 1 /* Not tested */
Uwe Hermann0846f892007-08-23 13:34:59 +0000598
Sean Nelson51e97d72010-01-07 20:09:33 +0000599/* cli_output.c */
Carl-Daniel Hailfinger9f5f2152010-06-04 23:20:21 +0000600/* Let gcc and clang check for correct printf-style format strings. */
601int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
Carl-Daniel Hailfingerf8dda682010-01-09 03:22:31 +0000602#define MSG_ERROR 0
603#define MSG_INFO 1
604#define MSG_DEBUG 2
605#define MSG_BARF 3
606#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
607#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
608#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
609#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
610#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
611#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
612#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
613#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
614#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
615#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
616#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
617#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
Sean Nelson51e97d72010-01-07 20:09:33 +0000618
Carl-Daniel Hailfingera84835a2010-01-07 03:24:05 +0000619/* cli_classic.c */
620int cli_classic(int argc, char *argv[]);
621
Uwe Hermann0846f892007-08-23 13:34:59 +0000622/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000623int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000624int read_romlayout(char *name);
625int find_romentry(char *name);
Carl-Daniel Hailfingerf5fb51c2009-08-19 15:19:18 +0000626int handle_romentries(uint8_t *buffer, struct flashchip *flash);
Uwe Hermann0846f892007-08-23 13:34:59 +0000627
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000628/* spi.c */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000629enum spi_controller {
630 SPI_CONTROLLER_NONE,
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000631#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000632#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000633 SPI_CONTROLLER_ICH7,
634 SPI_CONTROLLER_ICH9,
635 SPI_CONTROLLER_IT87XX,
636 SPI_CONTROLLER_SB600,
637 SPI_CONTROLLER_VIA,
638 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000639#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000640#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000641#if CONFIG_FT2232_SPI == 1
Paul Fox05dfbe62009-06-16 21:08:06 +0000642 SPI_CONTROLLER_FT2232,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000643#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000644#if CONFIG_DUMMY == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000645 SPI_CONTROLLER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000646#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000647#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000648 SPI_CONTROLLER_BUSPIRATE,
649#endif
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000650#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000651 SPI_CONTROLLER_DEDIPROG,
652#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000653 SPI_CONTROLLER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000654};
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000655extern const int spi_programmer_count;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000656struct spi_command {
657 unsigned int writecnt;
658 unsigned int readcnt;
659 const unsigned char *writearr;
660 unsigned char *readarr;
661};
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000662struct spi_programmer {
663 int (*command)(unsigned int writecnt, unsigned int readcnt,
664 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000665 int (*multicommand)(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000666
667 /* Optimized functions for this programmer */
668 int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
669 int (*write_256)(struct flashchip *flash, uint8_t *buf);
670};
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000671
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000672extern enum spi_controller spi_controller;
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000673extern const struct spi_programmer spi_programmer[];
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000674extern void *spibar;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000675int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000676 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000677int spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000678int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
679 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000680int default_spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000681uint32_t spi_get_valid_read_addr(void);
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000682
Dominik Geyerb46acba2008-05-16 12:55:55 +0000683/* ichspi.c */
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000684extern int ichspi_lock;
685extern uint32_t ichspi_bbar;
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000686int ich_init_opcodes(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000687int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000688 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000689int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000690int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000691int ich_spi_send_multicommand(struct spi_command *cmds);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000692
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000693/* it87spi.c */
694extern uint16_t it8716f_flashport;
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000695void enter_conf_mode_ite(uint16_t port);
696void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000697struct superio probe_superio_ite(void);
Carl-Daniel Hailfingerb8afecd2009-05-31 18:00:57 +0000698int it87spi_init(void);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000699int it87xx_probe_spi_flash(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000700int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000701 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000702int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000703int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000704
Jason Wanga3f04be2008-11-28 21:36:51 +0000705/* sb600spi.c */
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000706int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +0000707 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000708int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000709int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000710extern uint8_t *sb600_spibar;
Jason Wanga3f04be2008-11-28 21:36:51 +0000711
Peter Stugebf196e92009-01-26 03:08:45 +0000712/* wbsio_spi.c */
Uwe Hermann36dec8b2010-06-07 19:06:26 +0000713int wbsio_check_for_spi(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000714int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000715 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000716int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000717int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000718
Urja Rannikko22915352009-06-23 11:33:43 +0000719/* serprog.c */
Urja Rannikko22915352009-06-23 11:33:43 +0000720int serprog_init(void);
721int serprog_shutdown(void);
722void serprog_chip_writeb(uint8_t val, chipaddr addr);
723uint8_t serprog_chip_readb(const chipaddr addr);
724void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
725void serprog_delay(int delay);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000726
727/* serial.c */
Patrick Georgie48654c2010-01-06 22:14:39 +0000728#if _WIN32
729typedef HANDLE fdtype;
730#else
731typedef int fdtype;
732#endif
733
Carl-Daniel Hailfingera4a9bfb2009-11-21 11:02:48 +0000734void sp_flush_incoming(void);
Patrick Georgie48654c2010-01-06 22:14:39 +0000735fdtype sp_openserport(char *dev, unsigned int baud);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000736void __attribute__((noreturn)) sp_die(char *msg);
Patrick Georgie48654c2010-01-06 22:14:39 +0000737extern fdtype sp_fd;
Carl-Daniel Hailfingerefa151e2010-01-06 16:09:10 +0000738int serialport_shutdown(void);
739int serialport_write(unsigned char *buf, unsigned int writecnt);
740int serialport_read(unsigned char *buf, unsigned int readcnt);
Uwe Hermann1432a602009-06-28 23:26:37 +0000741
Ollie Lho761bf1b2004-03-20 16:46:10 +0000742#endif /* !__FLASH_H__ */