blob: 3bf292d8dbf8f6469f8746d5d089c11680879ae0 [file] [log] [blame]
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __PROGRAMMER_H__
25#define __PROGRAMMER_H__ 1
26
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000028
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000029enum programmer {
30#if CONFIG_INTERNAL == 1
31 PROGRAMMER_INTERNAL,
32#endif
33#if CONFIG_DUMMY == 1
34 PROGRAMMER_DUMMY,
35#endif
36#if CONFIG_NIC3COM == 1
37 PROGRAMMER_NIC3COM,
38#endif
39#if CONFIG_NICREALTEK == 1
40 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000041#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042#if CONFIG_NICNATSEMI == 1
43 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000044#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000045#if CONFIG_GFXNVIDIA == 1
46 PROGRAMMER_GFXNVIDIA,
47#endif
48#if CONFIG_DRKAISER == 1
49 PROGRAMMER_DRKAISER,
50#endif
51#if CONFIG_SATASII == 1
52 PROGRAMMER_SATASII,
53#endif
54#if CONFIG_ATAHPT == 1
55 PROGRAMMER_ATAHPT,
56#endif
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +000057#if CONFIG_ATAVIA == 1
58 PROGRAMMER_ATAVIA,
59#endif
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000060#if CONFIG_IT8212 == 1
61 PROGRAMMER_IT8212,
62#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000063#if CONFIG_FT2232_SPI == 1
64 PROGRAMMER_FT2232_SPI,
65#endif
66#if CONFIG_SERPROG == 1
67 PROGRAMMER_SERPROG,
68#endif
69#if CONFIG_BUSPIRATE_SPI == 1
70 PROGRAMMER_BUSPIRATE_SPI,
71#endif
72#if CONFIG_DEDIPROG == 1
73 PROGRAMMER_DEDIPROG,
74#endif
75#if CONFIG_RAYER_SPI == 1
76 PROGRAMMER_RAYER_SPI,
77#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000078#if CONFIG_PONY_SPI == 1
79 PROGRAMMER_PONY_SPI,
80#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000081#if CONFIG_NICINTEL == 1
82 PROGRAMMER_NICINTEL,
83#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000084#if CONFIG_NICINTEL_SPI == 1
85 PROGRAMMER_NICINTEL_SPI,
86#endif
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +000087#if CONFIG_NICINTEL_EEPROM == 1
88 PROGRAMMER_NICINTEL_EEPROM,
89#endif
Mark Marshall90021f22010-12-03 14:48:11 +000090#if CONFIG_OGP_SPI == 1
91 PROGRAMMER_OGP_SPI,
92#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000093#if CONFIG_SATAMV == 1
94 PROGRAMMER_SATAMV,
95#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +000096#if CONFIG_LINUX_SPI == 1
97 PROGRAMMER_LINUX_SPI,
98#endif
James Lairdc60de0e2013-03-27 13:00:23 +000099#if CONFIG_USBBLASTER_SPI == 1
100 PROGRAMMER_USBBLASTER_SPI,
101#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000102#if CONFIG_MSTARDDC_SPI == 1
103 PROGRAMMER_MSTARDDC_SPI,
104#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000105#if CONFIG_PICKIT2_SPI == 1
106 PROGRAMMER_PICKIT2_SPI,
107#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000108 PROGRAMMER_INVALID /* This must always be the last entry. */
109};
110
Stefan Tauneraf358d62012-12-27 18:40:26 +0000111enum programmer_type {
112 PCI = 1, /* to detect uninitialized values */
113 USB,
114 OTHER,
115};
116
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000117struct dev_entry {
118 uint16_t vendor_id;
119 uint16_t device_id;
120 const enum test_state status;
121 const char *vendor_name;
122 const char *device_name;
123};
124
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000125struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000126 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000127 const enum programmer_type type;
128 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000129 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000130 const char *const note;
131 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000132
133 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000134
Stefan Tauner305e0b92013-07-17 23:46:44 +0000135 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000136 void (*unmap_flash_region) (void *virt_addr, size_t len);
137
Stefan Taunerf80419c2014-05-02 15:41:42 +0000138 void (*delay) (unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000139};
140
141extern const struct programmer_entry programmer_table[];
142
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000143int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000144int programmer_shutdown(void);
145
146enum bitbang_spi_master_type {
147 BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
148#if CONFIG_RAYER_SPI == 1
149 BITBANG_SPI_MASTER_RAYER,
150#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000151#if CONFIG_PONY_SPI == 1
152 BITBANG_SPI_MASTER_PONY,
153#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +0000154#if CONFIG_NICINTEL_SPI == 1
155 BITBANG_SPI_MASTER_NICINTEL,
156#endif
Carl-Daniel Hailfinger2f436162010-07-28 15:08:35 +0000157#if CONFIG_INTERNAL == 1
158#if defined(__i386__) || defined(__x86_64__)
159 BITBANG_SPI_MASTER_MCP,
160#endif
161#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000162#if CONFIG_OGP_SPI == 1
163 BITBANG_SPI_MASTER_OGP,
164#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000165};
166
167struct bitbang_spi_master {
168 enum bitbang_spi_master_type type;
169
170 /* Note that CS# is active low, so val=0 means the chip is active. */
171 void (*set_cs) (int val);
172 void (*set_sck) (int val);
173 void (*set_mosi) (int val);
174 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000175 void (*request_bus) (void);
176 void (*release_bus) (void);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000177 /* Length of half a clock period in usecs. */
178 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000179};
180
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000181#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000182struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000183
184/* pcidev.c */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000185// FIXME: This needs to be local, not global(?)
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000186extern struct pci_access *pacc;
187int pci_init_common(void);
188uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
189struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
190/* rpci_write_* are reversible writes. The original PCI config space register
191 * contents will be restored on shutdown.
192 */
193int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
194int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
195int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
196#endif
197
198#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000199struct penable {
200 uint16_t vendor_id;
201 uint16_t device_id;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000202 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000203 const char *vendor_name;
204 const char *device_name;
205 int (*doit) (struct pci_dev *dev, const char *name);
206};
207
208extern const struct penable chipset_enables[];
209
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000210enum board_match_phase {
211 P1,
212 P2,
213 P3
214};
215
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000216struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000217 /* Any device, but make it sensible, like the ISA bridge. */
218 uint16_t first_vendor;
219 uint16_t first_device;
220 uint16_t first_card_vendor;
221 uint16_t first_card_device;
222
223 /* Any device, but make it sensible, like
224 * the host bridge. May be NULL.
225 */
226 uint16_t second_vendor;
227 uint16_t second_device;
228 uint16_t second_card_vendor;
229 uint16_t second_card_device;
230
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000231 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000232 const char *dmi_pattern;
233
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000234 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000235 const char *lb_vendor;
236 const char *lb_part;
237
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000238 enum board_match_phase phase;
239
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000240 const char *vendor_name;
241 const char *board_name;
242
243 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000244 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000245 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000246};
247
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000248extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000249
250struct board_info {
251 const char *vendor;
252 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000253 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000254#ifdef CONFIG_PRINT_WIKI
255 const char *url;
256 const char *note;
257#endif
258};
259
260extern const struct board_info boards_known[];
261extern const struct board_info laptops_known[];
262#endif
263
264/* udelay.c */
Stefan Taunerf80419c2014-05-02 15:41:42 +0000265void myusec_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000266void myusec_calibrate_delay(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000267void internal_sleep(unsigned int usecs);
268void internal_delay(unsigned int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000269
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000270#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000271/* board_enable.c */
Stefan Tauner600576b2014-06-12 22:57:36 +0000272int selfcheck_board_enables(void);
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000273int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000274void w836xx_ext_enter(uint16_t port);
275void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000276void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000277int it8705f_write_enable(uint8_t port);
278uint8_t sio_read(uint16_t port, uint8_t reg);
279void sio_write(uint16_t port, uint8_t reg, uint8_t data);
280void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000281void board_handle_before_superio(void);
282void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000283int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000284
285/* chipset_enable.c */
286int chipset_flash_enable(void);
287
288/* processor_enable.c */
289int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000290#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000291
292/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000293void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000294void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000295void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000296void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000297void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000298void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000299#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000300int setup_cpu_msr(int cpu);
301void cleanup_cpu_msr(void);
302
303/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000304int cb_parse_table(const char **vendor, const char **model);
305int cb_check_image(uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000306
307/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000308#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000309extern int has_dmi_support;
310void dmi_init(void);
311int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000312#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000313
314/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315struct superio {
316 uint16_t vendor;
317 uint16_t port;
318 uint16_t model;
319};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000320extern struct superio superios[];
321extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000322#define SUPERIO_VENDOR_NONE 0x0
323#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000324#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000325#endif
326#if NEED_PCI == 1
Uwe Hermann24c35e42011-07-13 11:22:03 +0000327struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000328struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
329struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
330 uint16_t card_vendor, uint16_t card_device);
331#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000332int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000333#if CONFIG_INTERNAL == 1
334extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000335extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000336extern int force_boardenable;
337extern int force_boardmismatch;
338void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000339int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000340extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000341int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000342#endif
343
344/* hwaccess.c */
345void mmio_writeb(uint8_t val, void *addr);
346void mmio_writew(uint16_t val, void *addr);
347void mmio_writel(uint32_t val, void *addr);
348uint8_t mmio_readb(void *addr);
349uint16_t mmio_readw(void *addr);
350uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerccd71c22012-03-01 22:38:27 +0000351void mmio_readn(void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000352void mmio_le_writeb(uint8_t val, void *addr);
353void mmio_le_writew(uint16_t val, void *addr);
354void mmio_le_writel(uint32_t val, void *addr);
355uint8_t mmio_le_readb(void *addr);
356uint16_t mmio_le_readw(void *addr);
357uint32_t mmio_le_readl(void *addr);
358#define pci_mmio_writeb mmio_le_writeb
359#define pci_mmio_writew mmio_le_writew
360#define pci_mmio_writel mmio_le_writel
361#define pci_mmio_readb mmio_le_readb
362#define pci_mmio_readw mmio_le_readw
363#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000364void rmmio_writeb(uint8_t val, void *addr);
365void rmmio_writew(uint16_t val, void *addr);
366void rmmio_writel(uint32_t val, void *addr);
367void rmmio_le_writeb(uint8_t val, void *addr);
368void rmmio_le_writew(uint16_t val, void *addr);
369void rmmio_le_writel(uint32_t val, void *addr);
370#define pci_rmmio_writeb rmmio_le_writeb
371#define pci_rmmio_writew rmmio_le_writew
372#define pci_rmmio_writel rmmio_le_writel
373void rmmio_valb(void *addr);
374void rmmio_valw(void *addr);
375void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000376
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000377/* dummyflasher.c */
378#if CONFIG_DUMMY == 1
379int dummy_init(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000380void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000381void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000382#endif
383
384/* nic3com.c */
385#if CONFIG_NIC3COM == 1
386int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000387extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000388#endif
389
390/* gfxnvidia.c */
391#if CONFIG_GFXNVIDIA == 1
392int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000393extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000394#endif
395
396/* drkaiser.c */
397#if CONFIG_DRKAISER == 1
398int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000399extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000400#endif
401
402/* nicrealtek.c */
403#if CONFIG_NICREALTEK == 1
404int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000405extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000406#endif
407
408/* nicnatsemi.c */
409#if CONFIG_NICNATSEMI == 1
410int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000411extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000412#endif
413
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000414/* nicintel.c */
415#if CONFIG_NICINTEL == 1
416int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000417extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000418#endif
419
Idwer Vollering004f4b72010-09-03 18:21:21 +0000420/* nicintel_spi.c */
421#if CONFIG_NICINTEL_SPI == 1
422int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000423extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000424#endif
425
Ricardo Ribalda Delgado2a41f0a2014-07-28 20:35:21 +0000426/* nicintel_eeprom.c */
427#if CONFIG_NICINTEL_EEPROM == 1
428int nicintel_ee_init(void);
429extern const struct dev_entry nics_intel_ee[];
430#endif
431
Mark Marshall90021f22010-12-03 14:48:11 +0000432/* ogp_spi.c */
433#if CONFIG_OGP_SPI == 1
434int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000435extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000436#endif
437
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000438/* satamv.c */
439#if CONFIG_SATAMV == 1
440int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000441extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000442#endif
443
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000444/* satasii.c */
445#if CONFIG_SATASII == 1
446int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000447extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000448#endif
449
450/* atahpt.c */
451#if CONFIG_ATAHPT == 1
452int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000453extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000454#endif
455
Jonathan Kollasch7f0f3fa2014-06-01 10:26:23 +0000456/* atavia.c */
457#if CONFIG_ATAVIA == 1
458int atavia_init(void);
459void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len);
460extern const struct dev_entry ata_via[];
461#endif
462
Kyösti Mälkki72d42f82014-06-01 23:48:31 +0000463/* it8212.c */
464#if CONFIG_IT8212 == 1
465int it8212_init(void);
466extern const struct dev_entry devs_it8212[];
467#endif
468
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000469/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000470#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000471int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000472extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000473#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000474
James Lairdc60de0e2013-03-27 13:00:23 +0000475/* usbblaster_spi.c */
476#if CONFIG_USBBLASTER_SPI == 1
477int usbblaster_spi_init(void);
478extern const struct dev_entry devs_usbblasterspi[];
479#endif
480
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000481/* mstarddc_spi.c */
482#if CONFIG_MSTARDDC_SPI == 1
483int mstarddc_spi_init(void);
484#endif
485
Justin Chevrier66e554b2015-02-08 21:58:10 +0000486/* pickit2_spi.c */
487#if CONFIG_PICKIT2_SPI == 1
488int pickit2_spi_init(void);
489#endif
490
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000491/* rayer_spi.c */
492#if CONFIG_RAYER_SPI == 1
493int rayer_spi_init(void);
494#endif
495
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000496/* pony_spi.c */
497#if CONFIG_PONY_SPI == 1
498int pony_spi_init(void);
499#endif
500
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000501/* bitbang_spi.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000502int register_spi_bitbang_master(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000503
504/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000505#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000506int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000507#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000508
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000509/* linux_spi.c */
510#if CONFIG_LINUX_SPI == 1
511int linux_spi_init(void);
512#endif
513
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000514/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000515#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000516int dediprog_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000517#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000518
519/* flashrom.c */
520struct decode_sizes {
521 uint32_t parallel;
522 uint32_t lpc;
523 uint32_t fwh;
524 uint32_t spi;
525};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000526// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000527extern struct decode_sizes max_rom_decode;
528extern int programmer_may_write;
529extern unsigned long flashbase;
Stefan Tauner9e3a6982014-08-15 17:17:59 +0000530unsigned int count_max_decode_exceedings(const struct flashctx *flash);
Stefan Tauner66652442011-06-26 17:38:17 +0000531char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000532
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000533/* spi.c */
534enum spi_controller {
535 SPI_CONTROLLER_NONE,
536#if CONFIG_INTERNAL == 1
537#if defined(__i386__) || defined(__x86_64__)
538 SPI_CONTROLLER_ICH7,
539 SPI_CONTROLLER_ICH9,
David Hendricks4e748392011-02-28 23:58:15 +0000540 SPI_CONTROLLER_IT85XX,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000541 SPI_CONTROLLER_IT87XX,
542 SPI_CONTROLLER_SB600,
Wei Hu31402ee2014-05-16 21:39:33 +0000543 SPI_CONTROLLER_YANGTZE,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000544 SPI_CONTROLLER_VIA,
545 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000546#endif
547#endif
548#if CONFIG_FT2232_SPI == 1
549 SPI_CONTROLLER_FT2232,
550#endif
551#if CONFIG_DUMMY == 1
552 SPI_CONTROLLER_DUMMY,
553#endif
554#if CONFIG_BUSPIRATE_SPI == 1
555 SPI_CONTROLLER_BUSPIRATE,
556#endif
557#if CONFIG_DEDIPROG == 1
558 SPI_CONTROLLER_DEDIPROG,
559#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000560#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__)))
Michael Karcherb9dbe482011-05-11 17:07:07 +0000561 SPI_CONTROLLER_BITBANG,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000562#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000563#if CONFIG_LINUX_SPI == 1
564 SPI_CONTROLLER_LINUX,
565#endif
Urja Rannikkoc93f5f12011-09-15 23:38:14 +0000566#if CONFIG_SERPROG == 1
567 SPI_CONTROLLER_SERPROG,
568#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000569#if CONFIG_USBBLASTER_SPI == 1
570 SPI_CONTROLLER_USBBLASTER,
571#endif
Alexandre Boeglin80e64712014-12-20 20:25:19 +0000572#if CONFIG_MSTARDDC_SPI == 1
573 SPI_CONTROLLER_MSTARDDC,
574#endif
Justin Chevrier66e554b2015-02-08 21:58:10 +0000575#if CONFIG_PICKIT2_SPI == 1
576 SPI_CONTROLLER_PICKIT2,
577#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000578};
Michael Karcher62797512011-05-11 17:07:02 +0000579
580#define MAX_DATA_UNSPECIFIED 0
581#define MAX_DATA_READ_UNLIMITED 64 * 1024
582#define MAX_DATA_WRITE_UNLIMITED 256
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000583struct spi_master {
Michael Karcherb9dbe482011-05-11 17:07:07 +0000584 enum spi_controller type;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000585 unsigned int max_data_read;
586 unsigned int max_data_write;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000587 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000588 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000589 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000590
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000591 /* Optimized functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000592 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000593 int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
594 int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000595 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000596};
597
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000598int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000599 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000600int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000601int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000602int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
603int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000604int register_spi_master(const struct spi_master *mst);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000605
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000606/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000607enum ich_chipset {
608 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000609 CHIPSET_ICH,
610 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000611 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000612 CHIPSET_POULSBO, /* SCH U* */
613 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
614 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000615 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000616 CHIPSET_ICH8,
617 CHIPSET_ICH9,
618 CHIPSET_ICH10,
619 CHIPSET_5_SERIES_IBEX_PEAK,
620 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000621 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000622 CHIPSET_8_SERIES_LYNX_POINT,
Duncan Laurie4095ed72014-08-20 15:39:32 +0000623 CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
Duncan Laurie90eb2262013-03-15 03:12:29 +0000624 CHIPSET_8_SERIES_LYNX_POINT_LP,
625 CHIPSET_8_SERIES_WELLSBURG,
Duncan Laurie823096e2014-08-20 15:39:38 +0000626 CHIPSET_9_SERIES_WILDCAT_POINT,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000627};
628
Stefan Tauner2abab942012-04-27 20:41:23 +0000629/* ichspi.c */
630#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000631extern uint32_t ichspi_bbar;
Stefan Tauner92d6a862013-10-25 00:33:37 +0000632int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation);
Helge Wagnerdd73d832012-08-24 23:03:46 +0000633int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000634
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000635/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000636int amd_imc_shutdown(struct pci_dev *dev);
637
David Hendricks4e748392011-02-28 23:58:15 +0000638/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000639int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000640
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000641/* it87spi.c */
642void enter_conf_mode_ite(uint16_t port);
643void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000644void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000645int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000646
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000647/* mcp6x_spi.c */
648int mcp6x_spi_init(int want_spi);
649
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000650/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000651int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000652
653/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000654int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000655#endif
656
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000657/* opaque.c */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000658struct opaque_master {
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000659 int max_data_read;
660 int max_data_write;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000661 /* Specific functions for this master */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000662 int (*probe) (struct flashctx *flash);
663 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000664 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000665 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000666 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000667};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000668int register_opaque_master(const struct opaque_master *mst);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000669
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000670/* programmer.c */
671int noop_shutdown(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000672void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000673void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000674void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
675void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
676void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000677void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000678uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
679uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
680void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000681struct par_master {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000682 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
683 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
684 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000685 void (*chip_writen) (const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000686 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
687 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
688 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
689 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000690 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000691};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000692int register_par_master(const struct par_master *mst, const enum chipbustype buses);
693struct registered_master {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000694 enum chipbustype buses_supported;
695 union {
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000696 struct par_master par;
697 struct spi_master spi;
698 struct opaque_master opaque;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000699 };
700};
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000701extern struct registered_master registered_masters[];
702extern int registered_master_count;
Stefan Tauner5c316f92015-02-08 21:57:52 +0000703int register_master(const struct registered_master *mst);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000704
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000705/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000706#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000707int serprog_init(void);
Stefan Taunerf80419c2014-05-02 15:41:42 +0000708void serprog_delay(unsigned int usecs);
Urja Rannikko0b4ffd52015-06-29 23:24:23 +0000709void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000710#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000711
712/* serial.c */
Stefan Taunerb0eee9b2015-01-10 09:32:50 +0000713#if IS_WINDOWS
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000714typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000715#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000716#else
717typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000718#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000719#endif
720
721void sp_flush_incoming(void);
722fdtype sp_openserport(char *dev, unsigned int baud);
Stefan Tauner184c52c2013-08-23 21:51:32 +0000723int serialport_config(fdtype fd, unsigned int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000724extern fdtype sp_fd;
David Hendricks8bb20212011-06-14 01:35:36 +0000725/* expose serialport_shutdown as it's currently used by buspirate */
726int serialport_shutdown(void *data);
Mark Marshallf20b7be2014-05-09 21:16:21 +0000727int serialport_write(const unsigned char *buf, unsigned int writecnt);
728int serialport_write_nonblock(const unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000729int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000730int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000731
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000732/* Serial port/pin mapping:
733
734 1 CD <-
735 2 RXD <-
736 3 TXD ->
737 4 DTR ->
738 5 GND --
739 6 DSR <-
740 7 RTS ->
741 8 CTS <-
742 9 RI <-
743*/
744enum SP_PIN {
745 PIN_CD = 1,
746 PIN_RXD,
747 PIN_TXD,
748 PIN_DTR,
749 PIN_GND,
750 PIN_DSR,
751 PIN_RTS,
752 PIN_CTS,
753 PIN_RI,
754};
755
756void sp_set_pin(enum SP_PIN pin, int val);
757int sp_get_pin(enum SP_PIN pin);
758
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000759#endif /* !__PROGRAMMER_H__ */