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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Christian Ruppert0cdb0312009-05-14 18:57:26 +000032#include <pci/pci.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000033
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000034/* for iopl and outb under Solaris */
35#if defined (__sun) && (defined(__i386) || defined(__amd64))
36#include <strings.h>
37#include <sys/sysi86.h>
38#include <sys/psw.h>
39#include <asm/sunddi.h>
40#endif
41
Stefan Reinauerf79edb92009-01-26 01:23:31 +000042#if (defined(__MACH__) && defined(__APPLE__))
43#define __DARWIN__
44#endif
45
Patrick Georgi60622e22009-04-28 12:56:04 +000046#if defined(__FreeBSD__) || defined(__DragonFly__)
Andriy Gapon65c1b862008-05-22 13:22:45 +000047 #include <machine/cpufunc.h>
48 #define off64_t off_t
49 #define lseek64 lseek
50 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
51 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
52 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
53 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
54 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
55 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
56#else
Stefan Reinauerf79edb92009-01-26 01:23:31 +000057#if defined(__DARWIN__)
58 #include <DirectIO/darwinio.h>
59 #define off64_t off_t
60 #define lseek64 lseek
61#endif
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000062#if defined (__sun) && (defined(__i386) || defined(__amd64))
63 /* Note different order for outb */
64 #define OUTB(x,y) outb(y, x)
65 #define OUTW(x,y) outw(y, x)
66 #define OUTL(x,y) outl(y, x)
67 #define INB inb
68 #define INW inw
69 #define INL inl
70#else
Andriy Gapon65c1b862008-05-22 13:22:45 +000071 #define OUTB outb
72 #define OUTW outw
73 #define OUTL outl
74 #define INB inb
75 #define INW inw
76 #define INL inl
77#endif
Carl-Daniel Hailfinger9abf5292009-05-01 16:34:32 +000078#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000079
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000080typedef unsigned long chipaddr;
81
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000082extern int programmer;
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +000083#define PROGRAMMER_INTERNAL 0x00
84#define PROGRAMMER_DUMMY 0x01
Uwe Hermannb4dcb712009-05-13 11:36:06 +000085#define PROGRAMMER_NIC3COM 0x02
Rudolf Marek68720c72009-05-17 19:39:27 +000086#define PROGRAMMER_SATASII 0x03
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000087
88struct programmer_entry {
89 const char *vendor;
90 const char *name;
91
92 int (*init) (void);
93 int (*shutdown) (void);
94
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +000095 void * (*map_flash_region) (const char *descr, unsigned long phys_addr, size_t len);
96 void (*unmap_flash_region) (void *virt_addr, size_t len);
97
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000098 void (*chip_writeb) (uint8_t val, chipaddr addr);
99 void (*chip_writew) (uint16_t val, chipaddr addr);
100 void (*chip_writel) (uint32_t val, chipaddr addr);
101 uint8_t (*chip_readb) (const chipaddr addr);
102 uint16_t (*chip_readw) (const chipaddr addr);
103 uint32_t (*chip_readl) (const chipaddr addr);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000104};
105
106extern const struct programmer_entry programmer_table[];
107
Uwe Hermann09e04f72009-05-16 22:36:00 +0000108int programmer_init(void);
109int programmer_shutdown(void);
110void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
111 size_t len);
112void programmer_unmap_flash_region(void *virt_addr, size_t len);
113void chip_writeb(uint8_t val, chipaddr addr);
114void chip_writew(uint16_t val, chipaddr addr);
115void chip_writel(uint32_t val, chipaddr addr);
116uint8_t chip_readb(const chipaddr addr);
117uint16_t chip_readw(const chipaddr addr);
118uint32_t chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000119
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000120#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
121
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000122struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000123 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000124 const char *name;
Uwe Hermann394131e2008-10-18 21:14:13 +0000125 /*
126 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000127 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
128 * Identification code.
129 */
130 uint32_t manufacture_id;
131 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000132
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000133 int total_size;
134 int page_size;
135
Uwe Hermann394131e2008-10-18 21:14:13 +0000136 /*
137 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000138 * everything worked correctly.
139 */
140 uint32_t tested;
141
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000142 int (*probe) (struct flashchip *flash);
143 int (*erase) (struct flashchip *flash);
144 int (*write) (struct flashchip *flash, uint8_t *buf);
145 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000146
Uwe Hermann372eeb52007-12-04 21:49:06 +0000147 /* Some flash devices have an additional register space. */
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000148 chipaddr virtual_memory;
149 chipaddr virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000150};
151
Peter Stuge1159d582008-05-03 04:34:37 +0000152#define TEST_UNTESTED 0
153
154#define TEST_OK_PROBE (1<<0)
155#define TEST_OK_READ (1<<1)
156#define TEST_OK_ERASE (1<<2)
157#define TEST_OK_WRITE (1<<3)
Mart Raudsepp1d3b0632008-05-27 23:51:55 +0000158#define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000159#define TEST_OK_PRE (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000160#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000161#define TEST_OK_MASK 0x0f
162
163#define TEST_BAD_PROBE (1<<4)
164#define TEST_BAD_READ (1<<5)
165#define TEST_BAD_ERASE (1<<6)
166#define TEST_BAD_WRITE (1<<7)
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000167#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000168#define TEST_BAD_MASK 0xf0
169
Ollie Lho184a4042005-11-26 21:55:36 +0000170extern struct flashchip flashchips[];
171
Uwe Hermann05fab752009-05-16 23:42:17 +0000172struct penable {
173 uint16_t vendor_id;
174 uint16_t device_id;
175 int status;
176 const char *vendor_name;
177 const char *device_name;
178 int (*doit) (struct pci_dev *dev, const char *name);
179};
180
181extern const struct penable chipset_enables[];
182
183struct board_pciid_enable {
184 /* Any device, but make it sensible, like the ISA bridge. */
185 uint16_t first_vendor;
186 uint16_t first_device;
187 uint16_t first_card_vendor;
188 uint16_t first_card_device;
189
190 /* Any device, but make it sensible, like
191 * the host bridge. May be NULL.
192 */
193 uint16_t second_vendor;
194 uint16_t second_device;
195 uint16_t second_card_vendor;
196 uint16_t second_card_device;
197
198 /* The vendor / part name from the coreboot table. */
199 const char *lb_vendor;
200 const char *lb_part;
201
202 const char *vendor_name;
203 const char *board_name;
204
205 int (*enable) (const char *name);
206};
207
208extern struct board_pciid_enable board_pciid_enables[];
209
210struct board_info {
211 const char *vendor;
212 const char *name;
213};
214
215extern const struct board_info boards_ok[];
216extern const struct board_info boards_bad[];
217
Uwe Hermann372eeb52007-12-04 21:49:06 +0000218/*
219 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000220 * entry of each section should be the manufacturer ID, followed by the
221 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +0000222 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000223 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
224 * continuation code.
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000225 * SPI parts have 16-bit device IDs if they support RDID.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000226 */
227
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000228#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
229
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000230#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000231
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000232#define AMD_ID 0x01 /* AMD */
Mats Erik Anderssoncbfed282008-10-07 12:21:12 +0000233#define AM_29F002BT 0xB0
234#define AM_29F002BB 0x34
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000235#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +0000236#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000237#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000238
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000239#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000240#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Rudolf Marekdcf46532008-05-22 13:42:23 +0000241#define AMIC_A25L40P 0x2013
Carl-Daniel Hailfinger8b114392008-07-06 23:04:01 +0000242#define AMIC_A29002B 0x0d
243#define AMIC_A29002T 0x8c
244#define AMIC_A29040B 0x86
Jens Kuehnelb9f61742008-06-18 13:36:34 +0000245#define AMIC_A49LF040A 0x9d
Peter Lemenkov539478d2007-10-22 20:36:16 +0000246
Carl-Daniel Hailfingercbdd4f02009-05-06 21:54:22 +0000247/* This chip vendor/device ID is probably a misinterpreted LHA header. */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000248#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000249#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000250
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000251#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000252#define AT_25DF021 0x4300
253#define AT_25DF041A 0x4401
254#define AT_25DF081 0x4502
255#define AT_25DF161 0x4602
256#define AT_25DF321 0x4700 /* also 26DF321 */
257#define AT_25DF321A 0x4701
258#define AT_25DF641 0x4800
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000259#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
260#define AT_25F512B 0x6500
261#define AT_25FS010 0x6601
262#define AT_25FS040 0x6604
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000263#define AT_26DF041 0x4400
264#define AT_26DF081 0x4500 /* guessed, no datasheet available */
265#define AT_26DF081A 0x4501
266#define AT_26DF161 0x4600
267#define AT_26DF161A 0x4601
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000268#define AT_26DF321 0x4700 /* also 25DF321 */
269#define AT_26F004 0x0400
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000270#define AT_29C040A 0xA4
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000271#define AT_29C010A 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000272#define AT_29C020 0xDA
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000273#define AT_45BR3214B /* No ID available */
274#define AT_45CS1282 0x2920
275#define AT_45D011 /* No ID available */
276#define AT_45D021A /* No ID available */
277#define AT_45D041A /* No ID available */
278#define AT_45D081A /* No ID available */
279#define AT_45D161 /* No ID available */
280#define AT_45DB011 /* No ID available */
281#define AT_45DB011B /* No ID available */
282#define AT_45DB011D 0x2200
283#define AT_45DB021A /* No ID available */
284#define AT_45DB021B /* No ID available */
285#define AT_45DB021D 0x2300
286#define AT_45DB041A /* No ID available */
287#define AT_45DB041D 0x2400
288#define AT_45DB081A /* No ID available */
289#define AT_45DB081D 0x2500
290#define AT_45DB161 /* No ID available */
291#define AT_45DB161B /* No ID available */
292#define AT_45DB161D 0x2600
293#define AT_45DB321 /* No ID available */
294#define AT_45DB321B /* No ID available */
295#define AT_45DB321C 0x2700
296#define AT_45DB321D 0x2701 /* Buggy data sheet */
297#define AT_45DB642 /* No ID available */
298#define AT_45DB642D 0x2800
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000299#define AT_49BV512 0x03
Frederico Silva4bcf1752007-12-10 16:57:59 +0000300#define AT_49F002N 0x07 /* for AT49F002(N) */
301#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000302
Peter Lemenkov539478d2007-10-22 20:36:16 +0000303#define CATALYST_ID 0x31 /* Catalyst */
304
Uwe Hermann394131e2008-10-18 21:14:13 +0000305#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000306#define EMST_F49B002UA 0x00
307
Uwe Hermann372eeb52007-12-04 21:49:06 +0000308/*
309 * EN25 chips are SPI, first byte of device ID is memory type,
310 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000311 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
312 * is the continuation code for IDs in bank 2.
313 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
314 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
315 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000316 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000317#define EON_ID 0x7F1C /* EON Silicon Devices */
318#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000319#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
320#define EN_25B10 0x2011
321#define EN_25B20 0x2012
322#define EN_25B40 0x2013
323#define EN_25B80 0x2014
324#define EN_25B16 0x2015
325#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000326#define EN_29F512 0x7F21
327#define EN_29F010 0x7F20
328#define EN_29F040A 0x7F04
329#define EN_29LV010 0x7F6E
330#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000331#define EN_29F002T 0x7F92
332#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000333
Peter Lemenkov539478d2007-10-22 20:36:16 +0000334#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000335#define MBM29F400BC 0xAB
336#define MBM29F400TC 0x23
337#define MBM29F004BC 0x7B
338#define MBM29F004TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000339
340#define HYUNDAI_ID 0xAD /* Hyundai */
341
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000342#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
343#define IM_29F004B 0xAE
344#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000345
346#define INTEL_ID 0x89 /* Intel */
347
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000348#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000349
Uwe Hermann372eeb52007-12-04 21:49:06 +0000350/*
351 * MX25 chips are SPI, first byte of device ID is memory type,
352 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000353 * Generalplus SPI chips seem to be compatible with Macronix
354 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000355 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000356#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000357#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
358#define MX_25L1005 0x2011
359#define MX_25L2005 0x2012
360#define MX_25L4005 0x2013 /* MX25L4005{,A} */
361#define MX_25L8005 0x2014
362#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
363#define MX_25L3205 0x2016 /* MX25L3205{,A} */
364#define MX_25L6405 0x2017 /* MX25L3205{,D} */
Stephan Guilloux2f132fe2009-04-21 01:47:16 +0000365#define MX_25L12805 0x2018 /* MX25L12805 */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000366#define MX_25L1635D 0x2415
Stephan Guilloux70ea9a32009-04-23 22:51:56 +0000367#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000368#define MX_29F002B 0x34
369#define MX_29F002T 0xB0
Carl-Daniel Hailfinger7de86392008-12-10 10:32:05 +0000370#define MX_29LV002CB 0x5A
371#define MX_29LV002CT 0x59
372#define MX_29LV004CB 0xB6
373#define MX_29LV004CT 0xB5
374#define MX_29LV008CB 0x37
375#define MX_29LV008CT 0x3E
376#define MX_29F040C 0xA4
377#define MX_29F200CB 0x57
378#define MX_29F200CT 0x51
379#define MX_29F400CB 0xAB
380#define MX_29F400CT 0x23
381#define MX_29LV040C 0x4F
382#define MX_29LV128DB 0x7A
383#define MX_29LV128DT 0x7E
384#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
385#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
386#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
387#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
388#define MX_29LV400CB 0xBA
389#define MX_29LV400CT 0xB9
390#define MX_29LV800CB 0x5B
391#define MX_29LV800CT 0xDA
392#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
393#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
394#define MX_29SL402CB 0xF1
395#define MX_29SL402CT 0x70
396#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
397#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000398
Uwe Hermann394131e2008-10-18 21:14:13 +0000399/*
400 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
401 * have a 0x7F continuation code prefix.
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000402 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000403#define PMC_ID 0x7F9D /* PMC */
404#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
405#define PMC_25LV512 0x7B
406#define PMC_25LV010 0x7C
407#define PMC_25LV020 0x7D
408#define PMC_25LV040 0x7E
409#define PMC_25LV080B 0x13
410#define PMC_25LV016B 0x14
411#define PMC_39LV512 0x1B
412#define PMC_39F010 0x1C /* also Pm39LV010 */
413#define PMC_39LV020 0x3D
414#define PMC_39LV040 0x3E
415#define PMC_39F020 0x4D
416#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000417#define PMC_49FL002 0x6D
418#define PMC_49FL004 0x6E
419
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000420#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000421#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000422
Uwe Hermann372eeb52007-12-04 21:49:06 +0000423/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000424 * Spansion was previously a joint venture of AMD and Fujitsu.
425 * S25 chips are SPI. The first device ID byte is memory type and
426 * the second device ID byte is memory capacity.
427 */
428#define SPANSION_ID 0x01 /* Spansion */
429#define SPANSION_S25FL016A 0x0214
430
431/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000432 * SST25 chips are SPI, first byte of device ID is memory type, second
433 * byte of device ID is related to log(bitsize) at least for some chips.
434 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000435#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000436#define SST_25WF512 0x2501
437#define SST_25WF010 0x2502
438#define SST_25WF020 0x2503
439#define SST_25WF040 0x2504
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000440#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
441#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
442#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
443#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
444#define SST_25VF040B 0x258D
445#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
446#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
447#define SST_25VF080B 0x258E
448#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000449#define SST_25VF016B 0x2541
450#define SST_25VF032B 0x254A
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000451#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
452#define SST_26VF016 0x2601
453#define SST_26VF032 0x2602
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000454#define SST_27SF512 0xA4
455#define SST_27SF010 0xA5
456#define SST_27SF020 0xA6
457#define SST_27VF010 0xA9
458#define SST_27VF020 0xAA
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000459#define SST_28SF040 0x04
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000460#define SST_29EE512 0x5D
461#define SST_29EE010 0x07
462#define SST_29LE010 0x08 /* also SST29VE010 */
463#define SST_29EE020A 0x10
464#define SST_29LE020 0x12 /* also SST29VE020 */
465#define SST_29SF020 0x24
466#define SST_29VF020 0x25
467#define SST_29SF040 0x13
468#define SST_29VF040 0x14
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000469#define SST_39SF010 0xB5
470#define SST_39SF020 0xB6
471#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000472#define SST_39VF512 0xD4
473#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000474#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000475#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000476#define SST_49LF040B 0x50
477#define SST_49LF040 0x51
Sven Schnellec208dfb2009-01-07 12:35:09 +0000478#define SST_49LF020 0x61
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000479#define SST_49LF020A 0x52
480#define SST_49LF080A 0x5B
481#define SST_49LF002A 0x57
482#define SST_49LF003A 0x1B
483#define SST_49LF004A 0x60
484#define SST_49LF008A 0x5A
485#define SST_49LF004C 0x54
486#define SST_49LF008C 0x59
487#define SST_49LF016C 0x5C
488#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000489
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000490/*
491 * ST25P chips are SPI, first byte of device ID is memory type, second
492 * byte of device ID is related to log(bitsize) at least for some chips.
493 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000494#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000495#define ST_M25P05A 0x2010
496#define ST_M25P10A 0x2011
497#define ST_M25P20 0x2012
498#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000499#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000500#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000501#define ST_M25P16 0x2015
502#define ST_M25P32 0x2016
503#define ST_M25P64 0x2017
504#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000505#define ST_M50FLW040A 0x08
506#define ST_M50FLW040B 0x28
507#define ST_M50FLW080A 0x80
508#define ST_M50FLW080B 0x81
Carl-Daniel Hailfinger96e1b552008-11-02 14:25:11 +0000509#define ST_M50FW002 0x29
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000510#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000511#define ST_M50FW080 0x2D
512#define ST_M50FW016 0x2E
513#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000514#define ST_M29F002B 0x34
515#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000516#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000517#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000518#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000519#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000520
Peter Lemenkov539478d2007-10-22 20:36:16 +0000521#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000522#define S29C51001T 0x01
523#define S29C51002T 0x02
524#define S29C51004T 0x03
525#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000526
Peter Lemenkov539478d2007-10-22 20:36:16 +0000527#define TI_ID 0x97 /* Texas Instruments */
Carl-Daniel Hailfinger09b4fb72009-05-26 21:26:23 +0000528#define TI_OLD_ID 0x01 /* TI chips from last century */
529#define TI_TMS29F002RT 0xB0
530#define TI_TMS29F002RB 0x34
Peter Lemenkov539478d2007-10-22 20:36:16 +0000531
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000532/*
533 * W25X chips are SPI, first byte of device ID is memory type, second
534 * byte of device ID is related to log(bitsize).
535 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000536#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000537#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
538#define W_25X10 0x3011
539#define W_25X20 0x3012
540#define W_25X40 0x3013
541#define W_25X80 0x3014
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000542#define W_25X16 0x3015
543#define W_25X32 0x3016
544#define W_25X64 0x3017
Peter Lemenkov539478d2007-10-22 20:36:16 +0000545#define W_29C011 0xC1
546#define W_29C020C 0x45
547#define W_29C040P 0x46
548#define W_29EE011 0xC1
549#define W_39V040FA 0x34
550#define W_39V040A 0x3D
551#define W_39V040B 0x54
552#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000553#define W_39V080FA 0xD3
554#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000555#define W_49F002U 0x0B
556#define W_49V002A 0xB0
557#define W_49V002FA 0x32
558
Uwe Hermann372eeb52007-12-04 21:49:06 +0000559/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000560void myusec_delay(int time);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000561void myusec_calibrate_delay(void);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000562
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000563/* pcidev.c */
564#define PCI_OK 0
565#define PCI_NT 1 /* Not tested */
Rudolf Marek68720c72009-05-17 19:39:27 +0000566
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000567extern uint32_t io_base_addr;
568extern struct pci_access *pacc;
569extern struct pci_filter filter;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000570extern struct pci_dev *pcidev_dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000571struct pcidev_status {
572 uint16_t vendor_id;
573 uint16_t device_id;
574 int status;
575 const char *vendor_name;
576 const char *device_name;
577};
578uint32_t pcidev_validate(struct pci_dev *dev, struct pcidev_status *devs);
579uint32_t pcidev_init(uint16_t vendor_id, struct pcidev_status *devs);
580void print_supported_pcidevs(struct pcidev_status *devs);
581
Uwe Hermann372eeb52007-12-04 21:49:06 +0000582/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000583void w836xx_ext_enter(uint16_t port);
584void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000585uint8_t sio_read(uint16_t port, uint8_t reg);
586void sio_write(uint16_t port, uint8_t reg, uint8_t data);
587void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000588int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000589void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000590
Uwe Hermann372eeb52007-12-04 21:49:06 +0000591/* chipset_enable.c */
592int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000593void print_supported_chipsets(void);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000594
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000595extern unsigned long flashbase;
596
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000597typedef enum {
598 BUS_TYPE_LPC,
599 BUS_TYPE_ICH7_SPI,
600 BUS_TYPE_ICH9_SPI,
601 BUS_TYPE_IT87XX_SPI,
Jason Wanga3f04be2008-11-28 21:36:51 +0000602 BUS_TYPE_SB600_SPI,
Peter Stugebf196e92009-01-26 03:08:45 +0000603 BUS_TYPE_VIA_SPI,
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000604 BUS_TYPE_WBSIO_SPI,
605 BUS_TYPE_DUMMY_SPI
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000606} flashbus_t;
607
608extern flashbus_t flashbus;
609extern void *spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000610
Stefan Reinauer0593f212009-01-26 01:10:48 +0000611/* physmap.c */
612void *physmap(const char *descr, unsigned long phys_addr, size_t len);
613void physunmap(void *virt_addr, size_t len);
614
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000615/* internal.c */
Uwe Hermann2cac6862009-05-16 22:05:42 +0000616struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
617struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
618struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
619 uint16_t card_vendor, uint16_t card_device);
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000620void get_io_perms(void);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000621int internal_init(void);
622int internal_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000623void internal_chip_writeb(uint8_t val, chipaddr addr);
624void internal_chip_writew(uint16_t val, chipaddr addr);
625void internal_chip_writel(uint32_t val, chipaddr addr);
626uint8_t internal_chip_readb(const chipaddr addr);
627uint16_t internal_chip_readw(const chipaddr addr);
628uint32_t internal_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000629void mmio_writeb(uint8_t val, void *addr);
630void mmio_writew(uint16_t val, void *addr);
631void mmio_writel(uint32_t val, void *addr);
632uint8_t mmio_readb(void *addr);
633uint16_t mmio_readw(void *addr);
634uint32_t mmio_readl(void *addr);
Uwe Hermannc6915932009-05-17 23:12:17 +0000635void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
636void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000637void fallback_chip_writew(uint16_t val, chipaddr addr);
638void fallback_chip_writel(uint32_t val, chipaddr addr);
639uint16_t fallback_chip_readw(const chipaddr addr);
640uint32_t fallback_chip_readl(const chipaddr addr);
Uwe Hermanna0869322009-05-14 20:41:57 +0000641#if defined(__FreeBSD__) || defined(__DragonFly__)
642extern int io_fd;
643#endif
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000644
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000645/* dummyflasher.c */
646int dummy_init(void);
647int dummy_shutdown(void);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000648void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
649void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000650void dummy_chip_writeb(uint8_t val, chipaddr addr);
651void dummy_chip_writew(uint16_t val, chipaddr addr);
652void dummy_chip_writel(uint32_t val, chipaddr addr);
653uint8_t dummy_chip_readb(const chipaddr addr);
654uint16_t dummy_chip_readw(const chipaddr addr);
655uint32_t dummy_chip_readl(const chipaddr addr);
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000656int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
657 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000658
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000659/* nic3com.c */
660int nic3com_init(void);
661int nic3com_shutdown(void);
662void *nic3com_map(const char *descr, unsigned long phys_addr, size_t len);
663void nic3com_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000664void nic3com_chip_writeb(uint8_t val, chipaddr addr);
665uint8_t nic3com_chip_readb(const chipaddr addr);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000666extern struct pcidev_status nics_3com[];
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000667
Rudolf Marek68720c72009-05-17 19:39:27 +0000668/* satasii.c */
669int satasii_init(void);
670int satasii_shutdown(void);
671void *satasii_map(const char *descr, unsigned long phys_addr, size_t len);
672void satasii_unmap(void *virt_addr, size_t len);
673void satasii_chip_writeb(uint8_t val, chipaddr addr);
674uint8_t satasii_chip_readb(const chipaddr addr);
675extern struct pcidev_status satas_sii[];
676
Uwe Hermann0846f892007-08-23 13:34:59 +0000677/* flashrom.c */
Uwe Hermannad216bf2009-04-24 16:17:41 +0000678extern int verbose;
679#define printf_debug(x...) { if (verbose) printf(x); }
Peter Stuge776d2022009-01-26 00:39:57 +0000680void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfinger03b4e712009-05-08 12:49:03 +0000681int read_memmapped(struct flashchip *flash, uint8_t *buf);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000682extern char *pcidev_bdf;
Uwe Hermann0846f892007-08-23 13:34:59 +0000683
684/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000685int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000686int read_romlayout(char *name);
687int find_romentry(char *name);
688int handle_romentries(uint8_t *buffer, uint8_t *content);
689
Uwe Hermannad216bf2009-04-24 16:17:41 +0000690/* cbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000691int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000692extern char *lb_part, *lb_vendor;
693
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000694/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000695int probe_spi_rdid(struct flashchip *flash);
Rudolf Marek48a85e42008-06-30 21:45:17 +0000696int probe_spi_rdid4(struct flashchip *flash);
Carl-Daniel Hailfinger14e50ac2008-11-28 01:25:00 +0000697int probe_spi_rems(struct flashchip *flash);
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000698int probe_spi_res(struct flashchip *flash);
Uwe Hermann394131e2008-10-18 21:14:13 +0000699int spi_command(unsigned int writecnt, unsigned int readcnt,
700 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000701int spi_write_enable(void);
702int spi_write_disable(void);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000703int spi_chip_erase_60(struct flashchip *flash);
Peter Stugefa8c5502008-05-10 23:07:52 +0000704int spi_chip_erase_c7(struct flashchip *flash);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000705int spi_chip_erase_60_c7(struct flashchip *flash);
Stefan Reinauer424ed222008-10-29 22:13:20 +0000706int spi_chip_erase_d8(struct flashchip *flash);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000707int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
708int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000709int spi_chip_write_1(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger8d497012009-05-09 02:34:18 +0000710int spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Peter Stugefa8c5502008-05-10 23:07:52 +0000711int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000712uint8_t spi_read_status_register(void);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000713int spi_disable_blockprotect(void);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000714void spi_byte_program(int address, uint8_t byte);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000715int spi_nbyte_read(int address, uint8_t *bytes, int len);
Peter Stugefd9217d2009-01-26 03:37:40 +0000716int spi_aai_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000717uint32_t spi_get_valid_read_addr(void);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000718
Uwe Hermann0846f892007-08-23 13:34:59 +0000719/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000720int probe_82802ab(struct flashchip *flash);
721int erase_82802ab(struct flashchip *flash);
722int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000723
724/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000725int probe_29f040b(struct flashchip *flash);
726int erase_29f040b(struct flashchip *flash);
727int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000728
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000729/* en29f002a.c */
730int probe_en29f002a(struct flashchip *flash);
731int erase_en29f002a(struct flashchip *flash);
732int write_en29f002a(struct flashchip *flash, uint8_t *buf);
733
Dominik Geyerb46acba2008-05-16 12:55:55 +0000734/* ichspi.c */
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000735int ich_init_opcodes(void);
Uwe Hermann394131e2008-10-18 21:14:13 +0000736int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
737 const unsigned char *writearr, unsigned char *readarr);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000738int ich_spi_read(struct flashchip *flash, uint8_t * buf);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000739int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000740
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000741/* it87spi.c */
742extern uint16_t it8716f_flashport;
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000743void enter_conf_mode_ite(uint16_t port);
744void exit_conf_mode_ite(uint16_t port);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000745int it87xx_probe_spi_flash(const char *name);
Uwe Hermann394131e2008-10-18 21:14:13 +0000746int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
747 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000748int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000749int it8716f_spi_chip_write_1(struct flashchip *flash, uint8_t *buf);
750int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000751
Jason Wanga3f04be2008-11-28 21:36:51 +0000752/* sb600spi.c */
753int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
754 const unsigned char *writearr, unsigned char *readarr);
755int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000756int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
Jason Wanga3f04be2008-11-28 21:36:51 +0000757uint8_t sb600_read_status_register(void);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000758extern uint8_t *sb600_spibar;
Jason Wanga3f04be2008-11-28 21:36:51 +0000759
Uwe Hermann0846f892007-08-23 13:34:59 +0000760/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000761uint8_t oddparity(uint8_t val);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000762void toggle_ready_jedec(chipaddr dst);
763void data_polling_jedec(chipaddr dst, uint8_t data);
764void unprotect_jedec(chipaddr bios);
765void protect_jedec(chipaddr bios);
766int write_byte_program_jedec(chipaddr bios, uint8_t *src,
767 chipaddr dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000768int probe_jedec(struct flashchip *flash);
769int erase_chip_jedec(struct flashchip *flash);
770int write_jedec(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000771int erase_sector_jedec(chipaddr bios, unsigned int page);
772int erase_block_jedec(chipaddr bios, unsigned int page);
773int write_sector_jedec(chipaddr bios, uint8_t *src,
774 chipaddr dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000775
Peter Stugeaf8ffac2009-01-26 06:42:02 +0000776/* m29f002.c */
777int erase_m29f002(struct flashchip *flash);
778int write_m29f002t(struct flashchip *flash, uint8_t *buf);
779int write_m29f002b(struct flashchip *flash, uint8_t *buf);
780
Uwe Hermann0846f892007-08-23 13:34:59 +0000781/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000782int probe_m29f400bt(struct flashchip *flash);
783int erase_m29f400bt(struct flashchip *flash);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000784int block_erase_m29f400bt(chipaddr bios,
785 chipaddr dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000786int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000787int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000788void toggle_ready_m29f400bt(chipaddr dst);
789void data_polling_m29f400bt(chipaddr dst, uint8_t data);
790void protect_m29f400bt(chipaddr bios);
791void write_page_m29f400bt(chipaddr bios, uint8_t *src,
792 chipaddr dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000793
794/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000795int probe_29f002(struct flashchip *flash);
796int erase_29f002(struct flashchip *flash);
797int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000798
Nikolay Petukhov4784c472008-05-17 01:08:58 +0000799/* pm49fl00x.c */
800int probe_49fl00x(struct flashchip *flash);
801int erase_49fl00x(struct flashchip *flash);
802int write_49fl00x(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000803
804/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000805int probe_lhf00l04(struct flashchip *flash);
806int erase_lhf00l04(struct flashchip *flash);
807int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000808void toggle_ready_lhf00l04(chipaddr dst);
809void data_polling_lhf00l04(chipaddr dst, uint8_t data);
810void protect_lhf00l04(chipaddr bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000811
812/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000813int probe_28sf040(struct flashchip *flash);
814int erase_28sf040(struct flashchip *flash);
815int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000816
817/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000818int probe_39sf020(struct flashchip *flash);
819int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000820
821/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000822int erase_49lf040(struct flashchip *flash);
823int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000824
825/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000826int probe_49lfxxxc(struct flashchip *flash);
827int erase_49lfxxxc(struct flashchip *flash);
828int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000829
830/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000831int probe_sst_fwhub(struct flashchip *flash);
832int erase_sst_fwhub(struct flashchip *flash);
833int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000834
Peter Stugecce26822008-07-21 17:48:40 +0000835/* w39v040c.c */
836int probe_w39v040c(struct flashchip *flash);
837int erase_w39v040c(struct flashchip *flash);
838int write_w39v040c(struct flashchip *flash, uint8_t *buf);
839
Stefan Reinauerac378972008-03-17 22:59:40 +0000840/* w39V080fa.c */
841int probe_winbond_fwhub(struct flashchip *flash);
842int erase_winbond_fwhub(struct flashchip *flash);
843int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
844
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000845/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000846int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000847
Uwe Hermann0846f892007-08-23 13:34:59 +0000848/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000849int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000850
Peter Stugebf196e92009-01-26 03:08:45 +0000851/* wbsio_spi.c */
852int wbsio_check_for_spi(const char *name);
853int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
854int wbsio_spi_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000855int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000856
Claus Gindharta7b35512008-04-28 17:51:09 +0000857/* stm50flw0x0x.c */
858int probe_stm50flw0x0x(struct flashchip *flash);
859int erase_stm50flw0x0x(struct flashchip *flash);
860int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000861
Ollie Lho761bf1b2004-03-20 16:46:10 +0000862#endif /* !__FLASH_H__ */