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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
Uwe Hermanne5ac1642008-03-12 11:54:51 +000033#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
34
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000035struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +000036 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +000037 const char *name;
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000038 /* With 32bit manufacture_id and model_id we can cover IDs up to
39 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
40 * Identification code.
41 */
42 uint32_t manufacture_id;
43 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000044
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000045 int total_size;
46 int page_size;
47
Peter Stuge1159d582008-05-03 04:34:37 +000048 /* Indicate if flashrom has been tested with this flash chip and if
49 * everything worked correctly.
50 */
51 uint32_t tested;
52
Uwe Hermann0b7afe62007-04-01 19:44:21 +000053 int (*probe) (struct flashchip *flash);
54 int (*erase) (struct flashchip *flash);
55 int (*write) (struct flashchip *flash, uint8_t *buf);
56 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000057
Uwe Hermann372eeb52007-12-04 21:49:06 +000058 /* Some flash devices have an additional register space. */
Stefan Reinauerce532972007-05-23 17:20:56 +000059 volatile uint8_t *virtual_memory;
60 volatile uint8_t *virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000061};
62
Peter Stuge1159d582008-05-03 04:34:37 +000063#define TEST_UNTESTED 0
64
65#define TEST_OK_PROBE (1<<0)
66#define TEST_OK_READ (1<<1)
67#define TEST_OK_ERASE (1<<2)
68#define TEST_OK_WRITE (1<<3)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +000069#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +000070#define TEST_OK_MASK 0x0f
71
72#define TEST_BAD_PROBE (1<<4)
73#define TEST_BAD_READ (1<<5)
74#define TEST_BAD_ERASE (1<<6)
75#define TEST_BAD_WRITE (1<<7)
76#define TEST_BAD_MASK 0xf0
77
Ollie Lho184a4042005-11-26 21:55:36 +000078extern struct flashchip flashchips[];
79
Uwe Hermann372eeb52007-12-04 21:49:06 +000080/*
81 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +000082 * entry of each section should be the manufacturer ID, followed by the
83 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +000084 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +000085 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
86 * continuation code.
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +000087 * All SPI parts have 16-bit device IDs.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +000088 */
89
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +000090#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
91
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +000092#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +000093
Uwe Hermannaf2b52d2007-04-01 20:00:32 +000094#define AMD_ID 0x01 /* AMD */
Uwe Hermann0b7afe62007-04-01 19:44:21 +000095#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +000096#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +000097#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000098
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +000099#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000100#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000101
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000102#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000103#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000104
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000105#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000106#define AT_25DF021 0x4300
107#define AT_25DF041A 0x4401
108#define AT_25DF081 0x4502
109#define AT_25DF161 0x4602
110#define AT_25DF321 0x4700 /* also 26DF321 */
111#define AT_25DF321A 0x4701
112#define AT_25DF641 0x4800
113#define AT_26DF041 0x4400
114#define AT_26DF081 0x4500 /* guessed, no datasheet available */
115#define AT_26DF081A 0x4501
116#define AT_26DF161 0x4600
117#define AT_26DF161A 0x4601
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000118#define AT_29C040A 0xA4
Uwe Hermannd7f48062007-04-28 02:22:59 +0000119#define AT_29C020 0xDA
Frederico Silva4bcf1752007-12-10 16:57:59 +0000120#define AT_49F002N 0x07 /* for AT49F002(N) */
121#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000122
Peter Lemenkov539478d2007-10-22 20:36:16 +0000123#define CATALYST_ID 0x31 /* Catalyst */
124
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000125#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
Peter Lemenkov539478d2007-10-22 20:36:16 +0000126#define EMST_F49B002UA 0x00
127
Uwe Hermann372eeb52007-12-04 21:49:06 +0000128/*
129 * EN25 chips are SPI, first byte of device ID is memory type,
130 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000131 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
132 * is the continuation code for IDs in bank 2.
133 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
134 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
135 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000136 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000137#define EON_ID 0x7F1C /* EON Silicon Devices */
138#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000139#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
140#define EN_25B10 0x2011
141#define EN_25B20 0x2012
142#define EN_25B40 0x2013
143#define EN_25B80 0x2014
144#define EN_25B16 0x2015
145#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000146#define EN_29F512 0x7F21
147#define EN_29F010 0x7F20
148#define EN_29F040A 0x7F04
149#define EN_29LV010 0x7F6E
150#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000151#define EN_29F002T 0x7F92
152#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000153
Peter Lemenkov539478d2007-10-22 20:36:16 +0000154#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000155/* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
156 * try to read it from a location not mentioned in the data sheet.
157 */
158#define MBM29F400TC_STRANGE 0x23
159#define MBM29F400BC 0x7B
160#define MBM29F400TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000161
162#define HYUNDAI_ID 0xAD /* Hyundai */
163
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000164#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
165#define IM_29F004B 0xAE
166#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000167
168#define INTEL_ID 0x89 /* Intel */
169
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000170#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000171
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000172#define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
Uwe Hermann372eeb52007-12-04 21:49:06 +0000173#define MSYSTEMS_MD2200 0xDB
Peter Lemenkov539478d2007-10-22 20:36:16 +0000174#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
175#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
176
Uwe Hermann372eeb52007-12-04 21:49:06 +0000177/*
178 * MX25 chips are SPI, first byte of device ID is memory type,
179 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000180 * Generalplus SPI chips seem to be compatible with Macronix
181 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000182 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000183#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000184#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
185#define MX_25L1005 0x2011
186#define MX_25L2005 0x2012
187#define MX_25L4005 0x2013 /* MX25L4005{,A} */
188#define MX_25L8005 0x2014
189#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
190#define MX_25L3205 0x2016 /* MX25L3205{,A} */
191#define MX_25L6405 0x2017 /* MX25L3205{,D} */
192#define MX_25L1635D 0x2415
193#define MX_25L3235D 0x2416
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000194#define MX_29F002 0xB0
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000195
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000196/* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
197 * a 0x7F continuation code prefix.
198 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000199#define PMC_ID 0x7F9D /* PMC */
200#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
201#define PMC_25LV512 0x7B
202#define PMC_25LV010 0x7C
203#define PMC_25LV020 0x7D
204#define PMC_25LV040 0x7E
205#define PMC_25LV080B 0x13
206#define PMC_25LV016B 0x14
207#define PMC_39LV512 0x1B
208#define PMC_39F010 0x1C /* also Pm39LV010 */
209#define PMC_39LV020 0x3D
210#define PMC_39LV040 0x3E
211#define PMC_39F020 0x4D
212#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000213#define PMC_49FL002 0x6D
214#define PMC_49FL004 0x6E
215
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000216#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000217#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000218
Uwe Hermann372eeb52007-12-04 21:49:06 +0000219/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000220 * Spansion was previously a joint venture of AMD and Fujitsu.
221 * S25 chips are SPI. The first device ID byte is memory type and
222 * the second device ID byte is memory capacity.
223 */
224#define SPANSION_ID 0x01 /* Spansion */
225#define SPANSION_S25FL016A 0x0214
226
227/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000228 * SST25 chips are SPI, first byte of device ID is memory type, second
229 * byte of device ID is related to log(bitsize) at least for some chips.
230 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000231#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000232#define SST_25WF512 0x2501
233#define SST_25WF010 0x2502
234#define SST_25WF020 0x2503
235#define SST_25WF040 0x2504
236#define SST_25VF016B 0x2541
237#define SST_25VF032B 0x254A
238#define SST_25VF040B 0x258D
239#define SST_25VF080B 0x258E
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000240#define SST_29EE020A 0x10
241#define SST_28SF040 0x04
242#define SST_39SF010 0xB5
243#define SST_39SF020 0xB6
244#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000245#define SST_39VF512 0xD4
246#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000247#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000248#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000249#define SST_49LF040B 0x50
250#define SST_49LF040 0x51
251#define SST_49LF020A 0x52
252#define SST_49LF080A 0x5B
253#define SST_49LF002A 0x57
254#define SST_49LF003A 0x1B
255#define SST_49LF004A 0x60
256#define SST_49LF008A 0x5A
257#define SST_49LF004C 0x54
258#define SST_49LF008C 0x59
259#define SST_49LF016C 0x5C
260#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000261
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000262/*
263 * ST25P chips are SPI, first byte of device ID is memory type, second
264 * byte of device ID is related to log(bitsize) at least for some chips.
265 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000266#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000267#define ST_M25P05A 0x2010
268#define ST_M25P10A 0x2011
269#define ST_M25P20 0x2012
270#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000271#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000272#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000273#define ST_M25P16 0x2015
274#define ST_M25P32 0x2016
275#define ST_M25P64 0x2017
276#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000277#define ST_M50FLW040A 0x08
278#define ST_M50FLW040B 0x28
279#define ST_M50FLW080A 0x80
280#define ST_M50FLW080B 0x81
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000281#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000282#define ST_M50FW080 0x2D
283#define ST_M50FW016 0x2E
284#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000285#define ST_M29F002B 0x34
286#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000287#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000288#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000289#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000290#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000291
Peter Lemenkov539478d2007-10-22 20:36:16 +0000292#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000293#define S29C51001T 0x01
294#define S29C51002T 0x02
295#define S29C51004T 0x03
296#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000297
Peter Lemenkov539478d2007-10-22 20:36:16 +0000298#define TI_ID 0x97 /* Texas Instruments */
299
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000300/*
301 * W25X chips are SPI, first byte of device ID is memory type, second
302 * byte of device ID is related to log(bitsize).
303 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000304#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000305#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
306#define W_25X10 0x3011
307#define W_25X20 0x3012
308#define W_25X40 0x3013
309#define W_25X80 0x3014
Peter Lemenkov539478d2007-10-22 20:36:16 +0000310#define W_29C011 0xC1
311#define W_29C020C 0x45
312#define W_29C040P 0x46
313#define W_29EE011 0xC1
314#define W_39V040FA 0x34
315#define W_39V040A 0x3D
316#define W_39V040B 0x54
317#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000318#define W_39V080FA 0xD3
319#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000320#define W_49F002U 0x0B
321#define W_49V002A 0xB0
322#define W_49V002FA 0x32
323
Uwe Hermann372eeb52007-12-04 21:49:06 +0000324/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000325void myusec_delay(int time);
326void myusec_calibrate_delay();
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000327
Uwe Hermann372eeb52007-12-04 21:49:06 +0000328/* PCI handling for board/chipset_enable */
329struct pci_access *pacc;
Stefan Reinauer70385642007-04-06 11:58:03 +0000330struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000331struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
332 uint16_t card_vendor, uint16_t card_device);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000333
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000334
Uwe Hermann372eeb52007-12-04 21:49:06 +0000335/* board_enable.c */
336int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000337void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000338
Uwe Hermann372eeb52007-12-04 21:49:06 +0000339/* chipset_enable.c */
340int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000341void print_supported_chipsets(void);
Carl-Daniel Hailfinger6dc1d3b2008-05-14 14:51:22 +0000342extern int ich9_detected;
343extern void *ich_spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000344
Uwe Hermann372eeb52007-12-04 21:49:06 +0000345/* Physical memory mapping device */
Adam Kaufman064b1f22007-02-06 19:47:50 +0000346#if defined (__sun) && (defined(__i386) || defined(__amd64))
347# define MEM_DEV "/dev/xsvc"
348#else
349# define MEM_DEV "/dev/mem"
350#endif
351
Stefan Reinauer70385642007-04-06 11:58:03 +0000352extern int fd_mem;
353
Uwe Hermann0846f892007-08-23 13:34:59 +0000354/* debug.c */
355extern int verbose;
356#define printf_debug(x...) { if (verbose) printf(x); }
357
358/* flashrom.c */
359int map_flash_registers(struct flashchip *flash);
360
361/* layout.c */
362int show_id(uint8_t *bios, int size);
363int read_romlayout(char *name);
364int find_romentry(char *name);
365int handle_romentries(uint8_t *buffer, uint8_t *content);
366
367/* lbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000368int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000369extern char *lb_part, *lb_vendor;
370
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000371/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000372int probe_spi_rdid(struct flashchip *flash);
373int probe_spi_res(struct flashchip *flash);
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000374int it87xx_probe_spi_flash(const char *name);
Peter Stugefa8c5502008-05-10 23:07:52 +0000375int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
376void spi_write_enable();
377void spi_write_disable();
378int spi_chip_erase_c7(struct flashchip *flash);
379int spi_chip_write(struct flashchip *flash, uint8_t *buf);
380int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000381uint8_t spi_read_status_register();
382void spi_disable_blockprotect(void);
383void spi_byte_program(int address, uint8_t byte);
384void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
385void spi_nbyte_read(int address, uint8_t *bytes, int len);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000386
Uwe Hermann0846f892007-08-23 13:34:59 +0000387/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000388int probe_82802ab(struct flashchip *flash);
389int erase_82802ab(struct flashchip *flash);
390int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000391
392/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000393int probe_29f040b(struct flashchip *flash);
394int erase_29f040b(struct flashchip *flash);
395int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000396
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000397/* it87spi.c */
398extern uint16_t it8716f_flashport;
399int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
400int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
401int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
402void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
403
Uwe Hermann0846f892007-08-23 13:34:59 +0000404/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000405uint8_t oddparity(uint8_t val);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000406void toggle_ready_jedec(volatile uint8_t *dst);
407void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
408void unprotect_jedec(volatile uint8_t *bios);
409void protect_jedec(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000410int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
411 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000412int probe_jedec(struct flashchip *flash);
413int erase_chip_jedec(struct flashchip *flash);
414int write_jedec(struct flashchip *flash, uint8_t *buf);
415int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
416int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
417int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
418 volatile uint8_t *dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000419
420/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000421int probe_m29f400bt(struct flashchip *flash);
422int erase_m29f400bt(struct flashchip *flash);
423int block_erase_m29f400bt(volatile uint8_t *bios,
Uwe Hermann0846f892007-08-23 13:34:59 +0000424 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000425int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000426int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000427void toggle_ready_m29f400bt(volatile uint8_t *dst);
428void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
429void protect_m29f400bt(volatile uint8_t *bios);
430void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
431 volatile uint8_t *dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000432
433/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000434int probe_29f002(struct flashchip *flash);
435int erase_29f002(struct flashchip *flash);
436int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000437
438/* pm49fl004.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000439int probe_49fl004(struct flashchip *flash);
440int erase_49fl004(struct flashchip *flash);
441int write_49fl004(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000442
443/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000444int probe_lhf00l04(struct flashchip *flash);
445int erase_lhf00l04(struct flashchip *flash);
446int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
447void toggle_ready_lhf00l04(volatile uint8_t *dst);
448void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
449void protect_lhf00l04(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000450
451/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000452int probe_28sf040(struct flashchip *flash);
453int erase_28sf040(struct flashchip *flash);
454int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000455
456/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000457int probe_39sf020(struct flashchip *flash);
458int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000459
460/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000461int erase_49lf040(struct flashchip *flash);
462int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000463
464/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000465int probe_49lfxxxc(struct flashchip *flash);
466int erase_49lfxxxc(struct flashchip *flash);
467int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000468
469/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000470int probe_sst_fwhub(struct flashchip *flash);
471int erase_sst_fwhub(struct flashchip *flash);
472int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000473
Stefan Reinauerac378972008-03-17 22:59:40 +0000474/* w39V080fa.c */
475int probe_winbond_fwhub(struct flashchip *flash);
476int erase_winbond_fwhub(struct flashchip *flash);
477int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
478
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000479/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000480int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000481
Uwe Hermann0846f892007-08-23 13:34:59 +0000482/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000483int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000484
Claus Gindharta7b35512008-04-28 17:51:09 +0000485/* stm50flw0x0x.c */
486int probe_stm50flw0x0x(struct flashchip *flash);
487int erase_stm50flw0x0x(struct flashchip *flash);
488int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000489#endif /* !__FLASH_H__ */