blob: 2ea7b481a9ab5976e06a371f98dd7d94bf9461fd [file] [log] [blame]
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __PROGRAMMER_H__
25#define __PROGRAMMER_H__ 1
26
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000028
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000029enum programmer {
30#if CONFIG_INTERNAL == 1
31 PROGRAMMER_INTERNAL,
32#endif
33#if CONFIG_DUMMY == 1
34 PROGRAMMER_DUMMY,
35#endif
36#if CONFIG_NIC3COM == 1
37 PROGRAMMER_NIC3COM,
38#endif
39#if CONFIG_NICREALTEK == 1
40 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000041#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042#if CONFIG_NICNATSEMI == 1
43 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000044#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000045#if CONFIG_GFXNVIDIA == 1
46 PROGRAMMER_GFXNVIDIA,
47#endif
48#if CONFIG_DRKAISER == 1
49 PROGRAMMER_DRKAISER,
50#endif
51#if CONFIG_SATASII == 1
52 PROGRAMMER_SATASII,
53#endif
54#if CONFIG_ATAHPT == 1
55 PROGRAMMER_ATAHPT,
56#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000057#if CONFIG_FT2232_SPI == 1
58 PROGRAMMER_FT2232_SPI,
59#endif
60#if CONFIG_SERPROG == 1
61 PROGRAMMER_SERPROG,
62#endif
63#if CONFIG_BUSPIRATE_SPI == 1
64 PROGRAMMER_BUSPIRATE_SPI,
65#endif
66#if CONFIG_DEDIPROG == 1
67 PROGRAMMER_DEDIPROG,
68#endif
69#if CONFIG_RAYER_SPI == 1
70 PROGRAMMER_RAYER_SPI,
71#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000072#if CONFIG_PONY_SPI == 1
73 PROGRAMMER_PONY_SPI,
74#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000075#if CONFIG_NICINTEL == 1
76 PROGRAMMER_NICINTEL,
77#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000078#if CONFIG_NICINTEL_SPI == 1
79 PROGRAMMER_NICINTEL_SPI,
80#endif
Mark Marshall90021f22010-12-03 14:48:11 +000081#if CONFIG_OGP_SPI == 1
82 PROGRAMMER_OGP_SPI,
83#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000084#if CONFIG_SATAMV == 1
85 PROGRAMMER_SATAMV,
86#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +000087#if CONFIG_LINUX_SPI == 1
88 PROGRAMMER_LINUX_SPI,
89#endif
James Lairdc60de0e2013-03-27 13:00:23 +000090#if CONFIG_USBBLASTER_SPI == 1
91 PROGRAMMER_USBBLASTER_SPI,
92#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000093 PROGRAMMER_INVALID /* This must always be the last entry. */
94};
95
Stefan Tauneraf358d62012-12-27 18:40:26 +000096enum programmer_type {
97 PCI = 1, /* to detect uninitialized values */
98 USB,
99 OTHER,
100};
101
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000102struct dev_entry {
103 uint16_t vendor_id;
104 uint16_t device_id;
105 const enum test_state status;
106 const char *vendor_name;
107 const char *device_name;
108};
109
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000110struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000111 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000112 const enum programmer_type type;
113 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000114 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000115 const char *const note;
116 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000117
118 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000119
Stefan Taunera6d96482012-12-26 19:51:23 +0000120 void *(*map_flash_region) (const char *descr, unsigned long phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000121 void (*unmap_flash_region) (void *virt_addr, size_t len);
122
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000123 void (*delay) (int usecs);
124};
125
126extern const struct programmer_entry programmer_table[];
127
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000128int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000129int programmer_shutdown(void);
130
131enum bitbang_spi_master_type {
132 BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
133#if CONFIG_RAYER_SPI == 1
134 BITBANG_SPI_MASTER_RAYER,
135#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000136#if CONFIG_PONY_SPI == 1
137 BITBANG_SPI_MASTER_PONY,
138#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +0000139#if CONFIG_NICINTEL_SPI == 1
140 BITBANG_SPI_MASTER_NICINTEL,
141#endif
Carl-Daniel Hailfinger2f436162010-07-28 15:08:35 +0000142#if CONFIG_INTERNAL == 1
143#if defined(__i386__) || defined(__x86_64__)
144 BITBANG_SPI_MASTER_MCP,
145#endif
146#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000147#if CONFIG_OGP_SPI == 1
148 BITBANG_SPI_MASTER_OGP,
149#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000150};
151
152struct bitbang_spi_master {
153 enum bitbang_spi_master_type type;
154
155 /* Note that CS# is active low, so val=0 means the chip is active. */
156 void (*set_cs) (int val);
157 void (*set_sck) (int val);
158 void (*set_mosi) (int val);
159 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000160 void (*request_bus) (void);
161 void (*release_bus) (void);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000162 /* Length of half a clock period in usecs. */
163 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000164};
165
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000166#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000167struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000168
169/* pcidev.c */
170// FIXME: These need to be local, not global
171extern uint32_t io_base_addr;
172extern struct pci_access *pacc;
173int pci_init_common(void);
174uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
175struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
176/* rpci_write_* are reversible writes. The original PCI config space register
177 * contents will be restored on shutdown.
178 */
179int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
180int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
181int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
182#endif
183
184#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000185struct penable {
186 uint16_t vendor_id;
187 uint16_t device_id;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000188 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000189 const char *vendor_name;
190 const char *device_name;
191 int (*doit) (struct pci_dev *dev, const char *name);
192};
193
194extern const struct penable chipset_enables[];
195
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000196enum board_match_phase {
197 P1,
198 P2,
199 P3
200};
201
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000202struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000203 /* Any device, but make it sensible, like the ISA bridge. */
204 uint16_t first_vendor;
205 uint16_t first_device;
206 uint16_t first_card_vendor;
207 uint16_t first_card_device;
208
209 /* Any device, but make it sensible, like
210 * the host bridge. May be NULL.
211 */
212 uint16_t second_vendor;
213 uint16_t second_device;
214 uint16_t second_card_vendor;
215 uint16_t second_card_device;
216
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000217 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000218 const char *dmi_pattern;
219
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000220 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000221 const char *lb_vendor;
222 const char *lb_part;
223
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000224 enum board_match_phase phase;
225
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000226 const char *vendor_name;
227 const char *board_name;
228
229 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000230 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000231 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000232};
233
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000234extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000235
236struct board_info {
237 const char *vendor;
238 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000239 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000240#ifdef CONFIG_PRINT_WIKI
241 const char *url;
242 const char *note;
243#endif
244};
245
246extern const struct board_info boards_known[];
247extern const struct board_info laptops_known[];
248#endif
249
250/* udelay.c */
251void myusec_delay(int usecs);
252void myusec_calibrate_delay(void);
Maksim Kuleshov73dc0db2013-04-05 08:06:10 +0000253void internal_sleep(int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000254void internal_delay(int usecs);
255
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000256#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000257/* board_enable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000258int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000259void w836xx_ext_enter(uint16_t port);
260void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000261void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000262int it8705f_write_enable(uint8_t port);
263uint8_t sio_read(uint16_t port, uint8_t reg);
264void sio_write(uint16_t port, uint8_t reg, uint8_t data);
265void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000266void board_handle_before_superio(void);
267void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000268int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000269
270/* chipset_enable.c */
271int chipset_flash_enable(void);
272
273/* processor_enable.c */
274int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000275#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000276
277/* physmap.c */
278void *physmap(const char *descr, unsigned long phys_addr, size_t len);
279void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
280void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000281#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000282int setup_cpu_msr(int cpu);
283void cleanup_cpu_msr(void);
284
285/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000286int cb_parse_table(const char **vendor, const char **model);
287int cb_check_image(uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000288
289/* dmi.c */
290extern int has_dmi_support;
291void dmi_init(void);
292int dmi_match(const char *pattern);
293
294/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000295struct superio {
296 uint16_t vendor;
297 uint16_t port;
298 uint16_t model;
299};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000300extern struct superio superios[];
301extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000302#define SUPERIO_VENDOR_NONE 0x0
303#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000304#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000305#endif
306#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000307struct pci_filter;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000308struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Uwe Hermann24c35e42011-07-13 11:22:03 +0000309struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000310struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
311struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
312 uint16_t card_vendor, uint16_t card_device);
313#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000314int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315#if CONFIG_INTERNAL == 1
316extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000317extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000318extern int force_boardenable;
319extern int force_boardmismatch;
320void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000321int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000322extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000323int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000324#endif
325
326/* hwaccess.c */
327void mmio_writeb(uint8_t val, void *addr);
328void mmio_writew(uint16_t val, void *addr);
329void mmio_writel(uint32_t val, void *addr);
330uint8_t mmio_readb(void *addr);
331uint16_t mmio_readw(void *addr);
332uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerccd71c22012-03-01 22:38:27 +0000333void mmio_readn(void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000334void mmio_le_writeb(uint8_t val, void *addr);
335void mmio_le_writew(uint16_t val, void *addr);
336void mmio_le_writel(uint32_t val, void *addr);
337uint8_t mmio_le_readb(void *addr);
338uint16_t mmio_le_readw(void *addr);
339uint32_t mmio_le_readl(void *addr);
340#define pci_mmio_writeb mmio_le_writeb
341#define pci_mmio_writew mmio_le_writew
342#define pci_mmio_writel mmio_le_writel
343#define pci_mmio_readb mmio_le_readb
344#define pci_mmio_readw mmio_le_readw
345#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000346void rmmio_writeb(uint8_t val, void *addr);
347void rmmio_writew(uint16_t val, void *addr);
348void rmmio_writel(uint32_t val, void *addr);
349void rmmio_le_writeb(uint8_t val, void *addr);
350void rmmio_le_writew(uint16_t val, void *addr);
351void rmmio_le_writel(uint32_t val, void *addr);
352#define pci_rmmio_writeb rmmio_le_writeb
353#define pci_rmmio_writew rmmio_le_writew
354#define pci_rmmio_writel rmmio_le_writel
355void rmmio_valb(void *addr);
356void rmmio_valw(void *addr);
357void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000358
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000359/* dummyflasher.c */
360#if CONFIG_DUMMY == 1
361int dummy_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000362void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
363void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000364#endif
365
366/* nic3com.c */
367#if CONFIG_NIC3COM == 1
368int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000369extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000370#endif
371
372/* gfxnvidia.c */
373#if CONFIG_GFXNVIDIA == 1
374int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000375extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000376#endif
377
378/* drkaiser.c */
379#if CONFIG_DRKAISER == 1
380int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000381extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000382#endif
383
384/* nicrealtek.c */
385#if CONFIG_NICREALTEK == 1
386int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000387extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000388#endif
389
390/* nicnatsemi.c */
391#if CONFIG_NICNATSEMI == 1
392int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000393extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000394#endif
395
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000396/* nicintel.c */
397#if CONFIG_NICINTEL == 1
398int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000399extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000400#endif
401
Idwer Vollering004f4b72010-09-03 18:21:21 +0000402/* nicintel_spi.c */
403#if CONFIG_NICINTEL_SPI == 1
404int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000405extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000406#endif
407
Mark Marshall90021f22010-12-03 14:48:11 +0000408/* ogp_spi.c */
409#if CONFIG_OGP_SPI == 1
410int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000411extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000412#endif
413
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000414/* satamv.c */
415#if CONFIG_SATAMV == 1
416int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000417extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000418#endif
419
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000420/* satasii.c */
421#if CONFIG_SATASII == 1
422int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000423extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000424#endif
425
426/* atahpt.c */
427#if CONFIG_ATAHPT == 1
428int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000429extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000430#endif
431
432/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000433#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000434int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000435extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000436#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000437
James Lairdc60de0e2013-03-27 13:00:23 +0000438/* usbblaster_spi.c */
439#if CONFIG_USBBLASTER_SPI == 1
440int usbblaster_spi_init(void);
441extern const struct dev_entry devs_usbblasterspi[];
442#endif
443
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000444/* rayer_spi.c */
445#if CONFIG_RAYER_SPI == 1
446int rayer_spi_init(void);
447#endif
448
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000449/* pony_spi.c */
450#if CONFIG_PONY_SPI == 1
451int pony_spi_init(void);
452#endif
453
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000454/* bitbang_spi.c */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000455int bitbang_spi_init(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000456
457/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000458#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000459int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000460#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000461
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000462/* linux_spi.c */
463#if CONFIG_LINUX_SPI == 1
464int linux_spi_init(void);
465#endif
466
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000467/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000468#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000469int dediprog_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000470#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000471
472/* flashrom.c */
473struct decode_sizes {
474 uint32_t parallel;
475 uint32_t lpc;
476 uint32_t fwh;
477 uint32_t spi;
478};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000479// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000480extern struct decode_sizes max_rom_decode;
481extern int programmer_may_write;
482extern unsigned long flashbase;
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000483void check_chip_supported(const struct flashchip *chip);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000484int check_max_decode(enum chipbustype buses, uint32_t size);
Stefan Tauner66652442011-06-26 17:38:17 +0000485char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000486
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000487/* spi.c */
488enum spi_controller {
489 SPI_CONTROLLER_NONE,
490#if CONFIG_INTERNAL == 1
491#if defined(__i386__) || defined(__x86_64__)
492 SPI_CONTROLLER_ICH7,
493 SPI_CONTROLLER_ICH9,
David Hendricks4e748392011-02-28 23:58:15 +0000494 SPI_CONTROLLER_IT85XX,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000495 SPI_CONTROLLER_IT87XX,
496 SPI_CONTROLLER_SB600,
497 SPI_CONTROLLER_VIA,
498 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000499#endif
500#endif
501#if CONFIG_FT2232_SPI == 1
502 SPI_CONTROLLER_FT2232,
503#endif
504#if CONFIG_DUMMY == 1
505 SPI_CONTROLLER_DUMMY,
506#endif
507#if CONFIG_BUSPIRATE_SPI == 1
508 SPI_CONTROLLER_BUSPIRATE,
509#endif
510#if CONFIG_DEDIPROG == 1
511 SPI_CONTROLLER_DEDIPROG,
512#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000513#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__)))
Michael Karcherb9dbe482011-05-11 17:07:07 +0000514 SPI_CONTROLLER_BITBANG,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000515#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000516#if CONFIG_LINUX_SPI == 1
517 SPI_CONTROLLER_LINUX,
518#endif
Urja Rannikkoc93f5f12011-09-15 23:38:14 +0000519#if CONFIG_SERPROG == 1
520 SPI_CONTROLLER_SERPROG,
521#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000522#if CONFIG_USBBLASTER_SPI == 1
523 SPI_CONTROLLER_USBBLASTER,
524#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000525};
Michael Karcher62797512011-05-11 17:07:02 +0000526
527#define MAX_DATA_UNSPECIFIED 0
528#define MAX_DATA_READ_UNLIMITED 64 * 1024
529#define MAX_DATA_WRITE_UNLIMITED 256
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000530struct spi_programmer {
Michael Karcherb9dbe482011-05-11 17:07:07 +0000531 enum spi_controller type;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000532 unsigned int max_data_read;
533 unsigned int max_data_write;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000534 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000535 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000536 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000537
538 /* Optimized functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000539 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
540 int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000541 int (*write_aai)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000542 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000543};
544
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000545int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000546 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000547int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000548int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
549int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000550int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000551int register_spi_programmer(const struct spi_programmer *programmer);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000552
Stefan Tauner2abab942012-04-27 20:41:23 +0000553/* The following enum is needed by ich_descriptor_tool and ich* code. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000554enum ich_chipset {
555 CHIPSET_ICH_UNKNOWN,
556 CHIPSET_ICH7 = 7,
557 CHIPSET_ICH8,
558 CHIPSET_ICH9,
559 CHIPSET_ICH10,
560 CHIPSET_5_SERIES_IBEX_PEAK,
561 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000562 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000563 CHIPSET_8_SERIES_LYNX_POINT,
564 CHIPSET_8_SERIES_LYNX_POINT_LP,
565 CHIPSET_8_SERIES_WELLSBURG,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000566};
567
Stefan Tauner2abab942012-04-27 20:41:23 +0000568/* ichspi.c */
569#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000570extern uint32_t ichspi_bbar;
571int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000572 enum ich_chipset ich_generation);
Helge Wagnerdd73d832012-08-24 23:03:46 +0000573int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000574
David Hendricks4e748392011-02-28 23:58:15 +0000575/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000576int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000577
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000578/* it87spi.c */
579void enter_conf_mode_ite(uint16_t port);
580void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000581void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000582int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000583
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000584/* mcp6x_spi.c */
585int mcp6x_spi_init(int want_spi);
586
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000587/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000588int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000589
590/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000591int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000592#endif
593
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000594/* opaque.c */
595struct opaque_programmer {
596 int max_data_read;
597 int max_data_write;
598 /* Specific functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000599 int (*probe) (struct flashctx *flash);
600 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
601 int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
602 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000603 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000604};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000605int register_opaque_programmer(const struct opaque_programmer *pgm);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000606
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000607/* programmer.c */
608int noop_shutdown(void);
609void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
610void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000611void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
612void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
613void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
614void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
615uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
616uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
617void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
618struct par_programmer {
619 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
620 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
621 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
622 void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
623 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
624 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
625 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
626 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000627 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000628};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000629int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
630struct registered_programmer {
631 enum chipbustype buses_supported;
632 union {
633 struct par_programmer par;
634 struct spi_programmer spi;
635 struct opaque_programmer opaque;
636 };
637};
638extern struct registered_programmer registered_programmers[];
639extern int registered_programmer_count;
640int register_programmer(struct registered_programmer *pgm);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000641
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000642/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000643#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000644int serprog_init(void);
Stefan Tauner31019d42011-10-22 21:45:27 +0000645void serprog_delay(int usecs);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000646#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000647
648/* serial.c */
Carl-Daniel Hailfinger60d9bd22012-08-09 23:34:41 +0000649#ifdef _WIN32
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000650typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000651#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000652#else
653typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000654#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000655#endif
656
657void sp_flush_incoming(void);
658fdtype sp_openserport(char *dev, unsigned int baud);
659void __attribute__((noreturn)) sp_die(char *msg);
660extern fdtype sp_fd;
David Hendricks8bb20212011-06-14 01:35:36 +0000661/* expose serialport_shutdown as it's currently used by buspirate */
662int serialport_shutdown(void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000663int serialport_write(unsigned char *buf, unsigned int writecnt);
Stefan Taunerae3d8372013-04-01 00:45:45 +0000664int serialport_write_nonblock(unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000665int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000666int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000667
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000668/* Serial port/pin mapping:
669
670 1 CD <-
671 2 RXD <-
672 3 TXD ->
673 4 DTR ->
674 5 GND --
675 6 DSR <-
676 7 RTS ->
677 8 CTS <-
678 9 RI <-
679*/
680enum SP_PIN {
681 PIN_CD = 1,
682 PIN_RXD,
683 PIN_TXD,
684 PIN_DTR,
685 PIN_GND,
686 PIN_DSR,
687 PIN_RTS,
688 PIN_CTS,
689 PIN_RI,
690};
691
692void sp_set_pin(enum SP_PIN pin, int val);
693int sp_get_pin(enum SP_PIN pin);
694
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000695#endif /* !__PROGRAMMER_H__ */