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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
Stefan Reinauerf79edb92009-01-26 01:23:31 +000033#if (defined(__MACH__) && defined(__APPLE__))
34#define __DARWIN__
35#endif
36
Stefan Reinauerf02edec2009-01-26 00:07:25 +000037#if defined(__FreeBSD__)
Andriy Gapon65c1b862008-05-22 13:22:45 +000038 #include <machine/cpufunc.h>
39 #define off64_t off_t
40 #define lseek64 lseek
41 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
42 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
43 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
44 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
45 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
46 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
47#else
Stefan Reinauerf79edb92009-01-26 01:23:31 +000048#if defined(__DARWIN__)
49 #include <DirectIO/darwinio.h>
50 #define off64_t off_t
51 #define lseek64 lseek
52#endif
Andriy Gapon65c1b862008-05-22 13:22:45 +000053 #define OUTB outb
54 #define OUTW outw
55 #define OUTL outl
56 #define INB inb
57 #define INW inw
58 #define INL inl
59#endif
60
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000061static inline void chip_writeb(uint8_t b, volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000062{
63 *(volatile uint8_t *) addr = b;
64}
65
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000066static inline void chip_writew(uint16_t b, volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000067{
68 *(volatile uint16_t *) addr = b;
69}
70
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000071static inline void chip_writel(uint32_t b, volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000072{
73 *(volatile uint32_t *) addr = b;
74}
75
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000076static inline uint8_t chip_readb(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000077{
78 return *(volatile uint8_t *) addr;
79}
80
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000081static inline uint16_t chip_readw(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000082{
83 return *(volatile uint16_t *) addr;
84}
85
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000086static inline uint32_t chip_readl(const volatile void *addr)
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000087{
88 return *(volatile uint32_t *) addr;
89}
90
Uwe Hermanne5ac1642008-03-12 11:54:51 +000091#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
92
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000093struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +000094 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +000095 const char *name;
Uwe Hermann394131e2008-10-18 21:14:13 +000096 /*
97 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000098 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
99 * Identification code.
100 */
101 uint32_t manufacture_id;
102 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000103
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000104 int total_size;
105 int page_size;
106
Uwe Hermann394131e2008-10-18 21:14:13 +0000107 /*
108 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000109 * everything worked correctly.
110 */
111 uint32_t tested;
112
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000113 int (*probe) (struct flashchip *flash);
114 int (*erase) (struct flashchip *flash);
115 int (*write) (struct flashchip *flash, uint8_t *buf);
116 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000117
Uwe Hermann372eeb52007-12-04 21:49:06 +0000118 /* Some flash devices have an additional register space. */
Stefan Reinauerce532972007-05-23 17:20:56 +0000119 volatile uint8_t *virtual_memory;
120 volatile uint8_t *virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000121};
122
Peter Stuge1159d582008-05-03 04:34:37 +0000123#define TEST_UNTESTED 0
124
125#define TEST_OK_PROBE (1<<0)
126#define TEST_OK_READ (1<<1)
127#define TEST_OK_ERASE (1<<2)
128#define TEST_OK_WRITE (1<<3)
Mart Raudsepp1d3b0632008-05-27 23:51:55 +0000129#define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000130#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000131#define TEST_OK_MASK 0x0f
132
133#define TEST_BAD_PROBE (1<<4)
134#define TEST_BAD_READ (1<<5)
135#define TEST_BAD_ERASE (1<<6)
136#define TEST_BAD_WRITE (1<<7)
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000137#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000138#define TEST_BAD_MASK 0xf0
139
Ollie Lho184a4042005-11-26 21:55:36 +0000140extern struct flashchip flashchips[];
141
Uwe Hermann372eeb52007-12-04 21:49:06 +0000142/*
143 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000144 * entry of each section should be the manufacturer ID, followed by the
145 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +0000146 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000147 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
148 * continuation code.
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000149 * SPI parts have 16-bit device IDs if they support RDID.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000150 */
151
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000152#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
153
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000154#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000155
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000156#define AMD_ID 0x01 /* AMD */
Mats Erik Anderssoncbfed282008-10-07 12:21:12 +0000157#define AM_29F002BT 0xB0
158#define AM_29F002BB 0x34
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000159#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +0000160#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000161#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000162
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000163#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000164#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Rudolf Marekdcf46532008-05-22 13:42:23 +0000165#define AMIC_A25L40P 0x2013
Carl-Daniel Hailfinger8b114392008-07-06 23:04:01 +0000166#define AMIC_A29002B 0x0d
167#define AMIC_A29002T 0x8c
168#define AMIC_A29040B 0x86
Jens Kuehnelb9f61742008-06-18 13:36:34 +0000169#define AMIC_A49LF040A 0x9d
Peter Lemenkov539478d2007-10-22 20:36:16 +0000170
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000171#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000172#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000173
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000174#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000175#define AT_25DF021 0x4300
176#define AT_25DF041A 0x4401
177#define AT_25DF081 0x4502
178#define AT_25DF161 0x4602
179#define AT_25DF321 0x4700 /* also 26DF321 */
180#define AT_25DF321A 0x4701
181#define AT_25DF641 0x4800
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000182#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
183#define AT_25F512B 0x6500
184#define AT_25FS010 0x6601
185#define AT_25FS040 0x6604
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000186#define AT_26DF041 0x4400
187#define AT_26DF081 0x4500 /* guessed, no datasheet available */
188#define AT_26DF081A 0x4501
189#define AT_26DF161 0x4600
190#define AT_26DF161A 0x4601
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000191#define AT_26DF321 0x4700 /* also 25DF321 */
192#define AT_26F004 0x0400
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000193#define AT_29C040A 0xA4
Uwe Hermannd7f48062007-04-28 02:22:59 +0000194#define AT_29C020 0xDA
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000195#define AT_45BR3214B /* No ID available */
196#define AT_45CS1282 0x2920
197#define AT_45D011 /* No ID available */
198#define AT_45D021A /* No ID available */
199#define AT_45D041A /* No ID available */
200#define AT_45D081A /* No ID available */
201#define AT_45D161 /* No ID available */
202#define AT_45DB011 /* No ID available */
203#define AT_45DB011B /* No ID available */
204#define AT_45DB011D 0x2200
205#define AT_45DB021A /* No ID available */
206#define AT_45DB021B /* No ID available */
207#define AT_45DB021D 0x2300
208#define AT_45DB041A /* No ID available */
209#define AT_45DB041D 0x2400
210#define AT_45DB081A /* No ID available */
211#define AT_45DB081D 0x2500
212#define AT_45DB161 /* No ID available */
213#define AT_45DB161B /* No ID available */
214#define AT_45DB161D 0x2600
215#define AT_45DB321 /* No ID available */
216#define AT_45DB321B /* No ID available */
217#define AT_45DB321C 0x2700
218#define AT_45DB321D 0x2701 /* Buggy data sheet */
219#define AT_45DB642 /* No ID available */
220#define AT_45DB642D 0x2800
Frederico Silva4bcf1752007-12-10 16:57:59 +0000221#define AT_49F002N 0x07 /* for AT49F002(N) */
222#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000223
Peter Lemenkov539478d2007-10-22 20:36:16 +0000224#define CATALYST_ID 0x31 /* Catalyst */
225
Uwe Hermann394131e2008-10-18 21:14:13 +0000226#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000227#define EMST_F49B002UA 0x00
228
Uwe Hermann372eeb52007-12-04 21:49:06 +0000229/*
230 * EN25 chips are SPI, first byte of device ID is memory type,
231 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000232 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
233 * is the continuation code for IDs in bank 2.
234 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
235 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
236 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000237 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000238#define EON_ID 0x7F1C /* EON Silicon Devices */
239#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000240#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
241#define EN_25B10 0x2011
242#define EN_25B20 0x2012
243#define EN_25B40 0x2013
244#define EN_25B80 0x2014
245#define EN_25B16 0x2015
246#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000247#define EN_29F512 0x7F21
248#define EN_29F010 0x7F20
249#define EN_29F040A 0x7F04
250#define EN_29LV010 0x7F6E
251#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000252#define EN_29F002T 0x7F92
253#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000254
Peter Lemenkov539478d2007-10-22 20:36:16 +0000255#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000256#define MBM29F400BC 0xAB
257#define MBM29F400TC 0x23
258#define MBM29F004BC 0x7B
259#define MBM29F004TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000260
261#define HYUNDAI_ID 0xAD /* Hyundai */
262
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000263#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
264#define IM_29F004B 0xAE
265#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000266
267#define INTEL_ID 0x89 /* Intel */
268
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000269#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000270
Uwe Hermann372eeb52007-12-04 21:49:06 +0000271/*
272 * MX25 chips are SPI, first byte of device ID is memory type,
273 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000274 * Generalplus SPI chips seem to be compatible with Macronix
275 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000276 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000277#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000278#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
279#define MX_25L1005 0x2011
280#define MX_25L2005 0x2012
281#define MX_25L4005 0x2013 /* MX25L4005{,A} */
282#define MX_25L8005 0x2014
283#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
284#define MX_25L3205 0x2016 /* MX25L3205{,A} */
285#define MX_25L6405 0x2017 /* MX25L3205{,D} */
Stephan Guilloux2f132fe2009-04-21 01:47:16 +0000286#define MX_25L12805 0x2018 /* MX25L12805 */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000287#define MX_25L1635D 0x2415
288#define MX_25L3235D 0x2416
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000289#define MX_29F002B 0x34
290#define MX_29F002T 0xB0
Carl-Daniel Hailfinger7de86392008-12-10 10:32:05 +0000291#define MX_29LV002CB 0x5A
292#define MX_29LV002CT 0x59
293#define MX_29LV004CB 0xB6
294#define MX_29LV004CT 0xB5
295#define MX_29LV008CB 0x37
296#define MX_29LV008CT 0x3E
297#define MX_29F040C 0xA4
298#define MX_29F200CB 0x57
299#define MX_29F200CT 0x51
300#define MX_29F400CB 0xAB
301#define MX_29F400CT 0x23
302#define MX_29LV040C 0x4F
303#define MX_29LV128DB 0x7A
304#define MX_29LV128DT 0x7E
305#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
306#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
307#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
308#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
309#define MX_29LV400CB 0xBA
310#define MX_29LV400CT 0xB9
311#define MX_29LV800CB 0x5B
312#define MX_29LV800CT 0xDA
313#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
314#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
315#define MX_29SL402CB 0xF1
316#define MX_29SL402CT 0x70
317#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
318#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000319
Uwe Hermann394131e2008-10-18 21:14:13 +0000320/*
321 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
322 * have a 0x7F continuation code prefix.
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000323 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000324#define PMC_ID 0x7F9D /* PMC */
325#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
326#define PMC_25LV512 0x7B
327#define PMC_25LV010 0x7C
328#define PMC_25LV020 0x7D
329#define PMC_25LV040 0x7E
330#define PMC_25LV080B 0x13
331#define PMC_25LV016B 0x14
332#define PMC_39LV512 0x1B
333#define PMC_39F010 0x1C /* also Pm39LV010 */
334#define PMC_39LV020 0x3D
335#define PMC_39LV040 0x3E
336#define PMC_39F020 0x4D
337#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000338#define PMC_49FL002 0x6D
339#define PMC_49FL004 0x6E
340
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000341#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000342#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000343
Uwe Hermann372eeb52007-12-04 21:49:06 +0000344/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000345 * Spansion was previously a joint venture of AMD and Fujitsu.
346 * S25 chips are SPI. The first device ID byte is memory type and
347 * the second device ID byte is memory capacity.
348 */
349#define SPANSION_ID 0x01 /* Spansion */
350#define SPANSION_S25FL016A 0x0214
351
352/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000353 * SST25 chips are SPI, first byte of device ID is memory type, second
354 * byte of device ID is related to log(bitsize) at least for some chips.
355 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000356#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000357#define SST_25WF512 0x2501
358#define SST_25WF010 0x2502
359#define SST_25WF020 0x2503
360#define SST_25WF040 0x2504
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000361#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
362#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
363#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
364#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
365#define SST_25VF040B 0x258D
366#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
367#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
368#define SST_25VF080B 0x258E
369#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000370#define SST_25VF016B 0x2541
371#define SST_25VF032B 0x254A
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000372#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
373#define SST_26VF016 0x2601
374#define SST_26VF032 0x2602
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000375#define SST_27SF512 0xA4
376#define SST_27SF010 0xA5
377#define SST_27SF020 0xA6
378#define SST_27VF010 0xA9
379#define SST_27VF020 0xAA
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000380#define SST_28SF040 0x04
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000381#define SST_29EE512 0x5D
382#define SST_29EE010 0x07
383#define SST_29LE010 0x08 /* also SST29VE010 */
384#define SST_29EE020A 0x10
385#define SST_29LE020 0x12 /* also SST29VE020 */
386#define SST_29SF020 0x24
387#define SST_29VF020 0x25
388#define SST_29SF040 0x13
389#define SST_29VF040 0x14
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000390#define SST_39SF010 0xB5
391#define SST_39SF020 0xB6
392#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000393#define SST_39VF512 0xD4
394#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000395#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000396#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000397#define SST_49LF040B 0x50
398#define SST_49LF040 0x51
Sven Schnellec208dfb2009-01-07 12:35:09 +0000399#define SST_49LF020 0x61
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000400#define SST_49LF020A 0x52
401#define SST_49LF080A 0x5B
402#define SST_49LF002A 0x57
403#define SST_49LF003A 0x1B
404#define SST_49LF004A 0x60
405#define SST_49LF008A 0x5A
406#define SST_49LF004C 0x54
407#define SST_49LF008C 0x59
408#define SST_49LF016C 0x5C
409#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000410
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000411/*
412 * ST25P chips are SPI, first byte of device ID is memory type, second
413 * byte of device ID is related to log(bitsize) at least for some chips.
414 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000415#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000416#define ST_M25P05A 0x2010
417#define ST_M25P10A 0x2011
418#define ST_M25P20 0x2012
419#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000420#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000421#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000422#define ST_M25P16 0x2015
423#define ST_M25P32 0x2016
424#define ST_M25P64 0x2017
425#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000426#define ST_M50FLW040A 0x08
427#define ST_M50FLW040B 0x28
428#define ST_M50FLW080A 0x80
429#define ST_M50FLW080B 0x81
Carl-Daniel Hailfinger96e1b552008-11-02 14:25:11 +0000430#define ST_M50FW002 0x29
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000431#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000432#define ST_M50FW080 0x2D
433#define ST_M50FW016 0x2E
434#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000435#define ST_M29F002B 0x34
436#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000437#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000438#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000439#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000440#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000441
Peter Lemenkov539478d2007-10-22 20:36:16 +0000442#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000443#define S29C51001T 0x01
444#define S29C51002T 0x02
445#define S29C51004T 0x03
446#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000447
Peter Lemenkov539478d2007-10-22 20:36:16 +0000448#define TI_ID 0x97 /* Texas Instruments */
449
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000450/*
451 * W25X chips are SPI, first byte of device ID is memory type, second
452 * byte of device ID is related to log(bitsize).
453 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000454#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000455#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
456#define W_25X10 0x3011
457#define W_25X20 0x3012
458#define W_25X40 0x3013
459#define W_25X80 0x3014
Carl-Daniel Hailfinger052cdc32008-12-04 00:58:10 +0000460#define W_25X16 0x3015
461#define W_25X32 0x3016
462#define W_25X64 0x3017
Peter Lemenkov539478d2007-10-22 20:36:16 +0000463#define W_29C011 0xC1
464#define W_29C020C 0x45
465#define W_29C040P 0x46
466#define W_29EE011 0xC1
467#define W_39V040FA 0x34
468#define W_39V040A 0x3D
469#define W_39V040B 0x54
470#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000471#define W_39V080FA 0xD3
472#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000473#define W_49F002U 0x0B
474#define W_49V002A 0xB0
475#define W_49V002FA 0x32
476
Uwe Hermann372eeb52007-12-04 21:49:06 +0000477/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000478void myusec_delay(int time);
479void myusec_calibrate_delay();
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000480
Uwe Hermann372eeb52007-12-04 21:49:06 +0000481/* PCI handling for board/chipset_enable */
482struct pci_access *pacc;
Stefan Reinauer70385642007-04-06 11:58:03 +0000483struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000484struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
485 uint16_t card_vendor, uint16_t card_device);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000486
Uwe Hermann372eeb52007-12-04 21:49:06 +0000487/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000488void w836xx_ext_enter(uint16_t port);
489void w836xx_ext_leave(uint16_t port);
490unsigned char wbsio_read(uint16_t index, uint8_t reg);
491void wbsio_write(uint16_t index, uint8_t reg, uint8_t data);
492void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000493int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000494void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000495
Uwe Hermann372eeb52007-12-04 21:49:06 +0000496/* chipset_enable.c */
497int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000498void print_supported_chipsets(void);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000499
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000500extern unsigned long flashbase;
501
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000502typedef enum {
503 BUS_TYPE_LPC,
504 BUS_TYPE_ICH7_SPI,
505 BUS_TYPE_ICH9_SPI,
506 BUS_TYPE_IT87XX_SPI,
Jason Wanga3f04be2008-11-28 21:36:51 +0000507 BUS_TYPE_SB600_SPI,
Peter Stugebf196e92009-01-26 03:08:45 +0000508 BUS_TYPE_VIA_SPI,
509 BUS_TYPE_WBSIO_SPI
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000510} flashbus_t;
511
512extern flashbus_t flashbus;
513extern void *spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000514
Uwe Hermann0846f892007-08-23 13:34:59 +0000515/* debug.c */
516extern int verbose;
517#define printf_debug(x...) { if (verbose) printf(x); }
518
Stefan Reinauer0593f212009-01-26 01:10:48 +0000519/* physmap.c */
520void *physmap(const char *descr, unsigned long phys_addr, size_t len);
521void physunmap(void *virt_addr, size_t len);
522
Uwe Hermann0846f892007-08-23 13:34:59 +0000523/* flashrom.c */
Peter Stuge776d2022009-01-26 00:39:57 +0000524void map_flash_registers(struct flashchip *flash);
Uwe Hermann0846f892007-08-23 13:34:59 +0000525
526/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000527int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000528int read_romlayout(char *name);
529int find_romentry(char *name);
530int handle_romentries(uint8_t *buffer, uint8_t *content);
531
532/* lbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000533int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000534extern char *lb_part, *lb_vendor;
535
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000536/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000537int probe_spi_rdid(struct flashchip *flash);
Rudolf Marek48a85e42008-06-30 21:45:17 +0000538int probe_spi_rdid4(struct flashchip *flash);
Carl-Daniel Hailfinger14e50ac2008-11-28 01:25:00 +0000539int probe_spi_rems(struct flashchip *flash);
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000540int probe_spi_res(struct flashchip *flash);
Uwe Hermann394131e2008-10-18 21:14:13 +0000541int spi_command(unsigned int writecnt, unsigned int readcnt,
542 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000543int spi_write_enable();
544int spi_write_disable();
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000545int spi_chip_erase_60(struct flashchip *flash);
Peter Stugefa8c5502008-05-10 23:07:52 +0000546int spi_chip_erase_c7(struct flashchip *flash);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000547int spi_chip_erase_60_c7(struct flashchip *flash);
Stefan Reinauer424ed222008-10-29 22:13:20 +0000548int spi_chip_erase_d8(struct flashchip *flash);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000549int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
550int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
Peter Stugefa8c5502008-05-10 23:07:52 +0000551int spi_chip_write(struct flashchip *flash, uint8_t *buf);
552int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000553uint8_t spi_read_status_register();
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000554int spi_disable_blockprotect(void);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000555void spi_byte_program(int address, uint8_t byte);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000556int spi_nbyte_read(int address, uint8_t *bytes, int len);
Peter Stugefd9217d2009-01-26 03:37:40 +0000557int spi_aai_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000558
Uwe Hermann0846f892007-08-23 13:34:59 +0000559/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000560int probe_82802ab(struct flashchip *flash);
561int erase_82802ab(struct flashchip *flash);
562int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000563
564/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000565int probe_29f040b(struct flashchip *flash);
566int erase_29f040b(struct flashchip *flash);
567int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000568
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000569/* en29f002a.c */
570int probe_en29f002a(struct flashchip *flash);
571int erase_en29f002a(struct flashchip *flash);
572int write_en29f002a(struct flashchip *flash, uint8_t *buf);
573
Dominik Geyerb46acba2008-05-16 12:55:55 +0000574/* ichspi.c */
FENG yu ningf041e9b2008-12-15 02:32:11 +0000575int ich_init_opcodes();
Uwe Hermann394131e2008-10-18 21:14:13 +0000576int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
577 const unsigned char *writearr, unsigned char *readarr);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000578int ich_spi_read(struct flashchip *flash, uint8_t * buf);
579int ich_spi_write(struct flashchip *flash, uint8_t * buf);
580
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000581/* it87spi.c */
582extern uint16_t it8716f_flashport;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000583int it87xx_probe_spi_flash(const char *name);
Uwe Hermann394131e2008-10-18 21:14:13 +0000584int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
585 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000586int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
587int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000588
Jason Wanga3f04be2008-11-28 21:36:51 +0000589/* sb600spi.c */
590int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
591 const unsigned char *writearr, unsigned char *readarr);
592int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
593int sb600_spi_write(struct flashchip *flash, uint8_t *buf);
594uint8_t sb600_read_status_register(void);
595extern uint8_t volatile *sb600_spibar;
596
Uwe Hermann0846f892007-08-23 13:34:59 +0000597/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000598uint8_t oddparity(uint8_t val);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000599void toggle_ready_jedec(volatile uint8_t *dst);
600void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
601void unprotect_jedec(volatile uint8_t *bios);
602void protect_jedec(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000603int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
604 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000605int probe_jedec(struct flashchip *flash);
606int erase_chip_jedec(struct flashchip *flash);
607int write_jedec(struct flashchip *flash, uint8_t *buf);
608int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
609int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
610int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
611 volatile uint8_t *dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000612
Peter Stugeaf8ffac2009-01-26 06:42:02 +0000613/* m29f002.c */
614int erase_m29f002(struct flashchip *flash);
615int write_m29f002t(struct flashchip *flash, uint8_t *buf);
616int write_m29f002b(struct flashchip *flash, uint8_t *buf);
617
Uwe Hermann0846f892007-08-23 13:34:59 +0000618/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000619int probe_m29f400bt(struct flashchip *flash);
620int erase_m29f400bt(struct flashchip *flash);
621int block_erase_m29f400bt(volatile uint8_t *bios,
Uwe Hermann0846f892007-08-23 13:34:59 +0000622 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000623int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000624int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000625void toggle_ready_m29f400bt(volatile uint8_t *dst);
626void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
627void protect_m29f400bt(volatile uint8_t *bios);
628void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
629 volatile uint8_t *dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000630
631/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000632int probe_29f002(struct flashchip *flash);
633int erase_29f002(struct flashchip *flash);
634int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000635
Nikolay Petukhov4784c472008-05-17 01:08:58 +0000636/* pm49fl00x.c */
637int probe_49fl00x(struct flashchip *flash);
638int erase_49fl00x(struct flashchip *flash);
639int write_49fl00x(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000640
641/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000642int probe_lhf00l04(struct flashchip *flash);
643int erase_lhf00l04(struct flashchip *flash);
644int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
645void toggle_ready_lhf00l04(volatile uint8_t *dst);
646void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
647void protect_lhf00l04(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000648
649/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000650int probe_28sf040(struct flashchip *flash);
651int erase_28sf040(struct flashchip *flash);
652int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000653
654/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000655int probe_39sf020(struct flashchip *flash);
656int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000657
658/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000659int erase_49lf040(struct flashchip *flash);
660int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000661
662/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000663int probe_49lfxxxc(struct flashchip *flash);
664int erase_49lfxxxc(struct flashchip *flash);
665int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000666
667/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000668int probe_sst_fwhub(struct flashchip *flash);
669int erase_sst_fwhub(struct flashchip *flash);
670int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000671
Peter Stugecce26822008-07-21 17:48:40 +0000672/* w39v040c.c */
673int probe_w39v040c(struct flashchip *flash);
674int erase_w39v040c(struct flashchip *flash);
675int write_w39v040c(struct flashchip *flash, uint8_t *buf);
676
Stefan Reinauerac378972008-03-17 22:59:40 +0000677/* w39V080fa.c */
678int probe_winbond_fwhub(struct flashchip *flash);
679int erase_winbond_fwhub(struct flashchip *flash);
680int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
681
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000682/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000683int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000684
Uwe Hermann0846f892007-08-23 13:34:59 +0000685/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000686int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000687
Peter Stugebf196e92009-01-26 03:08:45 +0000688/* wbsio_spi.c */
689int wbsio_check_for_spi(const char *name);
690int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
691int wbsio_spi_read(struct flashchip *flash, uint8_t *buf);
692int wbsio_spi_write(struct flashchip *flash, uint8_t *buf);
693
Claus Gindharta7b35512008-04-28 17:51:09 +0000694/* stm50flw0x0x.c */
695int probe_stm50flw0x0x(struct flashchip *flash);
696int erase_stm50flw0x0x(struct flashchip *flash);
697int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000698
Ollie Lho761bf1b2004-03-20 16:46:10 +0000699#endif /* !__FLASH_H__ */