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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
Stefan Reinauer8fa64812009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
Carl-Daniel Hailfingera0a6ae92009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
Adam Kaufman064b1f22007-02-06 19:47:50 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000013 *
Uwe Hermannd1107642007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000018 *
Uwe Hermannd1107642007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000022 */
23
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000028#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000029#include <stdio.h>
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +000030#include "hwaccess.h"
Andriy Gapon65c1b862008-05-22 13:22:45 +000031
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000032typedef unsigned long chipaddr;
33
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000034enum programmer {
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000035#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000036 PROGRAMMER_INTERNAL,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000037#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000038#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000039 PROGRAMMER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000040#endif
41#if NIC3COM_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000042 PROGRAMMER_NIC3COM,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000043#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +000044#if GFXNVIDIA_SUPPORT == 1
45 PROGRAMMER_GFXNVIDIA,
46#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000047#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +000048 PROGRAMMER_DRKAISER,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000049#endif
50#if SATASII_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000051 PROGRAMMER_SATASII,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000052#endif
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000053#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000054 PROGRAMMER_IT87SPI,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000055#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000056#if FT2232_SPI_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000057 PROGRAMMER_FT2232SPI,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000058#endif
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000059#if SERPROG_SUPPORT == 1
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000060 PROGRAMMER_SERPROG,
Carl-Daniel Hailfinger6be74112009-08-12 16:17:41 +000061#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +000062#if BUSPIRATE_SPI_SUPPORT == 1
63 PROGRAMMER_BUSPIRATESPI,
64#endif
Carl-Daniel Hailfinger37fc4692009-08-12 14:34:35 +000065 PROGRAMMER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger415e5132009-08-12 11:39:29 +000066};
67
68extern enum programmer programmer;
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000069
70struct programmer_entry {
71 const char *vendor;
72 const char *name;
73
74 int (*init) (void);
75 int (*shutdown) (void);
76
Uwe Hermannd1129ac2009-05-28 15:07:42 +000077 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
78 size_t len);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +000079 void (*unmap_flash_region) (void *virt_addr, size_t len);
80
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000081 void (*chip_writeb) (uint8_t val, chipaddr addr);
82 void (*chip_writew) (uint16_t val, chipaddr addr);
83 void (*chip_writel) (uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000084 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000085 uint8_t (*chip_readb) (const chipaddr addr);
86 uint16_t (*chip_readw) (const chipaddr addr);
87 uint32_t (*chip_readl) (const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000088 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000089 void (*delay) (int usecs);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +000090};
91
92extern const struct programmer_entry programmer_table[];
93
Uwe Hermann09e04f72009-05-16 22:36:00 +000094int programmer_init(void);
95int programmer_shutdown(void);
96void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
97 size_t len);
98void programmer_unmap_flash_region(void *virt_addr, size_t len);
99void chip_writeb(uint8_t val, chipaddr addr);
100void chip_writew(uint16_t val, chipaddr addr);
101void chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000102void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Uwe Hermann09e04f72009-05-16 22:36:00 +0000103uint8_t chip_readb(const chipaddr addr);
104uint16_t chip_readw(const chipaddr addr);
105uint32_t chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000106void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000107void programmer_delay(int usecs);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000108
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000109enum bitbang_spi_master {
110 BITBANG_SPI_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000111};
112
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000113extern const int bitbang_spi_master_count;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000114
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000115extern enum bitbang_spi_master bitbang_spi_master;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000116
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000117struct bitbang_spi_master_entry {
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000118 void (*set_cs) (int val);
119 void (*set_sck) (int val);
120 void (*set_mosi) (int val);
121 int (*get_miso) (void);
122};
123
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000124#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
125
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000126enum chipbustype {
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000127 CHIP_BUSTYPE_NONE = 0,
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000128 CHIP_BUSTYPE_PARALLEL = 1 << 0,
129 CHIP_BUSTYPE_LPC = 1 << 1,
130 CHIP_BUSTYPE_FWH = 1 << 2,
131 CHIP_BUSTYPE_SPI = 1 << 3,
132 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
133 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
134};
135
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000136/*
137 * How many different contiguous runs of erase blocks with one size each do
138 * we have for a given erase function?
139 */
140#define NUM_ERASEREGIONS 5
141
142/*
143 * How many different erase functions do we have per chip?
144 */
145#define NUM_ERASEFUNCTIONS 5
146
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000147struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +0000148 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000149 const char *name;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000150
151 enum chipbustype bustype;
152
Uwe Hermann394131e2008-10-18 21:14:13 +0000153 /*
154 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000155 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
156 * Identification code.
157 */
158 uint32_t manufacture_id;
159 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000160
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000161 int total_size;
162 int page_size;
163
Uwe Hermann394131e2008-10-18 21:14:13 +0000164 /*
165 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +0000166 * everything worked correctly.
167 */
168 uint32_t tested;
169
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000170 int (*probe) (struct flashchip *flash);
Maciej Pijankac6e11112009-06-03 14:46:22 +0000171
172 /* Delay after "enter/exit ID mode" commands in microseconds. */
173 int probe_timing;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000174 int (*erase) (struct flashchip *flash);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000175
176 /*
Carl-Daniel Hailfinger63ce4bb2009-12-22 13:04:53 +0000177 * Erase blocks and associated erase function. Any chip erase function
178 * is stored as chip-sized virtual block together with said function.
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000179 */
180 struct block_eraser {
181 struct eraseblock{
182 unsigned int size; /* Eraseblock size */
183 unsigned int count; /* Number of contiguous blocks with that size */
184 } eraseblocks[NUM_ERASEREGIONS];
185 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
186 } block_erasers[NUM_ERASEFUNCTIONS];
187
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000188 int (*write) (struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000189 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000190
Uwe Hermann372eeb52007-12-04 21:49:06 +0000191 /* Some flash devices have an additional register space. */
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000192 chipaddr virtual_memory;
193 chipaddr virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000194};
195
Peter Stuge1159d582008-05-03 04:34:37 +0000196#define TEST_UNTESTED 0
197
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000198#define TEST_OK_PROBE (1 << 0)
199#define TEST_OK_READ (1 << 1)
200#define TEST_OK_ERASE (1 << 2)
201#define TEST_OK_WRITE (1 << 3)
202#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
203#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
Carl-Daniel Hailfingera06287c2009-09-23 22:01:33 +0000204#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000205#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000206#define TEST_OK_MASK 0x0f
207
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000208#define TEST_BAD_PROBE (1 << 4)
209#define TEST_BAD_READ (1 << 5)
210#define TEST_BAD_ERASE (1 << 6)
211#define TEST_BAD_WRITE (1 << 7)
212#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +0000213#define TEST_BAD_MASK 0xf0
214
Maciej Pijankac6e11112009-06-03 14:46:22 +0000215/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
216 * field and zero delay.
217 *
218 * SPI devices will always have zero delay and ignore this field.
219 */
220#define TIMING_FIXME -1
221/* this is intentionally same value as fixme */
222#define TIMING_IGNORED -1
223#define TIMING_ZERO -2
224
Ollie Lho184a4042005-11-26 21:55:36 +0000225extern struct flashchip flashchips[];
226
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000227#if INTERNAL_SUPPORT == 1
Uwe Hermann05fab752009-05-16 23:42:17 +0000228struct penable {
229 uint16_t vendor_id;
230 uint16_t device_id;
231 int status;
232 const char *vendor_name;
233 const char *device_name;
234 int (*doit) (struct pci_dev *dev, const char *name);
235};
236
237extern const struct penable chipset_enables[];
238
239struct board_pciid_enable {
240 /* Any device, but make it sensible, like the ISA bridge. */
241 uint16_t first_vendor;
242 uint16_t first_device;
243 uint16_t first_card_vendor;
244 uint16_t first_card_device;
245
246 /* Any device, but make it sensible, like
247 * the host bridge. May be NULL.
248 */
249 uint16_t second_vendor;
250 uint16_t second_device;
251 uint16_t second_card_vendor;
252 uint16_t second_card_device;
253
254 /* The vendor / part name from the coreboot table. */
255 const char *lb_vendor;
256 const char *lb_part;
257
258 const char *vendor_name;
259 const char *board_name;
260
261 int (*enable) (const char *name);
262};
263
264extern struct board_pciid_enable board_pciid_enables[];
265
266struct board_info {
267 const char *vendor;
268 const char *name;
269};
270
271extern const struct board_info boards_ok[];
272extern const struct board_info boards_bad[];
Uwe Hermanne1aa75e2009-06-18 14:04:44 +0000273extern const struct board_info laptops_ok[];
274extern const struct board_info laptops_bad[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000275#endif
Uwe Hermann05fab752009-05-16 23:42:17 +0000276
Uwe Hermann372eeb52007-12-04 21:49:06 +0000277/* udelay.c */
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000278void myusec_delay(int usecs);
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000279void myusec_calibrate_delay(void);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000280
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000281#if NEED_PCI == 1
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000282/* pcidev.c */
283#define PCI_OK 0
284#define PCI_NT 1 /* Not tested */
Rudolf Marek68720c72009-05-17 19:39:27 +0000285
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000286extern uint32_t io_base_addr;
287extern struct pci_access *pacc;
288extern struct pci_filter filter;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000289extern struct pci_dev *pcidev_dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000290struct pcidev_status {
291 uint16_t vendor_id;
292 uint16_t device_id;
293 int status;
294 const char *vendor_name;
295 const char *device_name;
296};
TURBO Jb0912c02009-09-02 23:00:46 +0000297uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs);
298uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000299#endif
Uwe Hermannba290d12009-06-17 12:07:12 +0000300
301/* print.c */
302char *flashbuses_to_text(enum chipbustype bustype);
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000303void print_supported(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000304#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1)
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000305void print_supported_pcidevs(struct pcidev_status *devs);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000306#endif
Carl-Daniel Hailfingerf5292052009-11-17 09:57:34 +0000307void print_supported_wiki(void);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000308
Uwe Hermann372eeb52007-12-04 21:49:06 +0000309/* board_enable.c */
Peter Stuge9d9399c2009-01-26 02:34:51 +0000310void w836xx_ext_enter(uint16_t port);
311void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000312uint8_t sio_read(uint16_t port, uint8_t reg);
313void sio_write(uint16_t port, uint8_t reg, uint8_t data);
314void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000315int board_flash_enable(const char *vendor, const char *part);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000316
Uwe Hermann372eeb52007-12-04 21:49:06 +0000317/* chipset_enable.c */
318int chipset_flash_enable(void);
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000319
Stefan Reinauer0593f212009-01-26 01:10:48 +0000320/* physmap.c */
321void *physmap(const char *descr, unsigned long phys_addr, size_t len);
322void physunmap(void *virt_addr, size_t len);
Stefan Reinauer8fa64812009-08-12 09:27:45 +0000323int setup_cpu_msr(int cpu);
324void cleanup_cpu_msr(void);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000325
326/* cbtable.c */
327void lb_vendor_dev_from_string(char *boardstring);
328int coreboot_init(void);
329extern char *lb_part, *lb_vendor;
330extern int partvendor_from_cbtable;
Stefan Reinauer0593f212009-01-26 01:10:48 +0000331
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000332/* internal.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000333#if NEED_PCI == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000334struct superio {
335 uint16_t vendor;
336 uint16_t port;
337 uint16_t model;
338};
339extern struct superio superio;
340#define SUPERIO_VENDOR_NONE 0x0
341#define SUPERIO_VENDOR_ITE 0x1
Uwe Hermann2cac6862009-05-16 22:05:42 +0000342struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Carl-Daniel Hailfinger9f46cfc2009-11-15 17:13:29 +0000343struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
Uwe Hermann2cac6862009-05-16 22:05:42 +0000344struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
345struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
346 uint16_t card_vendor, uint16_t card_device);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000347#endif
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000348void get_io_perms(void);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +0000349void release_io_perms(void);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000350#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000351void probe_superio(void);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000352int internal_init(void);
353int internal_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000354void internal_chip_writeb(uint8_t val, chipaddr addr);
355void internal_chip_writew(uint16_t val, chipaddr addr);
356void internal_chip_writel(uint32_t val, chipaddr addr);
357uint8_t internal_chip_readb(const chipaddr addr);
358uint16_t internal_chip_readw(const chipaddr addr);
359uint32_t internal_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000360void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000361#endif
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000362void mmio_writeb(uint8_t val, void *addr);
363void mmio_writew(uint16_t val, void *addr);
364void mmio_writel(uint32_t val, void *addr);
365uint8_t mmio_readb(void *addr);
366uint16_t mmio_readw(void *addr);
367uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000368void internal_delay(int usecs);
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000369int noop_shutdown(void);
Uwe Hermannc6915932009-05-17 23:12:17 +0000370void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
371void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000372uint8_t noop_chip_readb(const chipaddr addr);
373void noop_chip_writeb(uint8_t val, chipaddr addr);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000374void fallback_chip_writew(uint16_t val, chipaddr addr);
375void fallback_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000376void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000377uint16_t fallback_chip_readw(const chipaddr addr);
378uint32_t fallback_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000379void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfinger702218d2009-05-08 17:43:22 +0000380
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000381/* dummyflasher.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000382#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000383int dummy_init(void);
384int dummy_shutdown(void);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000385void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
386void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000387void dummy_chip_writeb(uint8_t val, chipaddr addr);
388void dummy_chip_writew(uint16_t val, chipaddr addr);
389void dummy_chip_writel(uint32_t val, chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000390void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000391uint8_t dummy_chip_readb(const chipaddr addr);
392uint16_t dummy_chip_readw(const chipaddr addr);
393uint32_t dummy_chip_readl(const chipaddr addr);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000394void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000395int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000396 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000397#endif
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000398
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000399/* nic3com.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000400#if NIC3COM_SUPPORT == 1
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000401int nic3com_init(void);
402int nic3com_shutdown(void);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000403void nic3com_chip_writeb(uint8_t val, chipaddr addr);
404uint8_t nic3com_chip_readb(const chipaddr addr);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000405extern struct pcidev_status nics_3com[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000406#endif
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000407
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000408/* gfxnvidia.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000409#if GFXNVIDIA_SUPPORT == 1
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000410int gfxnvidia_init(void);
411int gfxnvidia_shutdown(void);
412void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
413uint8_t gfxnvidia_chip_readb(const chipaddr addr);
414extern struct pcidev_status gfx_nvidia[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000415#endif
Uwe Hermann2bc98f62009-09-30 18:29:55 +0000416
TURBO Jb0912c02009-09-02 23:00:46 +0000417/* drkaiser.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000418#if DRKAISER_SUPPORT == 1
TURBO Jb0912c02009-09-02 23:00:46 +0000419int drkaiser_init(void);
420int drkaiser_shutdown(void);
421void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
422uint8_t drkaiser_chip_readb(const chipaddr addr);
423extern struct pcidev_status drkaiser_pcidev[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000424#endif
TURBO Jb0912c02009-09-02 23:00:46 +0000425
Rudolf Marek68720c72009-05-17 19:39:27 +0000426/* satasii.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000427#if SATASII_SUPPORT == 1
Rudolf Marek68720c72009-05-17 19:39:27 +0000428int satasii_init(void);
429int satasii_shutdown(void);
Rudolf Marek68720c72009-05-17 19:39:27 +0000430void satasii_chip_writeb(uint8_t val, chipaddr addr);
431uint8_t satasii_chip_readb(const chipaddr addr);
432extern struct pcidev_status satas_sii[];
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000433#endif
Rudolf Marek68720c72009-05-17 19:39:27 +0000434
Paul Fox05dfbe62009-06-16 21:08:06 +0000435/* ft2232_spi.c */
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000436#define FTDI_FT2232H 0x6010
437#define FTDI_FT4232H 0x6011
Paul Fox05dfbe62009-06-16 21:08:06 +0000438int ft2232_spi_init(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000439int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
Paul Fox05dfbe62009-06-16 21:08:06 +0000440int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Paul Fox05dfbe62009-06-16 21:08:06 +0000441int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
442
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000443/* bitbang_spi.c */
Carl-Daniel Hailfinger3a4781e2009-10-01 14:51:25 +0000444extern int bitbang_spi_half_period;
445extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000446int bitbang_spi_init(void);
447int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
448int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
449int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
450
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000451/* buspirate_spi.c */
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000452struct buspirate_spispeeds {
453 const char *name;
454 const int speed;
455};
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000456int buspirate_spi_init(void);
457int buspirate_spi_shutdown(void);
458int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
459int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
460
Uwe Hermann0846f892007-08-23 13:34:59 +0000461/* flashrom.c */
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000462extern enum chipbustype buses_supported;
463struct decode_sizes {
464 uint32_t parallel;
465 uint32_t lpc;
466 uint32_t fwh;
467 uint32_t spi;
468};
469extern struct decode_sizes max_rom_decode;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000470extern char *programmer_param;
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000471extern unsigned long flashbase;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000472extern int verbose;
Carl-Daniel Hailfingera80cfbc2009-07-22 20:13:00 +0000473extern const char *flashrom_version;
Uwe Hermannad216bf2009-04-24 16:17:41 +0000474#define printf_debug(x...) { if (verbose) printf(x); }
Peter Stuge776d2022009-01-26 00:39:57 +0000475void map_flash_registers(struct flashchip *flash);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000476int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000477int erase_flash(struct flashchip *flash);
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +0000478int min(int a, int b);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000479int max(int a, int b);
Carl-Daniel Hailfingerd5b28fa2009-11-24 18:27:10 +0000480char *extract_param(char **haystack, char *needle, char *delim);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000481int check_erased_range(struct flashchip *flash, int start, int len);
482int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
Uwe Hermannba290d12009-06-17 12:07:12 +0000483char *strcat_realloc(char *dest, const char *src);
484
485#define OK 0
486#define NT 1 /* Not tested */
Uwe Hermann0846f892007-08-23 13:34:59 +0000487
488/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000489int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000490int read_romlayout(char *name);
491int find_romentry(char *name);
Carl-Daniel Hailfingerf5fb51c2009-08-19 15:19:18 +0000492int handle_romentries(uint8_t *buffer, struct flashchip *flash);
Uwe Hermann0846f892007-08-23 13:34:59 +0000493
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000494/* spi.c */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000495enum spi_controller {
496 SPI_CONTROLLER_NONE,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000497#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000498 SPI_CONTROLLER_ICH7,
499 SPI_CONTROLLER_ICH9,
500 SPI_CONTROLLER_IT87XX,
501 SPI_CONTROLLER_SB600,
502 SPI_CONTROLLER_VIA,
503 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +0000504#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000505#if FT2232_SPI_SUPPORT == 1
Paul Fox05dfbe62009-06-16 21:08:06 +0000506 SPI_CONTROLLER_FT2232,
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000507#endif
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000508#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000509 SPI_CONTROLLER_DUMMY,
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000510#endif
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000511#if BUSPIRATE_SPI_SUPPORT == 1
512 SPI_CONTROLLER_BUSPIRATE,
513#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000514 SPI_CONTROLLER_INVALID /* This must always be the last entry. */
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000515};
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000516extern const int spi_programmer_count;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000517struct spi_command {
518 unsigned int writecnt;
519 unsigned int readcnt;
520 const unsigned char *writearr;
521 unsigned char *readarr;
522};
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000523struct spi_programmer {
524 int (*command)(unsigned int writecnt, unsigned int readcnt,
525 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000526 int (*multicommand)(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000527
528 /* Optimized functions for this programmer */
529 int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
530 int (*write_256)(struct flashchip *flash, uint8_t *buf);
531};
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000532
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000533extern enum spi_controller spi_controller;
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000534extern const struct spi_programmer spi_programmer[];
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +0000535extern void *spibar;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000536int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000537 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000538int spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000539int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
540 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000541int default_spi_send_multicommand(struct spi_command *cmds);
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000542uint32_t spi_get_valid_read_addr(void);
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000543
Dominik Geyerb46acba2008-05-16 12:55:55 +0000544/* ichspi.c */
Carl-Daniel Hailfinger43634392009-05-01 12:22:17 +0000545int ich_init_opcodes(void);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000546int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000547 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000548int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000549int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000550int ich_spi_send_multicommand(struct spi_command *cmds);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000551
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000552/* it87spi.c */
553extern uint16_t it8716f_flashport;
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +0000554void enter_conf_mode_ite(uint16_t port);
555void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfinger14e100c2009-12-22 23:42:04 +0000556struct superio probe_superio_ite(void);
Carl-Daniel Hailfingerb8afecd2009-05-31 18:00:57 +0000557int it87spi_init(void);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000558int it87xx_probe_spi_flash(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000559int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000560 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000561int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000562int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000563
Jason Wanga3f04be2008-11-28 21:36:51 +0000564/* sb600spi.c */
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000565int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +0000566 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000567int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000568int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000569extern uint8_t *sb600_spibar;
Jason Wanga3f04be2008-11-28 21:36:51 +0000570
Peter Stugebf196e92009-01-26 03:08:45 +0000571/* wbsio_spi.c */
572int wbsio_check_for_spi(const char *name);
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000573int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermannd1129ac2009-05-28 15:07:42 +0000574 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000575int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000576int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000577
Urja Rannikko22915352009-06-23 11:33:43 +0000578/* serprog.c */
Urja Rannikko22915352009-06-23 11:33:43 +0000579int serprog_init(void);
580int serprog_shutdown(void);
581void serprog_chip_writeb(uint8_t val, chipaddr addr);
582uint8_t serprog_chip_readb(const chipaddr addr);
583void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
584void serprog_delay(int delay);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000585
586/* serial.c */
Carl-Daniel Hailfingera4a9bfb2009-11-21 11:02:48 +0000587void sp_flush_incoming(void);
588int sp_openserport(char *dev, unsigned int baud);
Carl-Daniel Hailfingere51ea102009-11-23 19:20:11 +0000589void __attribute__((noreturn)) sp_die(char *msg);
Carl-Daniel Hailfingera4a9bfb2009-11-21 11:02:48 +0000590extern int sp_fd;
Uwe Hermann1432a602009-06-28 23:26:37 +0000591
Carl-Daniel Hailfinger5d5c0722009-12-14 03:32:24 +0000592#include "chipdrivers.h"
593
Ollie Lho761bf1b2004-03-20 16:46:10 +0000594#endif /* !__FLASH_H__ */