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Nico Huber83693c82016-10-08 22:17:55 +02001--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
Nico Huber75a707f2018-06-18 16:28:33 +020015with HW.GFX.GMA.Config;
Nico Huber9e96a452019-09-22 20:25:17 +020016with HW.GFX.GMA.Config_Helpers;
Nico Huber83693c82016-10-08 22:17:55 +020017with HW.GFX.GMA.Registers;
18
Nico Huber47ff0692016-11-04 14:29:39 +010019
Nico Huber83693c82016-10-08 22:17:55 +020020private package HW.GFX.GMA.Pipe_Setup
21is
22
Nico Huber83693c82016-10-08 22:17:55 +020023 procedure On
Nico Huberf3e23662016-12-05 21:33:03 +010024 (Pipe : Pipe_Index;
Nico Huber4d592b42026-06-23 12:21:37 +000025 Pipe_Cfg : Pipe_Config;
26 Port_Cfg : Port_Config)
Nico Huber47ff0692016-11-04 14:29:39 +010027 with
Nico Huber4d592b42026-06-23 12:21:37 +000028 Pre => Config_Helpers.Valid_FB (Pipe_Cfg.Framebuffer, Port_Cfg.Mode);
Nico Huber83693c82016-10-08 22:17:55 +020029
Nico Huber7ad2d652016-12-07 15:19:32 +010030 procedure Off (Pipe : Pipe_Index);
Nico Huber83693c82016-10-08 22:17:55 +020031
Nico Huber33912aa2016-12-06 20:36:23 +010032 procedure Legacy_VGA_Off;
33
Nico Huber83693c82016-10-08 22:17:55 +020034 procedure All_Off;
35
Nico Huber4d592b42026-06-23 12:21:37 +000036 -- TODO: Passing `Pipe_Cfg` and `Mode` seems redundant. However,
37 -- the `Pipe_Cfg.Mode` is what the user requested and we
38 -- may have altered that in `Mode`. This should be refac-
39 -- tored to always have a single, synchronized `Mode`.
Nico Huberf7f537e2018-01-02 14:15:43 +010040 procedure Setup_FB
41 (Pipe : Pipe_Index;
Nico Huber4d592b42026-06-23 12:21:37 +000042 Pipe_Cfg : Pipe_Config;
43 Mode : Mode_Type)
Nico Huberf7f537e2018-01-02 14:15:43 +010044 with
Nico Huber4d592b42026-06-23 12:21:37 +000045 Pre => Config_Helpers.Valid_FB (Pipe_Cfg.Framebuffer, Mode);
Nico Huber83693c82016-10-08 22:17:55 +020046
Nico Huber4dc4c612018-01-10 15:55:09 +010047 procedure Update_Cursor
48 (Pipe : Pipe_Index;
49 FB : Framebuffer_Type;
50 Cursor : Cursor_Type);
51 procedure Place_Cursor
52 (Pipe : Pipe_Index;
53 FB : Framebuffer_Type;
54 Cursor : Cursor_Type);
55
Nico Huber9a4c4c32019-09-16 22:05:11 +020056 type Scaler_Reservation is private;
57 Null_Scaler_Reservation : constant Scaler_Reservation;
58 procedure Reserve_Scaler
59 (Success : out Boolean;
60 Reservation : in out Scaler_Reservation;
61 Pipe : in Pipe_Index);
Nico Huberf361ec82018-06-02 18:01:45 +020062
Nico Huber83693c82016-10-08 22:17:55 +020063private
64
Nico Huber9a4c4c32019-09-16 22:05:11 +020065 type Scaler_Reservation is record
66 Reserved : Boolean;
67 Pipe : Pipe_Index;
68 end record;
69 Null_Scaler_Reservation : constant Scaler_Reservation :=
70 (Reserved => False, Pipe => Pipe_Index'First);
71
Nico Huber83693c82016-10-08 22:17:55 +020072 subtype WM_Levels is Natural range 0 .. 7;
73 type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index;
74
75 type Controller_Type is
76 record
Nico Huberf3e23662016-12-05 21:33:03 +010077 Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +020078 PIPESRC : Registers.Registers_Index;
79 PIPEMISC : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +010080 PF_CTRL : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020081 PF_WIN_POS : Registers.Registers_Index;
82 PF_WIN_SZ : Registers.Registers_Index;
83 DSPCNTR : Registers.Registers_Index;
84 DSPLINOFF : Registers.Registers_Index;
85 DSPSTRIDE : Registers.Registers_Index;
86 DSPSURF : Registers.Registers_Index;
87 DSPTILEOFF : Registers.Registers_Index;
Arthur Heymans960e2392026-03-03 19:45:24 +010088 DSPSIZE : Registers.Registers_Index;
89 DSPPOS : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020090 SPCNTR : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020091 -- Skylake registers (partially aliased)
92 PLANE_CTL : Registers.Registers_Index;
93 PLANE_OFFSET : Registers.Registers_Index;
94 PLANE_POS : Registers.Registers_Index;
95 PLANE_SIZE : Registers.Registers_Index;
96 PLANE_STRIDE : Registers.Registers_Index;
97 PLANE_SURF : Registers.Registers_Index;
98 PS_CTRL_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +010099 PS_WIN_POS_1 : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200100 PS_WIN_SZ_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +0100101 PS_CTRL_2 : Registers.Registers_Invalid_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200102 PS_WIN_SZ_2 : Registers.Registers_Invalid_Index;
103 WM_LINETIME : Registers.Registers_Index;
104 PLANE_BUF_CFG : Registers.Registers_Index;
105 PLANE_WM : PLANE_WM_Type;
Nico Huber4dc4c612018-01-10 15:55:09 +0100106 CUR_BUF_CFG : Registers.Registers_Index;
107 CUR_WM : PLANE_WM_Type;
Tim Wawrzynczak0da761a2022-09-09 10:42:36 -0600108 MBUS_DBOX_CTL : Registers.Registers_Index;
109 PIPE_CHICKEN : Registers.Registers_Index;
110 PLANE_COLOR_CTL : Registers.Registers_Index;
111 PLANE_AUX_DIST : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200112 end record;
113
Nico Huberf3e23662016-12-05 21:33:03 +0100114 type Controller_Array is array (Pipe_Index) of Controller_Type;
115
Arthur Heymans960e2392026-03-03 19:45:24 +0100116 -- On Gen3 (i945), FBC only works with Plane A, but LVDS and the
117 -- panel fitter are hooked to Pipe B. Hence we want Plane A feeding
118 -- Pipe B, which means swapping the plane register assignments:
119 -- Primary (Pipe A) gets Plane B, Secondary (Pipe B) gets Plane A.
120
Nico Huberf3e23662016-12-05 21:33:03 +0100121 Controllers : constant Controller_Array :=
122 (Primary => Controller_Type'
123 (Pipe => Primary,
Nico Huber83693c82016-10-08 22:17:55 +0200124 PIPESRC => Registers.PIPEASRC,
125 PIPEMISC => Registers.PIPEAMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100126 PF_CTRL => Registers.PFA_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200127 PF_WIN_POS => Registers.PFA_WIN_POS,
128 PF_WIN_SZ => Registers.PFA_WIN_SZ,
Arthur Heymans960e2392026-03-03 19:45:24 +0100129 DSPCNTR =>
130 (if Config.Planes_Pipes_Swapped
131 then Registers.DSPBCNTR else Registers.DSPACNTR),
132 DSPLINOFF =>
133 (if Config.Planes_Pipes_Swapped
134 then Registers.DSPBLINOFF else Registers.DSPALINOFF),
135 DSPSTRIDE =>
136 (if Config.Planes_Pipes_Swapped
137 then Registers.DSPBSTRIDE else Registers.DSPASTRIDE),
138 DSPSURF =>
139 (if Config.Planes_Pipes_Swapped
140 then Registers.DSPBSURF else Registers.DSPASURF),
141 DSPTILEOFF =>
142 (if Config.Planes_Pipes_Swapped
143 then Registers.DSPBTILEOFF else Registers.DSPATILEOFF),
144 DSPSIZE =>
145 (if Config.Planes_Pipes_Swapped
146 then Registers.PLANE_SIZE_1_B else Registers.PLANE_SIZE_1_A),
147 DSPPOS =>
148 (if Config.Planes_Pipes_Swapped
149 then Registers.PLANE_POS_1_B else Registers.PLANE_POS_1_A),
Nico Huber83693c82016-10-08 22:17:55 +0200150 SPCNTR => Registers.SPACNTR,
Nico Huber83693c82016-10-08 22:17:55 +0200151 PLANE_CTL => Registers.DSPACNTR,
152 PLANE_OFFSET => Registers.DSPATILEOFF,
153 PLANE_POS => Registers.PLANE_POS_1_A,
154 PLANE_SIZE => Registers.PLANE_SIZE_1_A,
155 PLANE_STRIDE => Registers.DSPASTRIDE,
156 PLANE_SURF => Registers.DSPASURF,
157 PS_CTRL_1 => Registers.PS_CTRL_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100158 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_A,
Nico Huber83693c82016-10-08 22:17:55 +0200159 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100160 PS_CTRL_2 => Registers.PS_CTRL_2_A,
Nico Huber83693c82016-10-08 22:17:55 +0200161 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A,
162 WM_LINETIME => Registers.WM_LINETIME_A,
163 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A,
164 PLANE_WM => PLANE_WM_Type'(
165 Registers.PLANE_WM_1_A_0,
166 Registers.PLANE_WM_1_A_1,
167 Registers.PLANE_WM_1_A_2,
168 Registers.PLANE_WM_1_A_3,
169 Registers.PLANE_WM_1_A_4,
170 Registers.PLANE_WM_1_A_5,
171 Registers.PLANE_WM_1_A_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100172 Registers.PLANE_WM_1_A_7),
173 CUR_BUF_CFG => Registers.CUR_BUF_CFG_A,
174 CUR_WM => PLANE_WM_Type'(
175 Registers.CUR_WM_A_0,
176 Registers.CUR_WM_A_1,
177 Registers.CUR_WM_A_2,
178 Registers.CUR_WM_A_3,
179 Registers.CUR_WM_A_4,
180 Registers.CUR_WM_A_5,
181 Registers.CUR_WM_A_6,
Tim Wawrzynczak0da761a2022-09-09 10:42:36 -0600182 Registers.CUR_WM_A_7),
183 MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_A,
184 PIPE_CHICKEN => Registers.PIPEA_CHICKEN,
185 PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_A,
186 PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_A),
Nico Huberf3e23662016-12-05 21:33:03 +0100187 Secondary => Controller_Type'
188 (Pipe => Secondary,
Nico Huber83693c82016-10-08 22:17:55 +0200189 PIPESRC => Registers.PIPEBSRC,
190 PIPEMISC => Registers.PIPEBMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100191 PF_CTRL => Registers.PFB_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200192 PF_WIN_POS => Registers.PFB_WIN_POS,
193 PF_WIN_SZ => Registers.PFB_WIN_SZ,
Arthur Heymans960e2392026-03-03 19:45:24 +0100194 DSPCNTR =>
195 (if Config.Planes_Pipes_Swapped
196 then Registers.DSPACNTR else Registers.DSPBCNTR),
197 DSPLINOFF =>
198 (if Config.Planes_Pipes_Swapped
199 then Registers.DSPALINOFF else Registers.DSPBLINOFF),
200 DSPSTRIDE =>
201 (if Config.Planes_Pipes_Swapped
202 then Registers.DSPASTRIDE else Registers.DSPBSTRIDE),
203 DSPSURF =>
204 (if Config.Planes_Pipes_Swapped
205 then Registers.DSPASURF else Registers.DSPBSURF),
206 DSPTILEOFF =>
207 (if Config.Planes_Pipes_Swapped
208 then Registers.DSPATILEOFF else Registers.DSPBTILEOFF),
209 DSPSIZE =>
210 (if Config.Planes_Pipes_Swapped
211 then Registers.PLANE_SIZE_1_A else Registers.PLANE_SIZE_1_B),
212 DSPPOS =>
213 (if Config.Planes_Pipes_Swapped
214 then Registers.PLANE_POS_1_A else Registers.PLANE_POS_1_B),
Nico Huber83693c82016-10-08 22:17:55 +0200215 SPCNTR => Registers.SPBCNTR,
Nico Huber83693c82016-10-08 22:17:55 +0200216 PLANE_CTL => Registers.DSPBCNTR,
217 PLANE_OFFSET => Registers.DSPBTILEOFF,
218 PLANE_POS => Registers.PLANE_POS_1_B,
219 PLANE_SIZE => Registers.PLANE_SIZE_1_B,
220 PLANE_STRIDE => Registers.DSPBSTRIDE,
221 PLANE_SURF => Registers.DSPBSURF,
222 PS_CTRL_1 => Registers.PS_CTRL_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100223 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_B,
Nico Huber83693c82016-10-08 22:17:55 +0200224 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100225 PS_CTRL_2 => Registers.PS_CTRL_2_B,
Nico Huber83693c82016-10-08 22:17:55 +0200226 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B,
227 WM_LINETIME => Registers.WM_LINETIME_B,
228 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B,
229 PLANE_WM => PLANE_WM_Type'(
230 Registers.PLANE_WM_1_B_0,
231 Registers.PLANE_WM_1_B_1,
232 Registers.PLANE_WM_1_B_2,
233 Registers.PLANE_WM_1_B_3,
234 Registers.PLANE_WM_1_B_4,
235 Registers.PLANE_WM_1_B_5,
236 Registers.PLANE_WM_1_B_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100237 Registers.PLANE_WM_1_B_7),
238 CUR_BUF_CFG => Registers.CUR_BUF_CFG_B,
239 CUR_WM => PLANE_WM_Type'(
240 Registers.CUR_WM_B_0,
241 Registers.CUR_WM_B_1,
242 Registers.CUR_WM_B_2,
243 Registers.CUR_WM_B_3,
244 Registers.CUR_WM_B_4,
245 Registers.CUR_WM_B_5,
246 Registers.CUR_WM_B_6,
Tim Wawrzynczak0da761a2022-09-09 10:42:36 -0600247 Registers.CUR_WM_B_7),
248 MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_B,
249 PIPE_CHICKEN => Registers.PIPEB_CHICKEN,
250 PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_B,
251 PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_B),
Nico Huberf3e23662016-12-05 21:33:03 +0100252 Tertiary => Controller_Type'
253 (Pipe => Tertiary,
Nico Huber83693c82016-10-08 22:17:55 +0200254 PIPESRC => Registers.PIPECSRC,
255 PIPEMISC => Registers.PIPECMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100256 PF_CTRL => Registers.PFC_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200257 PF_WIN_POS => Registers.PFC_WIN_POS,
258 PF_WIN_SZ => Registers.PFC_WIN_SZ,
259 DSPCNTR => Registers.DSPCCNTR,
260 DSPLINOFF => Registers.DSPCLINOFF,
261 DSPSTRIDE => Registers.DSPCSTRIDE,
262 DSPSURF => Registers.DSPCSURF,
263 DSPTILEOFF => Registers.DSPCTILEOFF,
Arthur Heymans960e2392026-03-03 19:45:24 +0100264 DSPSIZE => Registers.PLANE_SIZE_1_C,
265 DSPPOS => Registers.PLANE_POS_1_C,
Nico Huber83693c82016-10-08 22:17:55 +0200266 SPCNTR => Registers.SPCCNTR,
Nico Huber83693c82016-10-08 22:17:55 +0200267 PLANE_CTL => Registers.DSPCCNTR,
268 PLANE_OFFSET => Registers.DSPCTILEOFF,
269 PLANE_POS => Registers.PLANE_POS_1_C,
270 PLANE_SIZE => Registers.PLANE_SIZE_1_C,
271 PLANE_STRIDE => Registers.DSPCSTRIDE,
272 PLANE_SURF => Registers.DSPCSURF,
273 PS_CTRL_1 => Registers.PS_CTRL_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100274 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_C,
Nico Huber83693c82016-10-08 22:17:55 +0200275 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100276 PS_CTRL_2 => Registers.Invalid_Register,
Nico Huber83693c82016-10-08 22:17:55 +0200277 PS_WIN_SZ_2 => Registers.Invalid_Register,
278 WM_LINETIME => Registers.WM_LINETIME_C,
279 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C,
280 PLANE_WM => PLANE_WM_Type'(
281 Registers.PLANE_WM_1_C_0,
282 Registers.PLANE_WM_1_C_1,
283 Registers.PLANE_WM_1_C_2,
284 Registers.PLANE_WM_1_C_3,
285 Registers.PLANE_WM_1_C_4,
286 Registers.PLANE_WM_1_C_5,
287 Registers.PLANE_WM_1_C_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100288 Registers.PLANE_WM_1_C_7),
289 CUR_BUF_CFG => Registers.CUR_BUF_CFG_C,
290 CUR_WM => PLANE_WM_Type'(
291 Registers.CUR_WM_C_0,
292 Registers.CUR_WM_C_1,
293 Registers.CUR_WM_C_2,
294 Registers.CUR_WM_C_3,
295 Registers.CUR_WM_C_4,
296 Registers.CUR_WM_C_5,
297 Registers.CUR_WM_C_6,
Tim Wawrzynczak0da761a2022-09-09 10:42:36 -0600298 Registers.CUR_WM_C_7),
299 MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_C,
300 PIPE_CHICKEN => Registers.PIPEC_CHICKEN,
301 PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_C,
302 PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_C));
Nico Huber83693c82016-10-08 22:17:55 +0200303
Nico Huber75a707f2018-06-18 16:28:33 +0200304 type Cursor_Regs is record
305 CTL : Registers.Registers_Index;
306 BASE : Registers.Registers_Index;
307 POS : Registers.Registers_Index;
308 FBC_CTL : Registers.Registers_Invalid_Index;
309 end record;
310
311 function Cursors (Pipe : Pipe_Index) return Cursor_Regs is
312 (if not Config.Has_Ivybridge_Cursors then
313 (if Pipe = Primary then
314 (CTL => Registers.CURACNTR,
315 BASE => Registers.CURABASE,
316 POS => Registers.CURAPOS,
317 FBC_CTL => Registers.Invalid_Register)
318 else
319 (CTL => Registers.CURBCNTR,
320 BASE => Registers.CURBBASE,
321 POS => Registers.CURBPOS,
322 FBC_CTL => Registers.Invalid_Register))
323 else
324 (if Pipe = Primary then
325 (CTL => Registers.CUR_CTL_A,
326 BASE => Registers.CUR_BASE_A,
327 POS => Registers.CUR_POS_A,
328 FBC_CTL => Registers.CUR_FBC_CTL_A)
329 elsif Pipe = Secondary then
330 (CTL => Registers.CUR_CTL_B,
331 BASE => Registers.CUR_BASE_B,
332 POS => Registers.CUR_POS_B,
333 FBC_CTL => Registers.CUR_FBC_CTL_B)
334 else
335 (CTL => Registers.CUR_CTL_C,
336 BASE => Registers.CUR_BASE_C,
337 POS => Registers.CUR_POS_C,
338 FBC_CTL => Registers.CUR_FBC_CTL_C)));
339
Nico Huber83693c82016-10-08 22:17:55 +0200340end HW.GFX.GMA.Pipe_Setup;