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review.sourcearcade.org / libgfxinit / 47ff06982e952af1e81693dc464198ed186ed6ae / . / common / hw-gfx-gma-pipe_setup.ads
blob: b696934c0efb2f23c65361cadfdd60f865e159b6 [file] [log] [blame]
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]1--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +0200[diff] [blame]6-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]8--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.GFX.GMA.Registers;
16
Nico Huber47ff0692016-11-04 14:29:39 +0100[diff] [blame^]17use type HW.Int32;
18
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]19private package HW.GFX.GMA.Pipe_Setup
20is
21
22 type Controller_Kind is (A, B, C);
23 type Controller_Type is private;
24 type Controller_Array is array (Controller_Kind) of Controller_Type;
25
26 type Pipe_Head is (Head_EDP, Head_A, Head_B, Head_C);
27 type Head_Type is private;
28 type Head_Array is array (Pipe_Head) of Head_Type;
29
30 procedure On
31 (Controller : Controller_Type;
32 Head : Head_Type;
33 Port_Cfg : Port_Config;
Nico Huber47ff0692016-11-04 14:29:39 +0100[diff] [blame^]34 Framebuffer : Framebuffer_Type)
35 with
36 Pre =>
37 Framebuffer.Width <= Pos32 (Port_Cfg.Mode.H_Visible) and
38 Framebuffer.Height <= Pos32 (Port_Cfg.Mode.V_Visible);
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]39
40 procedure Off
41 (Controller : Controller_Type;
42 Head : Head_Type);
43
44 procedure All_Off;
45
46 function Get_Pipe_Hint (Head : Head_Type) return Word32;
47
48 procedure Update_Offset
49 (Controller : Controller_Type;
50 Framebuffer : HW.GFX.Framebuffer_Type);
51
52 Controllers : constant Controller_Array;
53
54 Heads : constant Head_Array;
55
56 function Default_Pipe_Head (Kind : Controller_Kind) return Head_Type;
57
58private
59
60 subtype WM_Levels is Natural range 0 .. 7;
61 type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index;
62
63 type Controller_Type is
64 record
65 Kind : Controller_Kind;
66 PIPESRC : Registers.Registers_Index;
67 PIPEMISC : Registers.Registers_Index;
68 PF_CTL_1 : Registers.Registers_Index;
69 PF_WIN_POS : Registers.Registers_Index;
70 PF_WIN_SZ : Registers.Registers_Index;
71 DSPCNTR : Registers.Registers_Index;
72 DSPLINOFF : Registers.Registers_Index;
73 DSPSTRIDE : Registers.Registers_Index;
74 DSPSURF : Registers.Registers_Index;
75 DSPTILEOFF : Registers.Registers_Index;
76 SPCNTR : Registers.Registers_Index;
77 TRANS_CLK_SEL : Registers.Registers_Index;
78 -- Skylake registers (partially aliased)
79 PLANE_CTL : Registers.Registers_Index;
80 PLANE_OFFSET : Registers.Registers_Index;
81 PLANE_POS : Registers.Registers_Index;
82 PLANE_SIZE : Registers.Registers_Index;
83 PLANE_STRIDE : Registers.Registers_Index;
84 PLANE_SURF : Registers.Registers_Index;
85 PS_CTRL_1 : Registers.Registers_Index;
86 PS_CTRL_2 : Registers.Registers_Invalid_Index;
87 PS_WIN_SZ_1 : Registers.Registers_Index;
88 PS_WIN_SZ_2 : Registers.Registers_Invalid_Index;
89 WM_LINETIME : Registers.Registers_Index;
90 PLANE_BUF_CFG : Registers.Registers_Index;
91 PLANE_WM : PLANE_WM_Type;
92 end record;
93
94 type Head_Type is
95 record
96 Head : Pipe_Head;
97 HTOTAL : Registers.Registers_Index;
98 HBLANK : Registers.Registers_Index;
99 HSYNC : Registers.Registers_Index;
100 VTOTAL : Registers.Registers_Index;
101 VBLANK : Registers.Registers_Index;
102 VSYNC : Registers.Registers_Index;
103 PIPECONF : Registers.Registers_Index;
104 PIPE_DATA_M1 : Registers.Registers_Index;
105 PIPE_DATA_N1 : Registers.Registers_Index;
106 PIPE_LINK_M1 : Registers.Registers_Index;
107 PIPE_LINK_N1 : Registers.Registers_Index;
108 PIPE_DDI_FUNC_CTL : Registers.Registers_Index;
109 PIPE_MSA_MISC : Registers.Registers_Index;
110 end record;
111
112 Controllers : constant Controller_Array := Controller_Array'
113 (A => Controller_Type'
114 (Kind => A,
115 PIPESRC => Registers.PIPEASRC,
116 PIPEMISC => Registers.PIPEAMISC,
117 PF_CTL_1 => Registers.PFA_CTL_1,
118 PF_WIN_POS => Registers.PFA_WIN_POS,
119 PF_WIN_SZ => Registers.PFA_WIN_SZ,
120 DSPCNTR => Registers.DSPACNTR,
121 DSPLINOFF => Registers.DSPALINOFF,
122 DSPSTRIDE => Registers.DSPASTRIDE,
123 DSPSURF => Registers.DSPASURF,
124 DSPTILEOFF => Registers.DSPATILEOFF,
125 SPCNTR => Registers.SPACNTR,
126 TRANS_CLK_SEL => Registers.TRANSA_CLK_SEL,
127 PLANE_CTL => Registers.DSPACNTR,
128 PLANE_OFFSET => Registers.DSPATILEOFF,
129 PLANE_POS => Registers.PLANE_POS_1_A,
130 PLANE_SIZE => Registers.PLANE_SIZE_1_A,
131 PLANE_STRIDE => Registers.DSPASTRIDE,
132 PLANE_SURF => Registers.DSPASURF,
133 PS_CTRL_1 => Registers.PS_CTRL_1_A,
134 PS_CTRL_2 => Registers.PS_CTRL_2_A,
135 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A,
136 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A,
137 WM_LINETIME => Registers.WM_LINETIME_A,
138 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A,
139 PLANE_WM => PLANE_WM_Type'(
140 Registers.PLANE_WM_1_A_0,
141 Registers.PLANE_WM_1_A_1,
142 Registers.PLANE_WM_1_A_2,
143 Registers.PLANE_WM_1_A_3,
144 Registers.PLANE_WM_1_A_4,
145 Registers.PLANE_WM_1_A_5,
146 Registers.PLANE_WM_1_A_6,
147 Registers.PLANE_WM_1_A_7)),
148 B => Controller_Type'
149 (Kind => B,
150 PIPESRC => Registers.PIPEBSRC,
151 PIPEMISC => Registers.PIPEBMISC,
152 PF_CTL_1 => Registers.PFB_CTL_1,
153 PF_WIN_POS => Registers.PFB_WIN_POS,
154 PF_WIN_SZ => Registers.PFB_WIN_SZ,
155 DSPCNTR => Registers.DSPBCNTR,
156 DSPLINOFF => Registers.DSPBLINOFF,
157 DSPSTRIDE => Registers.DSPBSTRIDE,
158 DSPSURF => Registers.DSPBSURF,
159 DSPTILEOFF => Registers.DSPBTILEOFF,
160 SPCNTR => Registers.SPBCNTR,
161 TRANS_CLK_SEL => Registers.TRANSB_CLK_SEL,
162 PLANE_CTL => Registers.DSPBCNTR,
163 PLANE_OFFSET => Registers.DSPBTILEOFF,
164 PLANE_POS => Registers.PLANE_POS_1_B,
165 PLANE_SIZE => Registers.PLANE_SIZE_1_B,
166 PLANE_STRIDE => Registers.DSPBSTRIDE,
167 PLANE_SURF => Registers.DSPBSURF,
168 PS_CTRL_1 => Registers.PS_CTRL_1_B,
169 PS_CTRL_2 => Registers.PS_CTRL_2_B,
170 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B,
171 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B,
172 WM_LINETIME => Registers.WM_LINETIME_B,
173 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B,
174 PLANE_WM => PLANE_WM_Type'(
175 Registers.PLANE_WM_1_B_0,
176 Registers.PLANE_WM_1_B_1,
177 Registers.PLANE_WM_1_B_2,
178 Registers.PLANE_WM_1_B_3,
179 Registers.PLANE_WM_1_B_4,
180 Registers.PLANE_WM_1_B_5,
181 Registers.PLANE_WM_1_B_6,
182 Registers.PLANE_WM_1_B_7)),
183 C => Controller_Type'
184 (Kind => C,
185 PIPESRC => Registers.PIPECSRC,
186 PIPEMISC => Registers.PIPECMISC,
187 PF_CTL_1 => Registers.PFC_CTL_1,
188 PF_WIN_POS => Registers.PFC_WIN_POS,
189 PF_WIN_SZ => Registers.PFC_WIN_SZ,
190 DSPCNTR => Registers.DSPCCNTR,
191 DSPLINOFF => Registers.DSPCLINOFF,
192 DSPSTRIDE => Registers.DSPCSTRIDE,
193 DSPSURF => Registers.DSPCSURF,
194 DSPTILEOFF => Registers.DSPCTILEOFF,
195 SPCNTR => Registers.SPCCNTR,
196 TRANS_CLK_SEL => Registers.TRANSC_CLK_SEL,
197 PLANE_CTL => Registers.DSPCCNTR,
198 PLANE_OFFSET => Registers.DSPCTILEOFF,
199 PLANE_POS => Registers.PLANE_POS_1_C,
200 PLANE_SIZE => Registers.PLANE_SIZE_1_C,
201 PLANE_STRIDE => Registers.DSPCSTRIDE,
202 PLANE_SURF => Registers.DSPCSURF,
203 PS_CTRL_1 => Registers.PS_CTRL_1_C,
204 PS_CTRL_2 => Registers.Invalid_Register,
205 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C,
206 PS_WIN_SZ_2 => Registers.Invalid_Register,
207 WM_LINETIME => Registers.WM_LINETIME_C,
208 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C,
209 PLANE_WM => PLANE_WM_Type'(
210 Registers.PLANE_WM_1_C_0,
211 Registers.PLANE_WM_1_C_1,
212 Registers.PLANE_WM_1_C_2,
213 Registers.PLANE_WM_1_C_3,
214 Registers.PLANE_WM_1_C_4,
215 Registers.PLANE_WM_1_C_5,
216 Registers.PLANE_WM_1_C_6,
217 Registers.PLANE_WM_1_C_7)));
218
219 Heads : constant Head_Array := Head_Array'
220 (Head_EDP => Head_Type'
221 (Head => Head_EDP,
222 HTOTAL => Registers.HTOTAL_EDP,
223 HBLANK => Registers.HBLANK_EDP,
224 HSYNC => Registers.HSYNC_EDP,
225 VTOTAL => Registers.VTOTAL_EDP,
226 VBLANK => Registers.VBLANK_EDP,
227 VSYNC => Registers.VSYNC_EDP,
228 PIPECONF => Registers.PIPE_EDP_CONF,
229 PIPE_DATA_M1 => Registers.PIPE_EDP_DATA_M1,
230 PIPE_DATA_N1 => Registers.PIPE_EDP_DATA_N1,
231 PIPE_LINK_M1 => Registers.PIPE_EDP_LINK_M1,
232 PIPE_LINK_N1 => Registers.PIPE_EDP_LINK_N1,
233 PIPE_DDI_FUNC_CTL => Registers.PIPE_EDP_DDI_FUNC_CTL,
234 PIPE_MSA_MISC => Registers.PIPE_EDP_MSA_MISC),
235 Head_A => Head_Type'
236 (Head => Head_A,
237 HTOTAL => Registers.HTOTAL_A,
238 HBLANK => Registers.HBLANK_A,
239 HSYNC => Registers.HSYNC_A,
240 VTOTAL => Registers.VTOTAL_A,
241 VBLANK => Registers.VBLANK_A,
242 VSYNC => Registers.VSYNC_A,
243 PIPECONF => Registers.PIPEACONF,
244 PIPE_DATA_M1 => Registers.PIPEA_DATA_M1,
245 PIPE_DATA_N1 => Registers.PIPEA_DATA_N1,
246 PIPE_LINK_M1 => Registers.PIPEA_LINK_M1,
247 PIPE_LINK_N1 => Registers.PIPEA_LINK_N1,
248 PIPE_DDI_FUNC_CTL => Registers.PIPEA_DDI_FUNC_CTL,
249 PIPE_MSA_MISC => Registers.PIPEA_MSA_MISC),
250 Head_B => Head_Type'
251 (Head => Head_B,
252 HTOTAL => Registers.HTOTAL_B,
253 HBLANK => Registers.HBLANK_B,
254 HSYNC => Registers.HSYNC_B,
255 VTOTAL => Registers.VTOTAL_B,
256 VBLANK => Registers.VBLANK_B,
257 VSYNC => Registers.VSYNC_B,
258 PIPECONF => Registers.PIPEBCONF,
259 PIPE_DATA_M1 => Registers.PIPEB_DATA_M1,
260 PIPE_DATA_N1 => Registers.PIPEB_DATA_N1,
261 PIPE_LINK_M1 => Registers.PIPEB_LINK_M1,
262 PIPE_LINK_N1 => Registers.PIPEB_LINK_N1,
263 PIPE_DDI_FUNC_CTL => Registers.PIPEB_DDI_FUNC_CTL,
264 PIPE_MSA_MISC => Registers.PIPEB_MSA_MISC),
265 Head_C => Head_Type'
266 (Head => Head_C,
267 HTOTAL => Registers.HTOTAL_C,
268 HBLANK => Registers.HBLANK_C,
269 HSYNC => Registers.HSYNC_C,
270 VTOTAL => Registers.VTOTAL_C,
271 VBLANK => Registers.VBLANK_C,
272 VSYNC => Registers.VSYNC_C,
273 PIPECONF => Registers.PIPECCONF,
274 PIPE_DATA_M1 => Registers.PIPEC_DATA_M1,
275 PIPE_DATA_N1 => Registers.PIPEC_DATA_N1,
276 PIPE_LINK_M1 => Registers.PIPEC_LINK_M1,
277 PIPE_LINK_N1 => Registers.PIPEC_LINK_N1,
278 PIPE_DDI_FUNC_CTL => Registers.PIPEC_DDI_FUNC_CTL,
279 PIPE_MSA_MISC => Registers.PIPEC_MSA_MISC));
280
281end HW.GFX.GMA.Pipe_Setup;