| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 1 | -- |
| 2 | -- Copyright (C) 2015-2016 secunet Security Networks AG |
| 3 | -- |
| 4 | -- This program is free software; you can redistribute it and/or modify |
| 5 | -- it under the terms of the GNU General Public License as published by |
| Nico Huber | 125a29e | 2016-10-18 00:23:54 +0200 | [diff] [blame] | 6 | -- the Free Software Foundation; either version 2 of the License, or |
| 7 | -- (at your option) any later version. |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 8 | -- |
| 9 | -- This program is distributed in the hope that it will be useful, |
| 10 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | -- GNU General Public License for more details. |
| 13 | -- |
| 14 | |
| Nico Huber | 75a707f | 2018-06-18 16:28:33 +0200 | [diff] [blame] | 15 | with HW.GFX.GMA.Config; |
| Nico Huber | 9e96a45 | 2019-09-22 20:25:17 +0200 | [diff] [blame] | 16 | with HW.GFX.GMA.Config_Helpers; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 17 | with HW.GFX.GMA.Registers; |
| 18 | |
| Nico Huber | 47ff069 | 2016-11-04 14:29:39 +0100 | [diff] [blame] | 19 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 20 | private package HW.GFX.GMA.Pipe_Setup |
| 21 | is |
| 22 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 23 | procedure On |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 24 | (Pipe : Pipe_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 25 | Port_Cfg : Port_Config; |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 26 | Framebuffer : Framebuffer_Type; |
| 27 | Cursor : Cursor_Type) |
| Nico Huber | 47ff069 | 2016-11-04 14:29:39 +0100 | [diff] [blame] | 28 | with |
| Nico Huber | 9e96a45 | 2019-09-22 20:25:17 +0200 | [diff] [blame] | 29 | Pre => Config_Helpers.Valid_FB (Framebuffer, Port_Cfg.Mode); |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 30 | |
| Nico Huber | 7ad2d65 | 2016-12-07 15:19:32 +0100 | [diff] [blame] | 31 | procedure Off (Pipe : Pipe_Index); |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 32 | |
| Nico Huber | 33912aa | 2016-12-06 20:36:23 +0100 | [diff] [blame] | 33 | procedure Legacy_VGA_Off; |
| 34 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 35 | procedure All_Off; |
| 36 | |
| Nico Huber | f7f537e | 2018-01-02 14:15:43 +0100 | [diff] [blame] | 37 | procedure Setup_FB |
| 38 | (Pipe : Pipe_Index; |
| 39 | Mode : Mode_Type; |
| 40 | Framebuffer : Framebuffer_Type) |
| 41 | with |
| Nico Huber | 9e96a45 | 2019-09-22 20:25:17 +0200 | [diff] [blame] | 42 | Pre => Config_Helpers.Valid_FB (Framebuffer, Mode); |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 43 | |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 44 | procedure Update_Cursor |
| 45 | (Pipe : Pipe_Index; |
| 46 | FB : Framebuffer_Type; |
| 47 | Cursor : Cursor_Type); |
| 48 | procedure Place_Cursor |
| 49 | (Pipe : Pipe_Index; |
| 50 | FB : Framebuffer_Type; |
| 51 | Cursor : Cursor_Type); |
| 52 | |
| Nico Huber | 9a4c4c3 | 2019-09-16 22:05:11 +0200 | [diff] [blame] | 53 | type Scaler_Reservation is private; |
| 54 | Null_Scaler_Reservation : constant Scaler_Reservation; |
| 55 | procedure Reserve_Scaler |
| 56 | (Success : out Boolean; |
| 57 | Reservation : in out Scaler_Reservation; |
| 58 | Pipe : in Pipe_Index); |
| Nico Huber | f361ec8 | 2018-06-02 18:01:45 +0200 | [diff] [blame] | 59 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 60 | private |
| 61 | |
| Nico Huber | 9a4c4c3 | 2019-09-16 22:05:11 +0200 | [diff] [blame] | 62 | type Scaler_Reservation is record |
| 63 | Reserved : Boolean; |
| 64 | Pipe : Pipe_Index; |
| 65 | end record; |
| 66 | Null_Scaler_Reservation : constant Scaler_Reservation := |
| 67 | (Reserved => False, Pipe => Pipe_Index'First); |
| 68 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 69 | subtype WM_Levels is Natural range 0 .. 7; |
| 70 | type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index; |
| 71 | |
| 72 | type Controller_Type is |
| 73 | record |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 74 | Pipe : Pipe_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 75 | PIPESRC : Registers.Registers_Index; |
| 76 | PIPEMISC : Registers.Registers_Index; |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 77 | PF_CTRL : Registers.Registers_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 78 | PF_WIN_POS : Registers.Registers_Index; |
| 79 | PF_WIN_SZ : Registers.Registers_Index; |
| 80 | DSPCNTR : Registers.Registers_Index; |
| 81 | DSPLINOFF : Registers.Registers_Index; |
| 82 | DSPSTRIDE : Registers.Registers_Index; |
| 83 | DSPSURF : Registers.Registers_Index; |
| 84 | DSPTILEOFF : Registers.Registers_Index; |
| Arthur Heymans | 960e239 | 2026-03-03 19:45:24 +0100 | [diff] [blame] | 85 | DSPSIZE : Registers.Registers_Index; |
| 86 | DSPPOS : Registers.Registers_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 87 | SPCNTR : Registers.Registers_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 88 | -- Skylake registers (partially aliased) |
| 89 | PLANE_CTL : Registers.Registers_Index; |
| 90 | PLANE_OFFSET : Registers.Registers_Index; |
| 91 | PLANE_POS : Registers.Registers_Index; |
| 92 | PLANE_SIZE : Registers.Registers_Index; |
| 93 | PLANE_STRIDE : Registers.Registers_Index; |
| 94 | PLANE_SURF : Registers.Registers_Index; |
| 95 | PS_CTRL_1 : Registers.Registers_Index; |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 96 | PS_WIN_POS_1 : Registers.Registers_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 97 | PS_WIN_SZ_1 : Registers.Registers_Index; |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 98 | PS_CTRL_2 : Registers.Registers_Invalid_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 99 | PS_WIN_SZ_2 : Registers.Registers_Invalid_Index; |
| 100 | WM_LINETIME : Registers.Registers_Index; |
| 101 | PLANE_BUF_CFG : Registers.Registers_Index; |
| 102 | PLANE_WM : PLANE_WM_Type; |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 103 | CUR_BUF_CFG : Registers.Registers_Index; |
| 104 | CUR_WM : PLANE_WM_Type; |
| Tim Wawrzynczak | 0da761a | 2022-09-09 10:42:36 -0600 | [diff] [blame^] | 105 | MBUS_DBOX_CTL : Registers.Registers_Index; |
| 106 | PIPE_CHICKEN : Registers.Registers_Index; |
| 107 | PLANE_COLOR_CTL : Registers.Registers_Index; |
| 108 | PLANE_AUX_DIST : Registers.Registers_Index; |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 109 | end record; |
| 110 | |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 111 | type Controller_Array is array (Pipe_Index) of Controller_Type; |
| 112 | |
| Arthur Heymans | 960e239 | 2026-03-03 19:45:24 +0100 | [diff] [blame] | 113 | -- On Gen3 (i945), FBC only works with Plane A, but LVDS and the |
| 114 | -- panel fitter are hooked to Pipe B. Hence we want Plane A feeding |
| 115 | -- Pipe B, which means swapping the plane register assignments: |
| 116 | -- Primary (Pipe A) gets Plane B, Secondary (Pipe B) gets Plane A. |
| 117 | |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 118 | Controllers : constant Controller_Array := |
| 119 | (Primary => Controller_Type' |
| 120 | (Pipe => Primary, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 121 | PIPESRC => Registers.PIPEASRC, |
| 122 | PIPEMISC => Registers.PIPEAMISC, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 123 | PF_CTRL => Registers.PFA_CTL_1, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 124 | PF_WIN_POS => Registers.PFA_WIN_POS, |
| 125 | PF_WIN_SZ => Registers.PFA_WIN_SZ, |
| Arthur Heymans | 960e239 | 2026-03-03 19:45:24 +0100 | [diff] [blame] | 126 | DSPCNTR => |
| 127 | (if Config.Planes_Pipes_Swapped |
| 128 | then Registers.DSPBCNTR else Registers.DSPACNTR), |
| 129 | DSPLINOFF => |
| 130 | (if Config.Planes_Pipes_Swapped |
| 131 | then Registers.DSPBLINOFF else Registers.DSPALINOFF), |
| 132 | DSPSTRIDE => |
| 133 | (if Config.Planes_Pipes_Swapped |
| 134 | then Registers.DSPBSTRIDE else Registers.DSPASTRIDE), |
| 135 | DSPSURF => |
| 136 | (if Config.Planes_Pipes_Swapped |
| 137 | then Registers.DSPBSURF else Registers.DSPASURF), |
| 138 | DSPTILEOFF => |
| 139 | (if Config.Planes_Pipes_Swapped |
| 140 | then Registers.DSPBTILEOFF else Registers.DSPATILEOFF), |
| 141 | DSPSIZE => |
| 142 | (if Config.Planes_Pipes_Swapped |
| 143 | then Registers.PLANE_SIZE_1_B else Registers.PLANE_SIZE_1_A), |
| 144 | DSPPOS => |
| 145 | (if Config.Planes_Pipes_Swapped |
| 146 | then Registers.PLANE_POS_1_B else Registers.PLANE_POS_1_A), |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 147 | SPCNTR => Registers.SPACNTR, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 148 | PLANE_CTL => Registers.DSPACNTR, |
| 149 | PLANE_OFFSET => Registers.DSPATILEOFF, |
| 150 | PLANE_POS => Registers.PLANE_POS_1_A, |
| 151 | PLANE_SIZE => Registers.PLANE_SIZE_1_A, |
| 152 | PLANE_STRIDE => Registers.DSPASTRIDE, |
| 153 | PLANE_SURF => Registers.DSPASURF, |
| 154 | PS_CTRL_1 => Registers.PS_CTRL_1_A, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 155 | PS_WIN_POS_1 => Registers.PS_WIN_POS_1_A, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 156 | PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 157 | PS_CTRL_2 => Registers.PS_CTRL_2_A, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 158 | PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A, |
| 159 | WM_LINETIME => Registers.WM_LINETIME_A, |
| 160 | PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A, |
| 161 | PLANE_WM => PLANE_WM_Type'( |
| 162 | Registers.PLANE_WM_1_A_0, |
| 163 | Registers.PLANE_WM_1_A_1, |
| 164 | Registers.PLANE_WM_1_A_2, |
| 165 | Registers.PLANE_WM_1_A_3, |
| 166 | Registers.PLANE_WM_1_A_4, |
| 167 | Registers.PLANE_WM_1_A_5, |
| 168 | Registers.PLANE_WM_1_A_6, |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 169 | Registers.PLANE_WM_1_A_7), |
| 170 | CUR_BUF_CFG => Registers.CUR_BUF_CFG_A, |
| 171 | CUR_WM => PLANE_WM_Type'( |
| 172 | Registers.CUR_WM_A_0, |
| 173 | Registers.CUR_WM_A_1, |
| 174 | Registers.CUR_WM_A_2, |
| 175 | Registers.CUR_WM_A_3, |
| 176 | Registers.CUR_WM_A_4, |
| 177 | Registers.CUR_WM_A_5, |
| 178 | Registers.CUR_WM_A_6, |
| Tim Wawrzynczak | 0da761a | 2022-09-09 10:42:36 -0600 | [diff] [blame^] | 179 | Registers.CUR_WM_A_7), |
| 180 | MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_A, |
| 181 | PIPE_CHICKEN => Registers.PIPEA_CHICKEN, |
| 182 | PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_A, |
| 183 | PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_A), |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 184 | Secondary => Controller_Type' |
| 185 | (Pipe => Secondary, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 186 | PIPESRC => Registers.PIPEBSRC, |
| 187 | PIPEMISC => Registers.PIPEBMISC, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 188 | PF_CTRL => Registers.PFB_CTL_1, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 189 | PF_WIN_POS => Registers.PFB_WIN_POS, |
| 190 | PF_WIN_SZ => Registers.PFB_WIN_SZ, |
| Arthur Heymans | 960e239 | 2026-03-03 19:45:24 +0100 | [diff] [blame] | 191 | DSPCNTR => |
| 192 | (if Config.Planes_Pipes_Swapped |
| 193 | then Registers.DSPACNTR else Registers.DSPBCNTR), |
| 194 | DSPLINOFF => |
| 195 | (if Config.Planes_Pipes_Swapped |
| 196 | then Registers.DSPALINOFF else Registers.DSPBLINOFF), |
| 197 | DSPSTRIDE => |
| 198 | (if Config.Planes_Pipes_Swapped |
| 199 | then Registers.DSPASTRIDE else Registers.DSPBSTRIDE), |
| 200 | DSPSURF => |
| 201 | (if Config.Planes_Pipes_Swapped |
| 202 | then Registers.DSPASURF else Registers.DSPBSURF), |
| 203 | DSPTILEOFF => |
| 204 | (if Config.Planes_Pipes_Swapped |
| 205 | then Registers.DSPATILEOFF else Registers.DSPBTILEOFF), |
| 206 | DSPSIZE => |
| 207 | (if Config.Planes_Pipes_Swapped |
| 208 | then Registers.PLANE_SIZE_1_A else Registers.PLANE_SIZE_1_B), |
| 209 | DSPPOS => |
| 210 | (if Config.Planes_Pipes_Swapped |
| 211 | then Registers.PLANE_POS_1_A else Registers.PLANE_POS_1_B), |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 212 | SPCNTR => Registers.SPBCNTR, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 213 | PLANE_CTL => Registers.DSPBCNTR, |
| 214 | PLANE_OFFSET => Registers.DSPBTILEOFF, |
| 215 | PLANE_POS => Registers.PLANE_POS_1_B, |
| 216 | PLANE_SIZE => Registers.PLANE_SIZE_1_B, |
| 217 | PLANE_STRIDE => Registers.DSPBSTRIDE, |
| 218 | PLANE_SURF => Registers.DSPBSURF, |
| 219 | PS_CTRL_1 => Registers.PS_CTRL_1_B, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 220 | PS_WIN_POS_1 => Registers.PS_WIN_POS_1_B, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 221 | PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 222 | PS_CTRL_2 => Registers.PS_CTRL_2_B, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 223 | PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B, |
| 224 | WM_LINETIME => Registers.WM_LINETIME_B, |
| 225 | PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B, |
| 226 | PLANE_WM => PLANE_WM_Type'( |
| 227 | Registers.PLANE_WM_1_B_0, |
| 228 | Registers.PLANE_WM_1_B_1, |
| 229 | Registers.PLANE_WM_1_B_2, |
| 230 | Registers.PLANE_WM_1_B_3, |
| 231 | Registers.PLANE_WM_1_B_4, |
| 232 | Registers.PLANE_WM_1_B_5, |
| 233 | Registers.PLANE_WM_1_B_6, |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 234 | Registers.PLANE_WM_1_B_7), |
| 235 | CUR_BUF_CFG => Registers.CUR_BUF_CFG_B, |
| 236 | CUR_WM => PLANE_WM_Type'( |
| 237 | Registers.CUR_WM_B_0, |
| 238 | Registers.CUR_WM_B_1, |
| 239 | Registers.CUR_WM_B_2, |
| 240 | Registers.CUR_WM_B_3, |
| 241 | Registers.CUR_WM_B_4, |
| 242 | Registers.CUR_WM_B_5, |
| 243 | Registers.CUR_WM_B_6, |
| Tim Wawrzynczak | 0da761a | 2022-09-09 10:42:36 -0600 | [diff] [blame^] | 244 | Registers.CUR_WM_B_7), |
| 245 | MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_B, |
| 246 | PIPE_CHICKEN => Registers.PIPEB_CHICKEN, |
| 247 | PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_B, |
| 248 | PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_B), |
| Nico Huber | f3e2366 | 2016-12-05 21:33:03 +0100 | [diff] [blame] | 249 | Tertiary => Controller_Type' |
| 250 | (Pipe => Tertiary, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 251 | PIPESRC => Registers.PIPECSRC, |
| 252 | PIPEMISC => Registers.PIPECMISC, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 253 | PF_CTRL => Registers.PFC_CTL_1, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 254 | PF_WIN_POS => Registers.PFC_WIN_POS, |
| 255 | PF_WIN_SZ => Registers.PFC_WIN_SZ, |
| 256 | DSPCNTR => Registers.DSPCCNTR, |
| 257 | DSPLINOFF => Registers.DSPCLINOFF, |
| 258 | DSPSTRIDE => Registers.DSPCSTRIDE, |
| 259 | DSPSURF => Registers.DSPCSURF, |
| 260 | DSPTILEOFF => Registers.DSPCTILEOFF, |
| Arthur Heymans | 960e239 | 2026-03-03 19:45:24 +0100 | [diff] [blame] | 261 | DSPSIZE => Registers.PLANE_SIZE_1_C, |
| 262 | DSPPOS => Registers.PLANE_POS_1_C, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 263 | SPCNTR => Registers.SPCCNTR, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 264 | PLANE_CTL => Registers.DSPCCNTR, |
| 265 | PLANE_OFFSET => Registers.DSPCTILEOFF, |
| 266 | PLANE_POS => Registers.PLANE_POS_1_C, |
| 267 | PLANE_SIZE => Registers.PLANE_SIZE_1_C, |
| 268 | PLANE_STRIDE => Registers.DSPCSTRIDE, |
| 269 | PLANE_SURF => Registers.DSPCSURF, |
| 270 | PS_CTRL_1 => Registers.PS_CTRL_1_C, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 271 | PS_WIN_POS_1 => Registers.PS_WIN_POS_1_C, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 272 | PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C, |
| Nico Huber | 4916e34 | 2016-11-04 14:37:53 +0100 | [diff] [blame] | 273 | PS_CTRL_2 => Registers.Invalid_Register, |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 274 | PS_WIN_SZ_2 => Registers.Invalid_Register, |
| 275 | WM_LINETIME => Registers.WM_LINETIME_C, |
| 276 | PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C, |
| 277 | PLANE_WM => PLANE_WM_Type'( |
| 278 | Registers.PLANE_WM_1_C_0, |
| 279 | Registers.PLANE_WM_1_C_1, |
| 280 | Registers.PLANE_WM_1_C_2, |
| 281 | Registers.PLANE_WM_1_C_3, |
| 282 | Registers.PLANE_WM_1_C_4, |
| 283 | Registers.PLANE_WM_1_C_5, |
| 284 | Registers.PLANE_WM_1_C_6, |
| Nico Huber | 4dc4c61 | 2018-01-10 15:55:09 +0100 | [diff] [blame] | 285 | Registers.PLANE_WM_1_C_7), |
| 286 | CUR_BUF_CFG => Registers.CUR_BUF_CFG_C, |
| 287 | CUR_WM => PLANE_WM_Type'( |
| 288 | Registers.CUR_WM_C_0, |
| 289 | Registers.CUR_WM_C_1, |
| 290 | Registers.CUR_WM_C_2, |
| 291 | Registers.CUR_WM_C_3, |
| 292 | Registers.CUR_WM_C_4, |
| 293 | Registers.CUR_WM_C_5, |
| 294 | Registers.CUR_WM_C_6, |
| Tim Wawrzynczak | 0da761a | 2022-09-09 10:42:36 -0600 | [diff] [blame^] | 295 | Registers.CUR_WM_C_7), |
| 296 | MBUS_DBOX_CTL => Registers.PIPE_MBUS_DBOX_CTL_C, |
| 297 | PIPE_CHICKEN => Registers.PIPEC_CHICKEN, |
| 298 | PLANE_COLOR_CTL => Registers.PLANE_COLOR_CTL_1_C, |
| 299 | PLANE_AUX_DIST => Registers.PLANE_AUX_DIST_1_C)); |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 300 | |
| Nico Huber | 75a707f | 2018-06-18 16:28:33 +0200 | [diff] [blame] | 301 | type Cursor_Regs is record |
| 302 | CTL : Registers.Registers_Index; |
| 303 | BASE : Registers.Registers_Index; |
| 304 | POS : Registers.Registers_Index; |
| 305 | FBC_CTL : Registers.Registers_Invalid_Index; |
| 306 | end record; |
| 307 | |
| 308 | function Cursors (Pipe : Pipe_Index) return Cursor_Regs is |
| 309 | (if not Config.Has_Ivybridge_Cursors then |
| 310 | (if Pipe = Primary then |
| 311 | (CTL => Registers.CURACNTR, |
| 312 | BASE => Registers.CURABASE, |
| 313 | POS => Registers.CURAPOS, |
| 314 | FBC_CTL => Registers.Invalid_Register) |
| 315 | else |
| 316 | (CTL => Registers.CURBCNTR, |
| 317 | BASE => Registers.CURBBASE, |
| 318 | POS => Registers.CURBPOS, |
| 319 | FBC_CTL => Registers.Invalid_Register)) |
| 320 | else |
| 321 | (if Pipe = Primary then |
| 322 | (CTL => Registers.CUR_CTL_A, |
| 323 | BASE => Registers.CUR_BASE_A, |
| 324 | POS => Registers.CUR_POS_A, |
| 325 | FBC_CTL => Registers.CUR_FBC_CTL_A) |
| 326 | elsif Pipe = Secondary then |
| 327 | (CTL => Registers.CUR_CTL_B, |
| 328 | BASE => Registers.CUR_BASE_B, |
| 329 | POS => Registers.CUR_POS_B, |
| 330 | FBC_CTL => Registers.CUR_FBC_CTL_B) |
| 331 | else |
| 332 | (CTL => Registers.CUR_CTL_C, |
| 333 | BASE => Registers.CUR_BASE_C, |
| 334 | POS => Registers.CUR_POS_C, |
| 335 | FBC_CTL => Registers.CUR_FBC_CTL_C))); |
| 336 | |
| Nico Huber | 83693c8 | 2016-10-08 22:17:55 +0200 | [diff] [blame] | 337 | end HW.GFX.GMA.Pipe_Setup; |