Gitiles
Code Review Sign In
review.sourcearcade.org / libgfxinit / 33912aa2a409416451e5e2d8eee05dc17212004d / . / common / hw-gfx-gma-pipe_setup.ads
blob: a57ca18d3fb3fd8af6dbde2f85d309db9e85a757 [file] [log] [blame]
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]1--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +0200[diff] [blame]6-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]8--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.GFX.GMA.Registers;
16
Nico Huber47ff0692016-11-04 14:29:39 +0100[diff] [blame]17use type HW.Int32;
18
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]19private package HW.GFX.GMA.Pipe_Setup
20is
21
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]22 procedure On
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]23 (Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]24 Port_Cfg : Port_Config;
Nico Huber47ff0692016-11-04 14:29:39 +0100[diff] [blame]25 Framebuffer : Framebuffer_Type)
26 with
27 Pre =>
28 Framebuffer.Width <= Pos32 (Port_Cfg.Mode.H_Visible) and
29 Framebuffer.Height <= Pos32 (Port_Cfg.Mode.V_Visible);
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]30
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]31 procedure Off (Pipe : Pipe_Index; Port_Cfg : Port_Config);
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]32
Nico Huber33912aa2016-12-06 20:36:23 +0100[diff] [blame^]33 procedure Legacy_VGA_Off;
34
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]35 procedure All_Off;
36
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]37 function Get_Pipe_Hint (Pipe : Pipe_Index) return Word32;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]38
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]39 procedure Update_Offset (Pipe : Pipe_Index; Framebuffer : Framebuffer_Type);
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]40
41private
42
43 subtype WM_Levels is Natural range 0 .. 7;
44 type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index;
45
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]46 ----------------------------------------------------------------------------
47
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]48 type Controller_Type is
49 record
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]50 Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]51 PIPESRC : Registers.Registers_Index;
52 PIPEMISC : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]53 PF_CTRL : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]54 PF_WIN_POS : Registers.Registers_Index;
55 PF_WIN_SZ : Registers.Registers_Index;
56 DSPCNTR : Registers.Registers_Index;
57 DSPLINOFF : Registers.Registers_Index;
58 DSPSTRIDE : Registers.Registers_Index;
59 DSPSURF : Registers.Registers_Index;
60 DSPTILEOFF : Registers.Registers_Index;
61 SPCNTR : Registers.Registers_Index;
62 TRANS_CLK_SEL : Registers.Registers_Index;
63 -- Skylake registers (partially aliased)
64 PLANE_CTL : Registers.Registers_Index;
65 PLANE_OFFSET : Registers.Registers_Index;
66 PLANE_POS : Registers.Registers_Index;
67 PLANE_SIZE : Registers.Registers_Index;
68 PLANE_STRIDE : Registers.Registers_Index;
69 PLANE_SURF : Registers.Registers_Index;
70 PS_CTRL_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]71 PS_WIN_POS_1 : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]72 PS_WIN_SZ_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]73 PS_CTRL_2 : Registers.Registers_Invalid_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]74 PS_WIN_SZ_2 : Registers.Registers_Invalid_Index;
75 WM_LINETIME : Registers.Registers_Index;
76 PLANE_BUF_CFG : Registers.Registers_Index;
77 PLANE_WM : PLANE_WM_Type;
78 end record;
79
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]80 type Controller_Array is array (Pipe_Index) of Controller_Type;
81
82 ----------------------------------------------------------------------------
83
84 type Pipe_Head is (Head_EDP, Head_A, Head_B, Head_C);
85
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]86 type Head_Type is
87 record
88 Head : Pipe_Head;
89 HTOTAL : Registers.Registers_Index;
90 HBLANK : Registers.Registers_Index;
91 HSYNC : Registers.Registers_Index;
92 VTOTAL : Registers.Registers_Index;
93 VBLANK : Registers.Registers_Index;
94 VSYNC : Registers.Registers_Index;
95 PIPECONF : Registers.Registers_Index;
96 PIPE_DATA_M1 : Registers.Registers_Index;
97 PIPE_DATA_N1 : Registers.Registers_Index;
98 PIPE_LINK_M1 : Registers.Registers_Index;
99 PIPE_LINK_N1 : Registers.Registers_Index;
100 PIPE_DDI_FUNC_CTL : Registers.Registers_Index;
101 PIPE_MSA_MISC : Registers.Registers_Index;
102 end record;
103
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]104 type Head_Array is array (Pipe_Head) of Head_Type;
105
106 ----------------------------------------------------------------------------
107
108 Controllers : constant Controller_Array :=
109 (Primary => Controller_Type'
110 (Pipe => Primary,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]111 PIPESRC => Registers.PIPEASRC,
112 PIPEMISC => Registers.PIPEAMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]113 PF_CTRL => Registers.PFA_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]114 PF_WIN_POS => Registers.PFA_WIN_POS,
115 PF_WIN_SZ => Registers.PFA_WIN_SZ,
116 DSPCNTR => Registers.DSPACNTR,
117 DSPLINOFF => Registers.DSPALINOFF,
118 DSPSTRIDE => Registers.DSPASTRIDE,
119 DSPSURF => Registers.DSPASURF,
120 DSPTILEOFF => Registers.DSPATILEOFF,
121 SPCNTR => Registers.SPACNTR,
122 TRANS_CLK_SEL => Registers.TRANSA_CLK_SEL,
123 PLANE_CTL => Registers.DSPACNTR,
124 PLANE_OFFSET => Registers.DSPATILEOFF,
125 PLANE_POS => Registers.PLANE_POS_1_A,
126 PLANE_SIZE => Registers.PLANE_SIZE_1_A,
127 PLANE_STRIDE => Registers.DSPASTRIDE,
128 PLANE_SURF => Registers.DSPASURF,
129 PS_CTRL_1 => Registers.PS_CTRL_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]130 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_A,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]131 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]132 PS_CTRL_2 => Registers.PS_CTRL_2_A,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]133 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A,
134 WM_LINETIME => Registers.WM_LINETIME_A,
135 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A,
136 PLANE_WM => PLANE_WM_Type'(
137 Registers.PLANE_WM_1_A_0,
138 Registers.PLANE_WM_1_A_1,
139 Registers.PLANE_WM_1_A_2,
140 Registers.PLANE_WM_1_A_3,
141 Registers.PLANE_WM_1_A_4,
142 Registers.PLANE_WM_1_A_5,
143 Registers.PLANE_WM_1_A_6,
144 Registers.PLANE_WM_1_A_7)),
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]145 Secondary => Controller_Type'
146 (Pipe => Secondary,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]147 PIPESRC => Registers.PIPEBSRC,
148 PIPEMISC => Registers.PIPEBMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]149 PF_CTRL => Registers.PFB_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]150 PF_WIN_POS => Registers.PFB_WIN_POS,
151 PF_WIN_SZ => Registers.PFB_WIN_SZ,
152 DSPCNTR => Registers.DSPBCNTR,
153 DSPLINOFF => Registers.DSPBLINOFF,
154 DSPSTRIDE => Registers.DSPBSTRIDE,
155 DSPSURF => Registers.DSPBSURF,
156 DSPTILEOFF => Registers.DSPBTILEOFF,
157 SPCNTR => Registers.SPBCNTR,
158 TRANS_CLK_SEL => Registers.TRANSB_CLK_SEL,
159 PLANE_CTL => Registers.DSPBCNTR,
160 PLANE_OFFSET => Registers.DSPBTILEOFF,
161 PLANE_POS => Registers.PLANE_POS_1_B,
162 PLANE_SIZE => Registers.PLANE_SIZE_1_B,
163 PLANE_STRIDE => Registers.DSPBSTRIDE,
164 PLANE_SURF => Registers.DSPBSURF,
165 PS_CTRL_1 => Registers.PS_CTRL_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]166 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_B,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]167 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]168 PS_CTRL_2 => Registers.PS_CTRL_2_B,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]169 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B,
170 WM_LINETIME => Registers.WM_LINETIME_B,
171 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B,
172 PLANE_WM => PLANE_WM_Type'(
173 Registers.PLANE_WM_1_B_0,
174 Registers.PLANE_WM_1_B_1,
175 Registers.PLANE_WM_1_B_2,
176 Registers.PLANE_WM_1_B_3,
177 Registers.PLANE_WM_1_B_4,
178 Registers.PLANE_WM_1_B_5,
179 Registers.PLANE_WM_1_B_6,
180 Registers.PLANE_WM_1_B_7)),
Nico Huberf3e23662016-12-05 21:33:03 +0100[diff] [blame]181 Tertiary => Controller_Type'
182 (Pipe => Tertiary,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]183 PIPESRC => Registers.PIPECSRC,
184 PIPEMISC => Registers.PIPECMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]185 PF_CTRL => Registers.PFC_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]186 PF_WIN_POS => Registers.PFC_WIN_POS,
187 PF_WIN_SZ => Registers.PFC_WIN_SZ,
188 DSPCNTR => Registers.DSPCCNTR,
189 DSPLINOFF => Registers.DSPCLINOFF,
190 DSPSTRIDE => Registers.DSPCSTRIDE,
191 DSPSURF => Registers.DSPCSURF,
192 DSPTILEOFF => Registers.DSPCTILEOFF,
193 SPCNTR => Registers.SPCCNTR,
194 TRANS_CLK_SEL => Registers.TRANSC_CLK_SEL,
195 PLANE_CTL => Registers.DSPCCNTR,
196 PLANE_OFFSET => Registers.DSPCTILEOFF,
197 PLANE_POS => Registers.PLANE_POS_1_C,
198 PLANE_SIZE => Registers.PLANE_SIZE_1_C,
199 PLANE_STRIDE => Registers.DSPCSTRIDE,
200 PLANE_SURF => Registers.DSPCSURF,
201 PS_CTRL_1 => Registers.PS_CTRL_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]202 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_C,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]203 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100[diff] [blame]204 PS_CTRL_2 => Registers.Invalid_Register,
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]205 PS_WIN_SZ_2 => Registers.Invalid_Register,
206 WM_LINETIME => Registers.WM_LINETIME_C,
207 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C,
208 PLANE_WM => PLANE_WM_Type'(
209 Registers.PLANE_WM_1_C_0,
210 Registers.PLANE_WM_1_C_1,
211 Registers.PLANE_WM_1_C_2,
212 Registers.PLANE_WM_1_C_3,
213 Registers.PLANE_WM_1_C_4,
214 Registers.PLANE_WM_1_C_5,
215 Registers.PLANE_WM_1_C_6,
216 Registers.PLANE_WM_1_C_7)));
217
218 Heads : constant Head_Array := Head_Array'
219 (Head_EDP => Head_Type'
220 (Head => Head_EDP,
221 HTOTAL => Registers.HTOTAL_EDP,
222 HBLANK => Registers.HBLANK_EDP,
223 HSYNC => Registers.HSYNC_EDP,
224 VTOTAL => Registers.VTOTAL_EDP,
225 VBLANK => Registers.VBLANK_EDP,
226 VSYNC => Registers.VSYNC_EDP,
227 PIPECONF => Registers.PIPE_EDP_CONF,
228 PIPE_DATA_M1 => Registers.PIPE_EDP_DATA_M1,
229 PIPE_DATA_N1 => Registers.PIPE_EDP_DATA_N1,
230 PIPE_LINK_M1 => Registers.PIPE_EDP_LINK_M1,
231 PIPE_LINK_N1 => Registers.PIPE_EDP_LINK_N1,
232 PIPE_DDI_FUNC_CTL => Registers.PIPE_EDP_DDI_FUNC_CTL,
233 PIPE_MSA_MISC => Registers.PIPE_EDP_MSA_MISC),
234 Head_A => Head_Type'
235 (Head => Head_A,
236 HTOTAL => Registers.HTOTAL_A,
237 HBLANK => Registers.HBLANK_A,
238 HSYNC => Registers.HSYNC_A,
239 VTOTAL => Registers.VTOTAL_A,
240 VBLANK => Registers.VBLANK_A,
241 VSYNC => Registers.VSYNC_A,
242 PIPECONF => Registers.PIPEACONF,
243 PIPE_DATA_M1 => Registers.PIPEA_DATA_M1,
244 PIPE_DATA_N1 => Registers.PIPEA_DATA_N1,
245 PIPE_LINK_M1 => Registers.PIPEA_LINK_M1,
246 PIPE_LINK_N1 => Registers.PIPEA_LINK_N1,
247 PIPE_DDI_FUNC_CTL => Registers.PIPEA_DDI_FUNC_CTL,
248 PIPE_MSA_MISC => Registers.PIPEA_MSA_MISC),
249 Head_B => Head_Type'
250 (Head => Head_B,
251 HTOTAL => Registers.HTOTAL_B,
252 HBLANK => Registers.HBLANK_B,
253 HSYNC => Registers.HSYNC_B,
254 VTOTAL => Registers.VTOTAL_B,
255 VBLANK => Registers.VBLANK_B,
256 VSYNC => Registers.VSYNC_B,
257 PIPECONF => Registers.PIPEBCONF,
258 PIPE_DATA_M1 => Registers.PIPEB_DATA_M1,
259 PIPE_DATA_N1 => Registers.PIPEB_DATA_N1,
260 PIPE_LINK_M1 => Registers.PIPEB_LINK_M1,
261 PIPE_LINK_N1 => Registers.PIPEB_LINK_N1,
262 PIPE_DDI_FUNC_CTL => Registers.PIPEB_DDI_FUNC_CTL,
263 PIPE_MSA_MISC => Registers.PIPEB_MSA_MISC),
264 Head_C => Head_Type'
265 (Head => Head_C,
266 HTOTAL => Registers.HTOTAL_C,
267 HBLANK => Registers.HBLANK_C,
268 HSYNC => Registers.HSYNC_C,
269 VTOTAL => Registers.VTOTAL_C,
270 VBLANK => Registers.VBLANK_C,
271 VSYNC => Registers.VSYNC_C,
272 PIPECONF => Registers.PIPECCONF,
273 PIPE_DATA_M1 => Registers.PIPEC_DATA_M1,
274 PIPE_DATA_N1 => Registers.PIPEC_DATA_N1,
275 PIPE_LINK_M1 => Registers.PIPEC_LINK_M1,
276 PIPE_LINK_N1 => Registers.PIPEC_LINK_N1,
277 PIPE_DDI_FUNC_CTL => Registers.PIPEC_DDI_FUNC_CTL,
278 PIPE_MSA_MISC => Registers.PIPEC_MSA_MISC));
279
280end HW.GFX.GMA.Pipe_Setup;