blob: 03a71d88f55e5a53944bc770e032ec93e179b876 [file] [log] [blame]
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __PROGRAMMER_H__
25#define __PROGRAMMER_H__ 1
26
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000028
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000029enum programmer {
30#if CONFIG_INTERNAL == 1
31 PROGRAMMER_INTERNAL,
32#endif
33#if CONFIG_DUMMY == 1
34 PROGRAMMER_DUMMY,
35#endif
36#if CONFIG_NIC3COM == 1
37 PROGRAMMER_NIC3COM,
38#endif
39#if CONFIG_NICREALTEK == 1
40 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000041#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042#if CONFIG_NICNATSEMI == 1
43 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000044#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000045#if CONFIG_GFXNVIDIA == 1
46 PROGRAMMER_GFXNVIDIA,
47#endif
48#if CONFIG_DRKAISER == 1
49 PROGRAMMER_DRKAISER,
50#endif
51#if CONFIG_SATASII == 1
52 PROGRAMMER_SATASII,
53#endif
54#if CONFIG_ATAHPT == 1
55 PROGRAMMER_ATAHPT,
56#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000057#if CONFIG_FT2232_SPI == 1
58 PROGRAMMER_FT2232_SPI,
59#endif
60#if CONFIG_SERPROG == 1
61 PROGRAMMER_SERPROG,
62#endif
63#if CONFIG_BUSPIRATE_SPI == 1
64 PROGRAMMER_BUSPIRATE_SPI,
65#endif
66#if CONFIG_DEDIPROG == 1
67 PROGRAMMER_DEDIPROG,
68#endif
69#if CONFIG_RAYER_SPI == 1
70 PROGRAMMER_RAYER_SPI,
71#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000072#if CONFIG_PONY_SPI == 1
73 PROGRAMMER_PONY_SPI,
74#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000075#if CONFIG_NICINTEL == 1
76 PROGRAMMER_NICINTEL,
77#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000078#if CONFIG_NICINTEL_SPI == 1
79 PROGRAMMER_NICINTEL_SPI,
80#endif
Mark Marshall90021f22010-12-03 14:48:11 +000081#if CONFIG_OGP_SPI == 1
82 PROGRAMMER_OGP_SPI,
83#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000084#if CONFIG_SATAMV == 1
85 PROGRAMMER_SATAMV,
86#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +000087#if CONFIG_LINUX_SPI == 1
88 PROGRAMMER_LINUX_SPI,
89#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000090 PROGRAMMER_INVALID /* This must always be the last entry. */
91};
92
Stefan Tauneraf358d62012-12-27 18:40:26 +000093enum programmer_type {
94 PCI = 1, /* to detect uninitialized values */
95 USB,
96 OTHER,
97};
98
Stefan Tauner4b24a2d2012-12-27 18:40:36 +000099struct dev_entry {
100 uint16_t vendor_id;
101 uint16_t device_id;
102 const enum test_state status;
103 const char *vendor_name;
104 const char *device_name;
105};
106
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000107struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000108 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000109 const enum programmer_type type;
110 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000111 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000112 const char *const note;
113 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000114
115 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000116
Stefan Taunera6d96482012-12-26 19:51:23 +0000117 void *(*map_flash_region) (const char *descr, unsigned long phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000118 void (*unmap_flash_region) (void *virt_addr, size_t len);
119
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000120 void (*delay) (int usecs);
121};
122
123extern const struct programmer_entry programmer_table[];
124
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000125int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000126int programmer_shutdown(void);
127
128enum bitbang_spi_master_type {
129 BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
130#if CONFIG_RAYER_SPI == 1
131 BITBANG_SPI_MASTER_RAYER,
132#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000133#if CONFIG_PONY_SPI == 1
134 BITBANG_SPI_MASTER_PONY,
135#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +0000136#if CONFIG_NICINTEL_SPI == 1
137 BITBANG_SPI_MASTER_NICINTEL,
138#endif
Carl-Daniel Hailfinger2f436162010-07-28 15:08:35 +0000139#if CONFIG_INTERNAL == 1
140#if defined(__i386__) || defined(__x86_64__)
141 BITBANG_SPI_MASTER_MCP,
142#endif
143#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000144#if CONFIG_OGP_SPI == 1
145 BITBANG_SPI_MASTER_OGP,
146#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000147};
148
149struct bitbang_spi_master {
150 enum bitbang_spi_master_type type;
151
152 /* Note that CS# is active low, so val=0 means the chip is active. */
153 void (*set_cs) (int val);
154 void (*set_sck) (int val);
155 void (*set_mosi) (int val);
156 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000157 void (*request_bus) (void);
158 void (*release_bus) (void);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000159 /* Length of half a clock period in usecs. */
160 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000161};
162
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000163#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000164struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000165
166/* pcidev.c */
167// FIXME: These need to be local, not global
168extern uint32_t io_base_addr;
169extern struct pci_access *pacc;
170int pci_init_common(void);
171uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
172struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
173/* rpci_write_* are reversible writes. The original PCI config space register
174 * contents will be restored on shutdown.
175 */
176int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
177int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
178int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
179#endif
180
181#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000182struct penable {
183 uint16_t vendor_id;
184 uint16_t device_id;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000185 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000186 const char *vendor_name;
187 const char *device_name;
188 int (*doit) (struct pci_dev *dev, const char *name);
189};
190
191extern const struct penable chipset_enables[];
192
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000193enum board_match_phase {
194 P1,
195 P2,
196 P3
197};
198
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000199struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000200 /* Any device, but make it sensible, like the ISA bridge. */
201 uint16_t first_vendor;
202 uint16_t first_device;
203 uint16_t first_card_vendor;
204 uint16_t first_card_device;
205
206 /* Any device, but make it sensible, like
207 * the host bridge. May be NULL.
208 */
209 uint16_t second_vendor;
210 uint16_t second_device;
211 uint16_t second_card_vendor;
212 uint16_t second_card_device;
213
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000214 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000215 const char *dmi_pattern;
216
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000217 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000218 const char *lb_vendor;
219 const char *lb_part;
220
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000221 enum board_match_phase phase;
222
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000223 const char *vendor_name;
224 const char *board_name;
225
226 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000227 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000228 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000229};
230
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000231extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000232
233struct board_info {
234 const char *vendor;
235 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000236 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000237#ifdef CONFIG_PRINT_WIKI
238 const char *url;
239 const char *note;
240#endif
241};
242
243extern const struct board_info boards_known[];
244extern const struct board_info laptops_known[];
245#endif
246
247/* udelay.c */
248void myusec_delay(int usecs);
249void myusec_calibrate_delay(void);
250void internal_delay(int usecs);
251
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000252#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000253/* board_enable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000254int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000255void w836xx_ext_enter(uint16_t port);
256void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000257void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000258int it8705f_write_enable(uint8_t port);
259uint8_t sio_read(uint16_t port, uint8_t reg);
260void sio_write(uint16_t port, uint8_t reg, uint8_t data);
261void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000262void board_handle_before_superio(void);
263void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000264int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000265
266/* chipset_enable.c */
267int chipset_flash_enable(void);
268
269/* processor_enable.c */
270int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000271#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000272
273/* physmap.c */
274void *physmap(const char *descr, unsigned long phys_addr, size_t len);
275void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
276void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000277#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000278int setup_cpu_msr(int cpu);
279void cleanup_cpu_msr(void);
280
281/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000282int cb_parse_table(const char **vendor, const char **model);
283int cb_check_image(uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000284
285/* dmi.c */
286extern int has_dmi_support;
287void dmi_init(void);
288int dmi_match(const char *pattern);
289
290/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000291struct superio {
292 uint16_t vendor;
293 uint16_t port;
294 uint16_t model;
295};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000296extern struct superio superios[];
297extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000298#define SUPERIO_VENDOR_NONE 0x0
299#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000300#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000301#endif
302#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000303struct pci_filter;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000304struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Uwe Hermann24c35e42011-07-13 11:22:03 +0000305struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000306struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
307struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
308 uint16_t card_vendor, uint16_t card_device);
309#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000310int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000311#if CONFIG_INTERNAL == 1
312extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000313extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000314extern int force_boardenable;
315extern int force_boardmismatch;
316void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000317int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000318extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000319int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000320#endif
321
322/* hwaccess.c */
323void mmio_writeb(uint8_t val, void *addr);
324void mmio_writew(uint16_t val, void *addr);
325void mmio_writel(uint32_t val, void *addr);
326uint8_t mmio_readb(void *addr);
327uint16_t mmio_readw(void *addr);
328uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerccd71c22012-03-01 22:38:27 +0000329void mmio_readn(void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000330void mmio_le_writeb(uint8_t val, void *addr);
331void mmio_le_writew(uint16_t val, void *addr);
332void mmio_le_writel(uint32_t val, void *addr);
333uint8_t mmio_le_readb(void *addr);
334uint16_t mmio_le_readw(void *addr);
335uint32_t mmio_le_readl(void *addr);
336#define pci_mmio_writeb mmio_le_writeb
337#define pci_mmio_writew mmio_le_writew
338#define pci_mmio_writel mmio_le_writel
339#define pci_mmio_readb mmio_le_readb
340#define pci_mmio_readw mmio_le_readw
341#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000342void rmmio_writeb(uint8_t val, void *addr);
343void rmmio_writew(uint16_t val, void *addr);
344void rmmio_writel(uint32_t val, void *addr);
345void rmmio_le_writeb(uint8_t val, void *addr);
346void rmmio_le_writew(uint16_t val, void *addr);
347void rmmio_le_writel(uint32_t val, void *addr);
348#define pci_rmmio_writeb rmmio_le_writeb
349#define pci_rmmio_writew rmmio_le_writew
350#define pci_rmmio_writel rmmio_le_writel
351void rmmio_valb(void *addr);
352void rmmio_valw(void *addr);
353void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000354
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000355/* dummyflasher.c */
356#if CONFIG_DUMMY == 1
357int dummy_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000358void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
359void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000360#endif
361
362/* nic3com.c */
363#if CONFIG_NIC3COM == 1
364int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000365extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000366#endif
367
368/* gfxnvidia.c */
369#if CONFIG_GFXNVIDIA == 1
370int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000371extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000372#endif
373
374/* drkaiser.c */
375#if CONFIG_DRKAISER == 1
376int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000377extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000378#endif
379
380/* nicrealtek.c */
381#if CONFIG_NICREALTEK == 1
382int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000383extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000384#endif
385
386/* nicnatsemi.c */
387#if CONFIG_NICNATSEMI == 1
388int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000389extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000390#endif
391
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000392/* nicintel.c */
393#if CONFIG_NICINTEL == 1
394int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000395extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000396#endif
397
Idwer Vollering004f4b72010-09-03 18:21:21 +0000398/* nicintel_spi.c */
399#if CONFIG_NICINTEL_SPI == 1
400int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000401extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000402#endif
403
Mark Marshall90021f22010-12-03 14:48:11 +0000404/* ogp_spi.c */
405#if CONFIG_OGP_SPI == 1
406int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000407extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000408#endif
409
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000410/* satamv.c */
411#if CONFIG_SATAMV == 1
412int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000413extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000414#endif
415
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000416/* satasii.c */
417#if CONFIG_SATASII == 1
418int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000419extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000420#endif
421
422/* atahpt.c */
423#if CONFIG_ATAHPT == 1
424int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000425extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000426#endif
427
428/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000429#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000430int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000431extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000432#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000433
434/* rayer_spi.c */
435#if CONFIG_RAYER_SPI == 1
436int rayer_spi_init(void);
437#endif
438
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000439/* pony_spi.c */
440#if CONFIG_PONY_SPI == 1
441int pony_spi_init(void);
442#endif
443
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000444/* bitbang_spi.c */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000445int bitbang_spi_init(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000446
447/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000448#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000449int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000450#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000451
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000452/* linux_spi.c */
453#if CONFIG_LINUX_SPI == 1
454int linux_spi_init(void);
455#endif
456
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000457/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000458#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000459int dediprog_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000460#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000461
462/* flashrom.c */
463struct decode_sizes {
464 uint32_t parallel;
465 uint32_t lpc;
466 uint32_t fwh;
467 uint32_t spi;
468};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000469// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000470extern struct decode_sizes max_rom_decode;
471extern int programmer_may_write;
472extern unsigned long flashbase;
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000473void check_chip_supported(const struct flashchip *chip);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000474int check_max_decode(enum chipbustype buses, uint32_t size);
Stefan Tauner66652442011-06-26 17:38:17 +0000475char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000476
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000477/* spi.c */
478enum spi_controller {
479 SPI_CONTROLLER_NONE,
480#if CONFIG_INTERNAL == 1
481#if defined(__i386__) || defined(__x86_64__)
482 SPI_CONTROLLER_ICH7,
483 SPI_CONTROLLER_ICH9,
David Hendricks4e748392011-02-28 23:58:15 +0000484 SPI_CONTROLLER_IT85XX,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000485 SPI_CONTROLLER_IT87XX,
486 SPI_CONTROLLER_SB600,
487 SPI_CONTROLLER_VIA,
488 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000489#endif
490#endif
491#if CONFIG_FT2232_SPI == 1
492 SPI_CONTROLLER_FT2232,
493#endif
494#if CONFIG_DUMMY == 1
495 SPI_CONTROLLER_DUMMY,
496#endif
497#if CONFIG_BUSPIRATE_SPI == 1
498 SPI_CONTROLLER_BUSPIRATE,
499#endif
500#if CONFIG_DEDIPROG == 1
501 SPI_CONTROLLER_DEDIPROG,
502#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000503#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__)))
Michael Karcherb9dbe482011-05-11 17:07:07 +0000504 SPI_CONTROLLER_BITBANG,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000505#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000506#if CONFIG_LINUX_SPI == 1
507 SPI_CONTROLLER_LINUX,
508#endif
Urja Rannikkoc93f5f12011-09-15 23:38:14 +0000509#if CONFIG_SERPROG == 1
510 SPI_CONTROLLER_SERPROG,
511#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000512};
Michael Karcher62797512011-05-11 17:07:02 +0000513
514#define MAX_DATA_UNSPECIFIED 0
515#define MAX_DATA_READ_UNLIMITED 64 * 1024
516#define MAX_DATA_WRITE_UNLIMITED 256
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000517struct spi_programmer {
Michael Karcherb9dbe482011-05-11 17:07:07 +0000518 enum spi_controller type;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000519 unsigned int max_data_read;
520 unsigned int max_data_write;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000521 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000522 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000523 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000524
525 /* Optimized functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000526 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
527 int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000528 int (*write_aai)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000529 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000530};
531
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000532int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000533 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000534int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000535int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
536int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000537int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000538int register_spi_programmer(const struct spi_programmer *programmer);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000539
Stefan Tauner2abab942012-04-27 20:41:23 +0000540/* The following enum is needed by ich_descriptor_tool and ich* code. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000541enum ich_chipset {
542 CHIPSET_ICH_UNKNOWN,
543 CHIPSET_ICH7 = 7,
544 CHIPSET_ICH8,
545 CHIPSET_ICH9,
546 CHIPSET_ICH10,
547 CHIPSET_5_SERIES_IBEX_PEAK,
548 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000549 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000550 CHIPSET_8_SERIES_LYNX_POINT,
551 CHIPSET_8_SERIES_LYNX_POINT_LP,
552 CHIPSET_8_SERIES_WELLSBURG,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000553};
554
Stefan Tauner2abab942012-04-27 20:41:23 +0000555/* ichspi.c */
556#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000557extern uint32_t ichspi_bbar;
558int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000559 enum ich_chipset ich_generation);
Helge Wagnerdd73d832012-08-24 23:03:46 +0000560int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000561
David Hendricks4e748392011-02-28 23:58:15 +0000562/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000563int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000564
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000565/* it87spi.c */
566void enter_conf_mode_ite(uint16_t port);
567void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000568void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000569int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000570
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000571/* mcp6x_spi.c */
572int mcp6x_spi_init(int want_spi);
573
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000574/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000575int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000576
577/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000578int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000579#endif
580
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000581/* opaque.c */
582struct opaque_programmer {
583 int max_data_read;
584 int max_data_write;
585 /* Specific functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000586 int (*probe) (struct flashctx *flash);
587 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
588 int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
589 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000590 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000591};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000592int register_opaque_programmer(const struct opaque_programmer *pgm);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000593
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000594/* programmer.c */
595int noop_shutdown(void);
596void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
597void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000598void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
599void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
600void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
601void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
602uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
603uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
604void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
605struct par_programmer {
606 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
607 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
608 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
609 void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
610 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
611 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
612 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
613 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000614 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000615};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000616int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
617struct registered_programmer {
618 enum chipbustype buses_supported;
619 union {
620 struct par_programmer par;
621 struct spi_programmer spi;
622 struct opaque_programmer opaque;
623 };
624};
625extern struct registered_programmer registered_programmers[];
626extern int registered_programmer_count;
627int register_programmer(struct registered_programmer *pgm);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000628
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000629/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000630#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000631int serprog_init(void);
Stefan Tauner31019d42011-10-22 21:45:27 +0000632void serprog_delay(int usecs);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000633#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000634
635/* serial.c */
Carl-Daniel Hailfinger60d9bd22012-08-09 23:34:41 +0000636#ifdef _WIN32
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000637typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000638#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000639#else
640typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000641#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000642#endif
643
644void sp_flush_incoming(void);
645fdtype sp_openserport(char *dev, unsigned int baud);
646void __attribute__((noreturn)) sp_die(char *msg);
647extern fdtype sp_fd;
David Hendricks8bb20212011-06-14 01:35:36 +0000648/* expose serialport_shutdown as it's currently used by buspirate */
649int serialport_shutdown(void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000650int serialport_write(unsigned char *buf, unsigned int writecnt);
651int serialport_read(unsigned char *buf, unsigned int readcnt);
652
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000653/* Serial port/pin mapping:
654
655 1 CD <-
656 2 RXD <-
657 3 TXD ->
658 4 DTR ->
659 5 GND --
660 6 DSR <-
661 7 RTS ->
662 8 CTS <-
663 9 RI <-
664*/
665enum SP_PIN {
666 PIN_CD = 1,
667 PIN_RXD,
668 PIN_TXD,
669 PIN_DTR,
670 PIN_GND,
671 PIN_DSR,
672 PIN_RTS,
673 PIN_CTS,
674 PIN_RI,
675};
676
677void sp_set_pin(enum SP_PIN pin, int val);
678int sp_get_pin(enum SP_PIN pin);
679
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000680#endif /* !__PROGRAMMER_H__ */