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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
Andriy Gapon65c1b862008-05-22 13:22:45 +000033#ifdef __FreeBSD__
34 #include <machine/cpufunc.h>
35 #define off64_t off_t
36 #define lseek64 lseek
37 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
38 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
39 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
40 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
41 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
42 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
43#else
44 #define OUTB outb
45 #define OUTW outw
46 #define OUTL outl
47 #define INB inb
48 #define INW inw
49 #define INL inl
50#endif
51
Uwe Hermanne5ac1642008-03-12 11:54:51 +000052#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
53
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000054struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +000055 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +000056 const char *name;
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000057 /* With 32bit manufacture_id and model_id we can cover IDs up to
58 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
59 * Identification code.
60 */
61 uint32_t manufacture_id;
62 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000063
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000064 int total_size;
65 int page_size;
66
Peter Stuge1159d582008-05-03 04:34:37 +000067 /* Indicate if flashrom has been tested with this flash chip and if
68 * everything worked correctly.
69 */
70 uint32_t tested;
71
Uwe Hermann0b7afe62007-04-01 19:44:21 +000072 int (*probe) (struct flashchip *flash);
73 int (*erase) (struct flashchip *flash);
74 int (*write) (struct flashchip *flash, uint8_t *buf);
75 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000076
Uwe Hermann372eeb52007-12-04 21:49:06 +000077 /* Some flash devices have an additional register space. */
Stefan Reinauerce532972007-05-23 17:20:56 +000078 volatile uint8_t *virtual_memory;
79 volatile uint8_t *virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000080};
81
Peter Stuge1159d582008-05-03 04:34:37 +000082#define TEST_UNTESTED 0
83
84#define TEST_OK_PROBE (1<<0)
85#define TEST_OK_READ (1<<1)
86#define TEST_OK_ERASE (1<<2)
87#define TEST_OK_WRITE (1<<3)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +000088#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +000089#define TEST_OK_MASK 0x0f
90
91#define TEST_BAD_PROBE (1<<4)
92#define TEST_BAD_READ (1<<5)
93#define TEST_BAD_ERASE (1<<6)
94#define TEST_BAD_WRITE (1<<7)
95#define TEST_BAD_MASK 0xf0
96
Ollie Lho184a4042005-11-26 21:55:36 +000097extern struct flashchip flashchips[];
98
Uwe Hermann372eeb52007-12-04 21:49:06 +000099/*
100 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000101 * entry of each section should be the manufacturer ID, followed by the
102 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +0000103 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000104 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
105 * continuation code.
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000106 * All SPI parts have 16-bit device IDs.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000107 */
108
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000109#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
110
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000111#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000112
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000113#define AMD_ID 0x01 /* AMD */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000114#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +0000115#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000116#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000117
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000118#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000119#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Rudolf Marekdcf46532008-05-22 13:42:23 +0000120#define AMIC_A25L40P 0x2013
Peter Lemenkov539478d2007-10-22 20:36:16 +0000121
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000122#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000123#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000124
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000125#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000126#define AT_25DF021 0x4300
127#define AT_25DF041A 0x4401
128#define AT_25DF081 0x4502
129#define AT_25DF161 0x4602
130#define AT_25DF321 0x4700 /* also 26DF321 */
131#define AT_25DF321A 0x4701
132#define AT_25DF641 0x4800
133#define AT_26DF041 0x4400
134#define AT_26DF081 0x4500 /* guessed, no datasheet available */
135#define AT_26DF081A 0x4501
136#define AT_26DF161 0x4600
137#define AT_26DF161A 0x4601
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000138#define AT_29C040A 0xA4
Uwe Hermannd7f48062007-04-28 02:22:59 +0000139#define AT_29C020 0xDA
Frederico Silva4bcf1752007-12-10 16:57:59 +0000140#define AT_49F002N 0x07 /* for AT49F002(N) */
141#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000142
Peter Lemenkov539478d2007-10-22 20:36:16 +0000143#define CATALYST_ID 0x31 /* Catalyst */
144
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000145#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage*/
Peter Lemenkov539478d2007-10-22 20:36:16 +0000146#define EMST_F49B002UA 0x00
147
Uwe Hermann372eeb52007-12-04 21:49:06 +0000148/*
149 * EN25 chips are SPI, first byte of device ID is memory type,
150 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000151 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
152 * is the continuation code for IDs in bank 2.
153 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
154 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
155 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000156 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000157#define EON_ID 0x7F1C /* EON Silicon Devices */
158#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000159#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
160#define EN_25B10 0x2011
161#define EN_25B20 0x2012
162#define EN_25B40 0x2013
163#define EN_25B80 0x2014
164#define EN_25B16 0x2015
165#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000166#define EN_29F512 0x7F21
167#define EN_29F010 0x7F20
168#define EN_29F040A 0x7F04
169#define EN_29LV010 0x7F6E
170#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000171#define EN_29F002T 0x7F92
172#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000173
Peter Lemenkov539478d2007-10-22 20:36:16 +0000174#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000175/* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
176 * try to read it from a location not mentioned in the data sheet.
177 */
178#define MBM29F400TC_STRANGE 0x23
179#define MBM29F400BC 0x7B
180#define MBM29F400TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000181
182#define HYUNDAI_ID 0xAD /* Hyundai */
183
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000184#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
185#define IM_29F004B 0xAE
186#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000187
188#define INTEL_ID 0x89 /* Intel */
189
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000190#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000191
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000192#define MSYSTEMS_ID 0x156F /* M-Systems, not listed in JEP106W */
Uwe Hermann372eeb52007-12-04 21:49:06 +0000193#define MSYSTEMS_MD2200 0xDB
Peter Lemenkov539478d2007-10-22 20:36:16 +0000194#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
195#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
196
Uwe Hermann372eeb52007-12-04 21:49:06 +0000197/*
198 * MX25 chips are SPI, first byte of device ID is memory type,
199 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000200 * Generalplus SPI chips seem to be compatible with Macronix
201 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000202 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000203#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000204#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
205#define MX_25L1005 0x2011
206#define MX_25L2005 0x2012
207#define MX_25L4005 0x2013 /* MX25L4005{,A} */
208#define MX_25L8005 0x2014
209#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
210#define MX_25L3205 0x2016 /* MX25L3205{,A} */
211#define MX_25L6405 0x2017 /* MX25L3205{,D} */
212#define MX_25L1635D 0x2415
213#define MX_25L3235D 0x2416
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000214#define MX_29F002 0xB0
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000215
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000216/* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
217 * a 0x7F continuation code prefix.
218 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000219#define PMC_ID 0x7F9D /* PMC */
220#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
221#define PMC_25LV512 0x7B
222#define PMC_25LV010 0x7C
223#define PMC_25LV020 0x7D
224#define PMC_25LV040 0x7E
225#define PMC_25LV080B 0x13
226#define PMC_25LV016B 0x14
227#define PMC_39LV512 0x1B
228#define PMC_39F010 0x1C /* also Pm39LV010 */
229#define PMC_39LV020 0x3D
230#define PMC_39LV040 0x3E
231#define PMC_39F020 0x4D
232#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000233#define PMC_49FL002 0x6D
234#define PMC_49FL004 0x6E
235
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000236#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000237#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000238
Uwe Hermann372eeb52007-12-04 21:49:06 +0000239/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000240 * Spansion was previously a joint venture of AMD and Fujitsu.
241 * S25 chips are SPI. The first device ID byte is memory type and
242 * the second device ID byte is memory capacity.
243 */
244#define SPANSION_ID 0x01 /* Spansion */
245#define SPANSION_S25FL016A 0x0214
246
247/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000248 * SST25 chips are SPI, first byte of device ID is memory type, second
249 * byte of device ID is related to log(bitsize) at least for some chips.
250 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000251#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000252#define SST_25WF512 0x2501
253#define SST_25WF010 0x2502
254#define SST_25WF020 0x2503
255#define SST_25WF040 0x2504
256#define SST_25VF016B 0x2541
257#define SST_25VF032B 0x254A
258#define SST_25VF040B 0x258D
259#define SST_25VF080B 0x258E
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000260#define SST_27SF512 0xA4
261#define SST_27SF010 0xA5
262#define SST_27SF020 0xA6
263#define SST_27VF010 0xA9
264#define SST_27VF020 0xAA
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000265#define SST_28SF040 0x04
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000266#define SST_29EE512 0x5D
267#define SST_29EE010 0x07
268#define SST_29LE010 0x08 /* also SST29VE010 */
269#define SST_29EE020A 0x10
270#define SST_29LE020 0x12 /* also SST29VE020 */
271#define SST_29SF020 0x24
272#define SST_29VF020 0x25
273#define SST_29SF040 0x13
274#define SST_29VF040 0x14
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000275#define SST_39SF010 0xB5
276#define SST_39SF020 0xB6
277#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000278#define SST_39VF512 0xD4
279#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000280#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000281#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000282#define SST_49LF040B 0x50
283#define SST_49LF040 0x51
284#define SST_49LF020A 0x52
285#define SST_49LF080A 0x5B
286#define SST_49LF002A 0x57
287#define SST_49LF003A 0x1B
288#define SST_49LF004A 0x60
289#define SST_49LF008A 0x5A
290#define SST_49LF004C 0x54
291#define SST_49LF008C 0x59
292#define SST_49LF016C 0x5C
293#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000294
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000295/*
296 * ST25P chips are SPI, first byte of device ID is memory type, second
297 * byte of device ID is related to log(bitsize) at least for some chips.
298 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000299#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000300#define ST_M25P05A 0x2010
301#define ST_M25P10A 0x2011
302#define ST_M25P20 0x2012
303#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000304#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000305#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000306#define ST_M25P16 0x2015
307#define ST_M25P32 0x2016
308#define ST_M25P64 0x2017
309#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000310#define ST_M50FLW040A 0x08
311#define ST_M50FLW040B 0x28
312#define ST_M50FLW080A 0x80
313#define ST_M50FLW080B 0x81
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000314#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000315#define ST_M50FW080 0x2D
316#define ST_M50FW016 0x2E
317#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000318#define ST_M29F002B 0x34
319#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000320#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000321#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000322#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000323#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000324
Peter Lemenkov539478d2007-10-22 20:36:16 +0000325#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000326#define S29C51001T 0x01
327#define S29C51002T 0x02
328#define S29C51004T 0x03
329#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000330
Peter Lemenkov539478d2007-10-22 20:36:16 +0000331#define TI_ID 0x97 /* Texas Instruments */
332
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000333/*
334 * W25X chips are SPI, first byte of device ID is memory type, second
335 * byte of device ID is related to log(bitsize).
336 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000337#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000338#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
339#define W_25X10 0x3011
340#define W_25X20 0x3012
341#define W_25X40 0x3013
342#define W_25X80 0x3014
Peter Lemenkov539478d2007-10-22 20:36:16 +0000343#define W_29C011 0xC1
344#define W_29C020C 0x45
345#define W_29C040P 0x46
346#define W_29EE011 0xC1
347#define W_39V040FA 0x34
348#define W_39V040A 0x3D
349#define W_39V040B 0x54
350#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000351#define W_39V080FA 0xD3
352#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000353#define W_49F002U 0x0B
354#define W_49V002A 0xB0
355#define W_49V002FA 0x32
356
Uwe Hermann372eeb52007-12-04 21:49:06 +0000357/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000358void myusec_delay(int time);
359void myusec_calibrate_delay();
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000360
Uwe Hermann372eeb52007-12-04 21:49:06 +0000361/* PCI handling for board/chipset_enable */
362struct pci_access *pacc;
Stefan Reinauer70385642007-04-06 11:58:03 +0000363struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000364struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
365 uint16_t card_vendor, uint16_t card_device);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000366
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000367
Uwe Hermann372eeb52007-12-04 21:49:06 +0000368/* board_enable.c */
369int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000370void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000371
Uwe Hermann372eeb52007-12-04 21:49:06 +0000372/* chipset_enable.c */
373int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000374void print_supported_chipsets(void);
Carl-Daniel Hailfinger6dc1d3b2008-05-14 14:51:22 +0000375extern int ich9_detected;
376extern void *ich_spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000377
Uwe Hermann372eeb52007-12-04 21:49:06 +0000378/* Physical memory mapping device */
Adam Kaufman064b1f22007-02-06 19:47:50 +0000379#if defined (__sun) && (defined(__i386) || defined(__amd64))
380# define MEM_DEV "/dev/xsvc"
381#else
382# define MEM_DEV "/dev/mem"
383#endif
384
Stefan Reinauer70385642007-04-06 11:58:03 +0000385extern int fd_mem;
386
Uwe Hermann0846f892007-08-23 13:34:59 +0000387/* debug.c */
388extern int verbose;
389#define printf_debug(x...) { if (verbose) printf(x); }
390
391/* flashrom.c */
392int map_flash_registers(struct flashchip *flash);
393
394/* layout.c */
395int show_id(uint8_t *bios, int size);
396int read_romlayout(char *name);
397int find_romentry(char *name);
398int handle_romentries(uint8_t *buffer, uint8_t *content);
399
400/* lbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000401int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000402extern char *lb_part, *lb_vendor;
403
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000404/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000405int probe_spi_rdid(struct flashchip *flash);
406int probe_spi_res(struct flashchip *flash);
Peter Stugefa8c5502008-05-10 23:07:52 +0000407int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
408void spi_write_enable();
409void spi_write_disable();
410int spi_chip_erase_c7(struct flashchip *flash);
411int spi_chip_write(struct flashchip *flash, uint8_t *buf);
412int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000413uint8_t spi_read_status_register();
414void spi_disable_blockprotect(void);
415void spi_byte_program(int address, uint8_t byte);
416void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
417void spi_nbyte_read(int address, uint8_t *bytes, int len);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000418
Uwe Hermann0846f892007-08-23 13:34:59 +0000419/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000420int probe_82802ab(struct flashchip *flash);
421int erase_82802ab(struct flashchip *flash);
422int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000423
424/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000425int probe_29f040b(struct flashchip *flash);
426int erase_29f040b(struct flashchip *flash);
427int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000428
Dominik Geyerb46acba2008-05-16 12:55:55 +0000429/* ichspi.c */
430int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
431int ich_spi_read(struct flashchip *flash, uint8_t * buf);
432int ich_spi_write(struct flashchip *flash, uint8_t * buf);
433
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000434/* it87spi.c */
435extern uint16_t it8716f_flashport;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000436int it87xx_probe_spi_flash(const char *name);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000437int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
438int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
439int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
440void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
441
Uwe Hermann0846f892007-08-23 13:34:59 +0000442/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000443uint8_t oddparity(uint8_t val);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000444void toggle_ready_jedec(volatile uint8_t *dst);
445void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
446void unprotect_jedec(volatile uint8_t *bios);
447void protect_jedec(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000448int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
449 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000450int probe_jedec(struct flashchip *flash);
451int erase_chip_jedec(struct flashchip *flash);
452int write_jedec(struct flashchip *flash, uint8_t *buf);
453int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
454int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
455int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
456 volatile uint8_t *dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000457
458/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000459int probe_m29f400bt(struct flashchip *flash);
460int erase_m29f400bt(struct flashchip *flash);
461int block_erase_m29f400bt(volatile uint8_t *bios,
Uwe Hermann0846f892007-08-23 13:34:59 +0000462 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000463int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000464int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000465void toggle_ready_m29f400bt(volatile uint8_t *dst);
466void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
467void protect_m29f400bt(volatile uint8_t *bios);
468void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
469 volatile uint8_t *dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000470
471/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000472int probe_29f002(struct flashchip *flash);
473int erase_29f002(struct flashchip *flash);
474int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000475
Nikolay Petukhov4784c472008-05-17 01:08:58 +0000476/* pm49fl00x.c */
477int probe_49fl00x(struct flashchip *flash);
478int erase_49fl00x(struct flashchip *flash);
479int write_49fl00x(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000480
481/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000482int probe_lhf00l04(struct flashchip *flash);
483int erase_lhf00l04(struct flashchip *flash);
484int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
485void toggle_ready_lhf00l04(volatile uint8_t *dst);
486void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
487void protect_lhf00l04(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000488
489/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000490int probe_28sf040(struct flashchip *flash);
491int erase_28sf040(struct flashchip *flash);
492int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000493
494/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000495int probe_39sf020(struct flashchip *flash);
496int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000497
498/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000499int erase_49lf040(struct flashchip *flash);
500int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000501
502/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000503int probe_49lfxxxc(struct flashchip *flash);
504int erase_49lfxxxc(struct flashchip *flash);
505int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000506
507/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000508int probe_sst_fwhub(struct flashchip *flash);
509int erase_sst_fwhub(struct flashchip *flash);
510int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000511
Stefan Reinauerac378972008-03-17 22:59:40 +0000512/* w39V080fa.c */
513int probe_winbond_fwhub(struct flashchip *flash);
514int erase_winbond_fwhub(struct flashchip *flash);
515int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
516
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000517/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000518int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000519
Uwe Hermann0846f892007-08-23 13:34:59 +0000520/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000521int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000522
Claus Gindharta7b35512008-04-28 17:51:09 +0000523/* stm50flw0x0x.c */
524int probe_stm50flw0x0x(struct flashchip *flash);
525int erase_stm50flw0x0x(struct flashchip *flash);
526int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000527
Ollie Lho761bf1b2004-03-20 16:46:10 +0000528#endif /* !__FLASH_H__ */