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Adam Kaufman064b1f22007-02-06 19:47:50 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Adam Kaufman064b1f22007-02-06 19:47:50 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
Adam Kaufman064b1f22007-02-06 19:47:50 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Adam Kaufman064b1f22007-02-06 19:47:50 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Adam Kaufman064b1f22007-02-06 19:47:50 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Adam Kaufman064b1f22007-02-06 19:47:50 +000021 */
22
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
Adam Kaufman064b1f22007-02-06 19:47:50 +000026#if defined(__GLIBC__)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#include <sys/io.h>
Adam Kaufman064b1f22007-02-06 19:47:50 +000028#endif
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#include <unistd.h>
Ollie Lho184a4042005-11-26 21:55:36 +000030#include <stdint.h>
Uwe Hermann0846f892007-08-23 13:34:59 +000031#include <stdio.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
Andriy Gapon65c1b862008-05-22 13:22:45 +000033#ifdef __FreeBSD__
34 #include <machine/cpufunc.h>
35 #define off64_t off_t
36 #define lseek64 lseek
37 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
38 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
39 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
40 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
41 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
42 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
43#else
44 #define OUTB outb
45 #define OUTW outw
46 #define OUTL outl
47 #define INB inb
48 #define INW inw
49 #define INL inl
50#endif
51
Uwe Hermanne5ac1642008-03-12 11:54:51 +000052#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
53
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000054struct flashchip {
Uwe Hermann76158682008-03-14 23:55:58 +000055 const char *vendor;
Uwe Hermann372eeb52007-12-04 21:49:06 +000056 const char *name;
Uwe Hermann394131e2008-10-18 21:14:13 +000057 /*
58 * With 32bit manufacture_id and model_id we can cover IDs up to
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000059 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
60 * Identification code.
61 */
62 uint32_t manufacture_id;
63 uint32_t model_id;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000064
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000065 int total_size;
66 int page_size;
67
Uwe Hermann394131e2008-10-18 21:14:13 +000068 /*
69 * Indicate if flashrom has been tested with this flash chip and if
Peter Stuge1159d582008-05-03 04:34:37 +000070 * everything worked correctly.
71 */
72 uint32_t tested;
73
Uwe Hermann0b7afe62007-04-01 19:44:21 +000074 int (*probe) (struct flashchip *flash);
75 int (*erase) (struct flashchip *flash);
76 int (*write) (struct flashchip *flash, uint8_t *buf);
77 int (*read) (struct flashchip *flash, uint8_t *buf);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000078
Uwe Hermann372eeb52007-12-04 21:49:06 +000079 /* Some flash devices have an additional register space. */
Stefan Reinauerce532972007-05-23 17:20:56 +000080 volatile uint8_t *virtual_memory;
81 volatile uint8_t *virtual_registers;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000082};
83
Peter Stuge1159d582008-05-03 04:34:37 +000084#define TEST_UNTESTED 0
85
86#define TEST_OK_PROBE (1<<0)
87#define TEST_OK_READ (1<<1)
88#define TEST_OK_ERASE (1<<2)
89#define TEST_OK_WRITE (1<<3)
Mart Raudsepp1d3b0632008-05-27 23:51:55 +000090#define TEST_OK_PR (TEST_OK_PROBE|TEST_OK_READ)
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +000091#define TEST_OK_PREW (TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +000092#define TEST_OK_MASK 0x0f
93
94#define TEST_BAD_PROBE (1<<4)
95#define TEST_BAD_READ (1<<5)
96#define TEST_BAD_ERASE (1<<6)
97#define TEST_BAD_WRITE (1<<7)
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +000098#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE)
Peter Stuge1159d582008-05-03 04:34:37 +000099#define TEST_BAD_MASK 0xf0
100
Ollie Lho184a4042005-11-26 21:55:36 +0000101extern struct flashchip flashchips[];
102
Uwe Hermann372eeb52007-12-04 21:49:06 +0000103/*
104 * Please keep this list sorted alphabetically by manufacturer. The first
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000105 * entry of each section should be the manufacturer ID, followed by the
106 * list of devices from that manufacturer (sorted by device IDs).
Uwe Hermann372eeb52007-12-04 21:49:06 +0000107 *
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000108 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
109 * continuation code.
Carl-Daniel Hailfinger6a0a25c2008-11-28 23:45:27 +0000110 * SPI parts have 16-bit device IDs if they support RDID.
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000111 */
112
Carl-Daniel Hailfingere973b052008-01-04 16:22:09 +0000113#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
114
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000115#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000116
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000117#define AMD_ID 0x01 /* AMD */
Mats Erik Anderssoncbfed282008-10-07 12:21:12 +0000118#define AM_29F002BT 0xB0
119#define AM_29F002BB 0x34
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000120#define AM_29F040B 0xA4
Peter Lemenkov220e26b2007-10-25 04:11:11 +0000121#define AM_29LV040B 0x4F
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000122#define AM_29F016D 0xAD
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000123
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000124#define AMIC_ID 0x7F37 /* AMIC */
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000125#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Rudolf Marekdcf46532008-05-22 13:42:23 +0000126#define AMIC_A25L40P 0x2013
Carl-Daniel Hailfinger8b114392008-07-06 23:04:01 +0000127#define AMIC_A29002B 0x0d
128#define AMIC_A29002T 0x8c
129#define AMIC_A29040B 0x86
Jens Kuehnelb9f61742008-06-18 13:36:34 +0000130#define AMIC_A49LF040A 0x9d
Peter Lemenkov539478d2007-10-22 20:36:16 +0000131
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000132#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000133#define ASD_AE49F2008 0x52
Stefan Reinaueref54aba2006-11-21 23:51:08 +0000134
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000135#define ATMEL_ID 0x1F /* Atmel */
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000136#define AT_25DF021 0x4300
137#define AT_25DF041A 0x4401
138#define AT_25DF081 0x4502
139#define AT_25DF161 0x4602
140#define AT_25DF321 0x4700 /* also 26DF321 */
141#define AT_25DF321A 0x4701
142#define AT_25DF641 0x4800
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000143#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
144#define AT_25F512B 0x6500
145#define AT_25FS010 0x6601
146#define AT_25FS040 0x6604
Carl-Daniel Hailfinger4e84dfb2008-05-14 04:27:02 +0000147#define AT_26DF041 0x4400
148#define AT_26DF081 0x4500 /* guessed, no datasheet available */
149#define AT_26DF081A 0x4501
150#define AT_26DF161 0x4600
151#define AT_26DF161A 0x4601
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000152#define AT_26DF321 0x4700 /* also 25DF321 */
153#define AT_26F004 0x0400
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000154#define AT_29C040A 0xA4
Uwe Hermannd7f48062007-04-28 02:22:59 +0000155#define AT_29C020 0xDA
Carl-Daniel Hailfingerd54ef6e2008-11-15 13:55:43 +0000156#define AT_45BR3214B /* No ID available */
157#define AT_45CS1282 0x2920
158#define AT_45D011 /* No ID available */
159#define AT_45D021A /* No ID available */
160#define AT_45D041A /* No ID available */
161#define AT_45D081A /* No ID available */
162#define AT_45D161 /* No ID available */
163#define AT_45DB011 /* No ID available */
164#define AT_45DB011B /* No ID available */
165#define AT_45DB011D 0x2200
166#define AT_45DB021A /* No ID available */
167#define AT_45DB021B /* No ID available */
168#define AT_45DB021D 0x2300
169#define AT_45DB041A /* No ID available */
170#define AT_45DB041D 0x2400
171#define AT_45DB081A /* No ID available */
172#define AT_45DB081D 0x2500
173#define AT_45DB161 /* No ID available */
174#define AT_45DB161B /* No ID available */
175#define AT_45DB161D 0x2600
176#define AT_45DB321 /* No ID available */
177#define AT_45DB321B /* No ID available */
178#define AT_45DB321C 0x2700
179#define AT_45DB321D 0x2701 /* Buggy data sheet */
180#define AT_45DB642 /* No ID available */
181#define AT_45DB642D 0x2800
Frederico Silva4bcf1752007-12-10 16:57:59 +0000182#define AT_49F002N 0x07 /* for AT49F002(N) */
183#define AT_49F002NT 0x08 /* for AT49F002(N)T */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000184
Peter Lemenkov539478d2007-10-22 20:36:16 +0000185#define CATALYST_ID 0x31 /* Catalyst */
186
Uwe Hermann394131e2008-10-18 21:14:13 +0000187#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000188#define EMST_F49B002UA 0x00
189
Uwe Hermann372eeb52007-12-04 21:49:06 +0000190/*
191 * EN25 chips are SPI, first byte of device ID is memory type,
192 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000193 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
194 * is the continuation code for IDs in bank 2.
195 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
196 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
197 * Let's hope they are not manufacturing SPI flash chips as well.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000198 */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000199#define EON_ID 0x7F1C /* EON Silicon Devices */
200#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000201#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
202#define EN_25B10 0x2011
203#define EN_25B20 0x2012
204#define EN_25B40 0x2013
205#define EN_25B80 0x2014
206#define EN_25B16 0x2015
207#define EN_25B32 0x2016
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000208#define EN_29F512 0x7F21
209#define EN_29F010 0x7F20
210#define EN_29F040A 0x7F04
211#define EN_29LV010 0x7F6E
212#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger2736e322007-12-31 14:05:08 +0000213#define EN_29F002T 0x7F92
214#define EN_29F002B 0x7F97
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000215
Peter Lemenkov539478d2007-10-22 20:36:16 +0000216#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000217#define MBM29F400BC 0xAB
218#define MBM29F400TC 0x23
219#define MBM29F004BC 0x7B
220#define MBM29F004TC 0x77
Peter Lemenkov539478d2007-10-22 20:36:16 +0000221
222#define HYUNDAI_ID 0xAD /* Hyundai */
223
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000224#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
225#define IM_29F004B 0xAE
226#define IM_29F004T 0xAF
Peter Lemenkov539478d2007-10-22 20:36:16 +0000227
228#define INTEL_ID 0x89 /* Intel */
229
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000230#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000231
Uwe Hermann372eeb52007-12-04 21:49:06 +0000232/*
233 * MX25 chips are SPI, first byte of device ID is memory type,
234 * second byte of device ID is log(bitsize)-9.
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000235 * Generalplus SPI chips seem to be compatible with Macronix
236 * and use the same set of IDs.
Uwe Hermann372eeb52007-12-04 21:49:06 +0000237 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000238#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000239#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
240#define MX_25L1005 0x2011
241#define MX_25L2005 0x2012
242#define MX_25L4005 0x2013 /* MX25L4005{,A} */
243#define MX_25L8005 0x2014
244#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
245#define MX_25L3205 0x2016 /* MX25L3205{,A} */
246#define MX_25L6405 0x2017 /* MX25L3205{,D} */
247#define MX_25L1635D 0x2415
248#define MX_25L3235D 0x2416
Carl-Daniel Hailfinger1c2ec282008-11-04 12:11:12 +0000249#define MX_29F002B 0x34
250#define MX_29F002T 0xB0
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000251
Uwe Hermann394131e2008-10-18 21:14:13 +0000252/*
253 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
254 * have a 0x7F continuation code prefix.
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000255 */
Carl-Daniel Hailfinger1263d2a2008-02-06 22:07:58 +0000256#define PMC_ID 0x7F9D /* PMC */
257#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
258#define PMC_25LV512 0x7B
259#define PMC_25LV010 0x7C
260#define PMC_25LV020 0x7D
261#define PMC_25LV040 0x7E
262#define PMC_25LV080B 0x13
263#define PMC_25LV016B 0x14
264#define PMC_39LV512 0x1B
265#define PMC_39F010 0x1C /* also Pm39LV010 */
266#define PMC_39LV020 0x3D
267#define PMC_39LV040 0x3E
268#define PMC_39F020 0x4D
269#define PMC_39F040 0x4E
Peter Lemenkov539478d2007-10-22 20:36:16 +0000270#define PMC_49FL002 0x6D
271#define PMC_49FL004 0x6E
272
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000273#define SHARP_ID 0xB0 /* Sharp */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000274#define SHARP_LHF00L04 0xCF
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000275
Uwe Hermann372eeb52007-12-04 21:49:06 +0000276/*
Peter Stuge10e091b2008-01-25 01:52:45 +0000277 * Spansion was previously a joint venture of AMD and Fujitsu.
278 * S25 chips are SPI. The first device ID byte is memory type and
279 * the second device ID byte is memory capacity.
280 */
281#define SPANSION_ID 0x01 /* Spansion */
282#define SPANSION_S25FL016A 0x0214
283
284/*
Uwe Hermann372eeb52007-12-04 21:49:06 +0000285 * SST25 chips are SPI, first byte of device ID is memory type, second
286 * byte of device ID is related to log(bitsize) at least for some chips.
287 */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000288#define SST_ID 0xBF /* SST */
Carl-Daniel Hailfinger5b1c6ed2007-10-22 16:15:28 +0000289#define SST_25WF512 0x2501
290#define SST_25WF010 0x2502
291#define SST_25WF020 0x2503
292#define SST_25WF040 0x2504
293#define SST_25VF016B 0x2541
294#define SST_25VF032B 0x254A
295#define SST_25VF040B 0x258D
296#define SST_25VF080B 0x258E
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000297#define SST_27SF512 0xA4
298#define SST_27SF010 0xA5
299#define SST_27SF020 0xA6
300#define SST_27VF010 0xA9
301#define SST_27VF020 0xAA
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000302#define SST_28SF040 0x04
Carl-Daniel Hailfinger07202922008-05-15 03:24:43 +0000303#define SST_29EE512 0x5D
304#define SST_29EE010 0x07
305#define SST_29LE010 0x08 /* also SST29VE010 */
306#define SST_29EE020A 0x10
307#define SST_29LE020 0x12 /* also SST29VE020 */
308#define SST_29SF020 0x24
309#define SST_29VF020 0x25
310#define SST_29SF040 0x13
311#define SST_29VF040 0x14
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000312#define SST_39SF010 0xB5
313#define SST_39SF020 0xB6
314#define SST_39SF040 0xB7
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000315#define SST_39VF512 0xD4
316#define SST_39VF010 0xD5
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000317#define SST_39VF020 0xD6
Carl-Daniel Hailfinger78c6dfe2008-05-12 14:25:31 +0000318#define SST_39VF040 0xD7
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000319#define SST_49LF040B 0x50
320#define SST_49LF040 0x51
321#define SST_49LF020A 0x52
322#define SST_49LF080A 0x5B
323#define SST_49LF002A 0x57
324#define SST_49LF003A 0x1B
325#define SST_49LF004A 0x60
326#define SST_49LF008A 0x5A
327#define SST_49LF004C 0x54
328#define SST_49LF008C 0x59
329#define SST_49LF016C 0x5C
330#define SST_49LF160C 0x4C
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000331
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000332/*
333 * ST25P chips are SPI, first byte of device ID is memory type, second
334 * byte of device ID is related to log(bitsize) at least for some chips.
335 */
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +0000336#define ST_ID 0x20 /* ST / SGS/Thomson */
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000337#define ST_M25P05A 0x2010
338#define ST_M25P10A 0x2011
339#define ST_M25P20 0x2012
340#define ST_M25P40 0x2013
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000341#define ST_M25P40_RES 0x12
Carl-Daniel Hailfingerf5df46f2007-12-16 21:15:27 +0000342#define ST_M25P80 0x2014
Carl-Daniel Hailfingerd8cc58c2007-12-17 22:22:40 +0000343#define ST_M25P16 0x2015
344#define ST_M25P32 0x2016
345#define ST_M25P64 0x2017
346#define ST_M25P128 0x2018
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000347#define ST_M50FLW040A 0x08
348#define ST_M50FLW040B 0x28
349#define ST_M50FLW080A 0x80
350#define ST_M50FLW080B 0x81
Carl-Daniel Hailfinger96e1b552008-11-02 14:25:11 +0000351#define ST_M50FW002 0x29
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000352#define ST_M50FW040 0x2C
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000353#define ST_M50FW080 0x2D
354#define ST_M50FW016 0x2E
355#define ST_M50LPW116 0x30
Uwe Hermannd7f48062007-04-28 02:22:59 +0000356#define ST_M29F002B 0x34
357#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000358#define ST_M29F400BT 0xD5
Uwe Hermannd7f48062007-04-28 02:22:59 +0000359#define ST_M29F040B 0xE2
Carl-Daniel Hailfingerf41c66f2007-07-25 17:55:45 +0000360#define ST_M29W010B 0x23
Carl-Daniel Hailfingere087fa22007-07-24 18:18:05 +0000361#define ST_M29W040B 0xE3
Ronald G. Minnich3c910ed2002-05-28 23:29:17 +0000362
Peter Lemenkov539478d2007-10-22 20:36:16 +0000363#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
Uwe Hermannaf2b52d2007-04-01 20:00:32 +0000364#define S29C51001T 0x01
365#define S29C51002T 0x02
366#define S29C51004T 0x03
367#define S29C31004T 0x63
Giampiero Giancipolia8c80822006-11-20 20:03:07 +0000368
Peter Lemenkov539478d2007-10-22 20:36:16 +0000369#define TI_ID 0x97 /* Texas Instruments */
370
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000371/*
372 * W25X chips are SPI, first byte of device ID is memory type, second
373 * byte of device ID is related to log(bitsize).
374 */
Peter Lemenkov539478d2007-10-22 20:36:16 +0000375#define WINBOND_ID 0xDA /* Winbond */
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000376#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
377#define W_25X10 0x3011
378#define W_25X20 0x3012
379#define W_25X40 0x3013
380#define W_25X80 0x3014
Peter Lemenkov539478d2007-10-22 20:36:16 +0000381#define W_29C011 0xC1
382#define W_29C020C 0x45
383#define W_29C040P 0x46
384#define W_29EE011 0xC1
385#define W_39V040FA 0x34
386#define W_39V040A 0x3D
387#define W_39V040B 0x54
388#define W_39V080A 0xD0
Stefan Reinauerac378972008-03-17 22:59:40 +0000389#define W_39V080FA 0xD3
390#define W_39V080FA_DM 0x93
Peter Lemenkov539478d2007-10-22 20:36:16 +0000391#define W_49F002U 0x0B
392#define W_49V002A 0xB0
393#define W_49V002FA 0x32
394
Uwe Hermann372eeb52007-12-04 21:49:06 +0000395/* udelay.c */
Stefan Reinauer70385642007-04-06 11:58:03 +0000396void myusec_delay(int time);
397void myusec_calibrate_delay();
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000398
Uwe Hermann372eeb52007-12-04 21:49:06 +0000399/* PCI handling for board/chipset_enable */
400struct pci_access *pacc;
Stefan Reinauer70385642007-04-06 11:58:03 +0000401struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000402struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
403 uint16_t card_vendor, uint16_t card_device);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000404
Uwe Hermann372eeb52007-12-04 21:49:06 +0000405/* board_enable.c */
406int board_flash_enable(const char *vendor, const char *part);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000407void print_supported_boards(void);
Adam Kaufman064b1f22007-02-06 19:47:50 +0000408
Uwe Hermann372eeb52007-12-04 21:49:06 +0000409/* chipset_enable.c */
410int chipset_flash_enable(void);
Uwe Hermanne5ac1642008-03-12 11:54:51 +0000411void print_supported_chipsets(void);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000412
Stefan Reinauer9a6d1762008-12-03 21:24:40 +0000413extern unsigned long flashbase;
414
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000415typedef enum {
416 BUS_TYPE_LPC,
417 BUS_TYPE_ICH7_SPI,
418 BUS_TYPE_ICH9_SPI,
419 BUS_TYPE_IT87XX_SPI,
Jason Wanga3f04be2008-11-28 21:36:51 +0000420 BUS_TYPE_SB600_SPI,
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000421 BUS_TYPE_VIA_SPI
422} flashbus_t;
423
424extern flashbus_t flashbus;
425extern void *spibar;
Adam Kaufman064b1f22007-02-06 19:47:50 +0000426
Uwe Hermann372eeb52007-12-04 21:49:06 +0000427/* Physical memory mapping device */
Adam Kaufman064b1f22007-02-06 19:47:50 +0000428#if defined (__sun) && (defined(__i386) || defined(__amd64))
429# define MEM_DEV "/dev/xsvc"
430#else
431# define MEM_DEV "/dev/mem"
432#endif
433
Stefan Reinauer70385642007-04-06 11:58:03 +0000434extern int fd_mem;
435
Uwe Hermann0846f892007-08-23 13:34:59 +0000436/* debug.c */
437extern int verbose;
438#define printf_debug(x...) { if (verbose) printf(x); }
439
440/* flashrom.c */
441int map_flash_registers(struct flashchip *flash);
442
443/* layout.c */
Peter Stuge7ffbc6f2008-06-18 02:08:40 +0000444int show_id(uint8_t *bios, int size, int force);
Uwe Hermann0846f892007-08-23 13:34:59 +0000445int read_romlayout(char *name);
446int find_romentry(char *name);
447int handle_romentries(uint8_t *buffer, uint8_t *content);
448
449/* lbtable.c */
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000450int coreboot_init(void);
Uwe Hermann0846f892007-08-23 13:34:59 +0000451extern char *lb_part, *lb_vendor;
452
Carl-Daniel Hailfinger00f911e2007-10-15 21:44:47 +0000453/* spi.c */
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000454int probe_spi_rdid(struct flashchip *flash);
Rudolf Marek48a85e42008-06-30 21:45:17 +0000455int probe_spi_rdid4(struct flashchip *flash);
Carl-Daniel Hailfinger14e50ac2008-11-28 01:25:00 +0000456int probe_spi_rems(struct flashchip *flash);
Carl-Daniel Hailfinger42c54972008-05-15 03:19:49 +0000457int probe_spi_res(struct flashchip *flash);
Uwe Hermann394131e2008-10-18 21:14:13 +0000458int spi_command(unsigned int writecnt, unsigned int readcnt,
459 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000460int spi_write_enable();
461int spi_write_disable();
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000462int spi_chip_erase_60(struct flashchip *flash);
Peter Stugefa8c5502008-05-10 23:07:52 +0000463int spi_chip_erase_c7(struct flashchip *flash);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000464int spi_chip_erase_60_c7(struct flashchip *flash);
Stefan Reinauer424ed222008-10-29 22:13:20 +0000465int spi_chip_erase_d8(struct flashchip *flash);
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000466int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
467int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
Peter Stugefa8c5502008-05-10 23:07:52 +0000468int spi_chip_write(struct flashchip *flash, uint8_t *buf);
469int spi_chip_read(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000470uint8_t spi_read_status_register();
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000471int spi_disable_blockprotect(void);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000472void spi_byte_program(int address, uint8_t byte);
Carl-Daniel Hailfinger598ec582008-11-18 00:41:02 +0000473int spi_nbyte_read(int address, uint8_t *bytes, int len);
Carl-Daniel Hailfingere1514992007-10-02 15:49:25 +0000474
Uwe Hermann0846f892007-08-23 13:34:59 +0000475/* 82802ab.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000476int probe_82802ab(struct flashchip *flash);
477int erase_82802ab(struct flashchip *flash);
478int write_82802ab(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000479
480/* am29f040b.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000481int probe_29f040b(struct flashchip *flash);
482int erase_29f040b(struct flashchip *flash);
483int write_29f040b(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000484
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000485/* en29f002a.c */
486int probe_en29f002a(struct flashchip *flash);
487int erase_en29f002a(struct flashchip *flash);
488int write_en29f002a(struct flashchip *flash, uint8_t *buf);
489
Dominik Geyerb46acba2008-05-16 12:55:55 +0000490/* ichspi.c */
Uwe Hermann394131e2008-10-18 21:14:13 +0000491int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
492 const unsigned char *writearr, unsigned char *readarr);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000493int ich_spi_read(struct flashchip *flash, uint8_t * buf);
494int ich_spi_write(struct flashchip *flash, uint8_t * buf);
495
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000496/* it87spi.c */
497extern uint16_t it8716f_flashport;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000498int it87xx_probe_spi_flash(const char *name);
Uwe Hermann394131e2008-10-18 21:14:13 +0000499int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
500 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000501int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
502int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000503
Jason Wanga3f04be2008-11-28 21:36:51 +0000504/* sb600spi.c */
505int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
506 const unsigned char *writearr, unsigned char *readarr);
507int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
508int sb600_spi_write(struct flashchip *flash, uint8_t *buf);
509uint8_t sb600_read_status_register(void);
510extern uint8_t volatile *sb600_spibar;
511
Uwe Hermann0846f892007-08-23 13:34:59 +0000512/* jedec.c */
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000513uint8_t oddparity(uint8_t val);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000514void toggle_ready_jedec(volatile uint8_t *dst);
515void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
516void unprotect_jedec(volatile uint8_t *bios);
517void protect_jedec(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000518int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
519 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000520int probe_jedec(struct flashchip *flash);
521int erase_chip_jedec(struct flashchip *flash);
522int write_jedec(struct flashchip *flash, uint8_t *buf);
523int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
524int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
525int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
526 volatile uint8_t *dst, unsigned int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000527
528/* m29f400bt.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000529int probe_m29f400bt(struct flashchip *flash);
530int erase_m29f400bt(struct flashchip *flash);
531int block_erase_m29f400bt(volatile uint8_t *bios,
Uwe Hermann0846f892007-08-23 13:34:59 +0000532 volatile uint8_t *dst);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000533int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000534int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf);
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000535void toggle_ready_m29f400bt(volatile uint8_t *dst);
536void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
537void protect_m29f400bt(volatile uint8_t *bios);
538void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
539 volatile uint8_t *dst, int page_size);
Uwe Hermann0846f892007-08-23 13:34:59 +0000540
541/* mx29f002.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000542int probe_29f002(struct flashchip *flash);
543int erase_29f002(struct flashchip *flash);
544int write_29f002(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000545
Nikolay Petukhov4784c472008-05-17 01:08:58 +0000546/* pm49fl00x.c */
547int probe_49fl00x(struct flashchip *flash);
548int erase_49fl00x(struct flashchip *flash);
549int write_49fl00x(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000550
551/* sharplhf00l04.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000552int probe_lhf00l04(struct flashchip *flash);
553int erase_lhf00l04(struct flashchip *flash);
554int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
555void toggle_ready_lhf00l04(volatile uint8_t *dst);
556void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
557void protect_lhf00l04(volatile uint8_t *bios);
Uwe Hermann0846f892007-08-23 13:34:59 +0000558
559/* sst28sf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000560int probe_28sf040(struct flashchip *flash);
561int erase_28sf040(struct flashchip *flash);
562int write_28sf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000563
564/* sst39sf020.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000565int probe_39sf020(struct flashchip *flash);
566int write_39sf020(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000567
568/* sst49lf040.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000569int erase_49lf040(struct flashchip *flash);
570int write_49lf040(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000571
572/* sst49lfxxxc.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000573int probe_49lfxxxc(struct flashchip *flash);
574int erase_49lfxxxc(struct flashchip *flash);
575int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000576
577/* sst_fwhub.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000578int probe_sst_fwhub(struct flashchip *flash);
579int erase_sst_fwhub(struct flashchip *flash);
580int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
Uwe Hermann0846f892007-08-23 13:34:59 +0000581
Peter Stugecce26822008-07-21 17:48:40 +0000582/* w39v040c.c */
583int probe_w39v040c(struct flashchip *flash);
584int erase_w39v040c(struct flashchip *flash);
585int write_w39v040c(struct flashchip *flash, uint8_t *buf);
586
Stefan Reinauerac378972008-03-17 22:59:40 +0000587/* w39V080fa.c */
588int probe_winbond_fwhub(struct flashchip *flash);
589int erase_winbond_fwhub(struct flashchip *flash);
590int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf);
591
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000592/* w29ee011.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000593int probe_w29ee011(struct flashchip *flash);
Markus Boasd2ac6fc2007-08-30 10:17:50 +0000594
Uwe Hermann0846f892007-08-23 13:34:59 +0000595/* w49f002u.c */
Uwe Hermanna0cc53d2007-09-09 20:24:29 +0000596int write_49f002(struct flashchip *flash, uint8_t *buf);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000597
Claus Gindharta7b35512008-04-28 17:51:09 +0000598/* stm50flw0x0x.c */
599int probe_stm50flw0x0x(struct flashchip *flash);
600int erase_stm50flw0x0x(struct flashchip *flash);
601int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000602
Ollie Lho761bf1b2004-03-20 16:46:10 +0000603#endif /* !__FLASH_H__ */