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Nico Huber83693c82016-10-08 22:17:55 +02001--
Nico Huber3d06de82018-05-29 01:35:04 +02002-- Copyright (C) 2015-2018 secunet Security Networks AG
Nico Huber83693c82016-10-08 22:17:55 +02003--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15private package HW.GFX.GMA.Config
16with
Nico Huber318bca12018-06-09 19:22:52 +020017 Initializes => (Valid_Port, Raw_Clock)
Nico Huber83693c82016-10-08 22:17:55 +020018is
19
Nico Huber6621a142018-06-07 23:56:54 +020020 Gen : constant Generation := <<GEN>>;
21
Nico Huberd7809ab2018-06-10 15:44:23 +020022 CPU_First : constant CPU_Type :=
23 (case Gen is
24 when G45 => G45,
25 when Ironlake => Ironlake,
26 when Haswell => Haswell,
27 when Broxton => Broxton,
28 when Skylake => Skylake);
29 CPU_Last : constant CPU_Type :=
30 (case Gen is
31 when G45 => G45,
32 when Ironlake => Ivybridge,
33 when Haswell => Broadwell,
34 when Broxton => Broxton,
35 when Skylake => Skylake);
36 CPU_Var_Last : constant CPU_Variant :=
37 (case Gen is
38 when Haswell | Skylake => ULT,
39 when others => Normal);
40 subtype Gen_CPU_Type is CPU_Type range CPU_First .. CPU_Last;
41 subtype Gen_CPU_Variant is CPU_Variant range Normal .. CPU_Var_Last;
Nico Huber83693c82016-10-08 22:17:55 +020042
Nico Huberd7809ab2018-06-10 15:44:23 +020043 CPU : constant Gen_CPU_Type := <<CPU>>;
44
45 CPU_Var : constant Gen_CPU_Variant := <<CPU_VARIANT>>;
Nico Huber83693c82016-10-08 22:17:55 +020046
47 Internal_Display : constant Internal_Type := <<INTERNAL_PORT>>;
48
Nico Huberd55afeb2016-10-21 14:31:10 +020049 Analog_I2C_Port : constant PCH_Port := <<ANALOG_I2C_PORT>>;
50
Nico Huber83693c82016-10-08 22:17:55 +020051 EDP_Low_Voltage_Swing : constant Boolean := False;
52
Nico Huber247adf32017-06-12 14:39:11 +020053 DDI_HDMI_Buffer_Translation : constant Integer := -1;
54
Nico Huber83693c82016-10-08 22:17:55 +020055 Default_MMIO_Base : constant := <<DEFAULT_MMIO_BASE>>;
56
57 LVDS_Dual_Threshold : constant := 95_000_000;
58
59 ----------------------------------------------------------------------------
60
Nico Huber6621a142018-06-07 23:56:54 +020061 Gen_G45 : constant Boolean := Gen = G45;
62 Gen_Ironlake : constant Boolean := Gen = Ironlake;
63 Gen_Haswell : constant Boolean := Gen = Haswell;
64 Gen_Broxton : constant Boolean := Gen = Broxton;
65 Gen_Skylake : constant Boolean := Gen = Skylake;
66
67 Up_To_Ironlake : constant Boolean := Gen <= Ironlake;
68 Ironlake_On : constant Boolean := Gen >= Ironlake;
69 Haswell_On : constant Boolean := Gen >= Haswell;
70 Broxton_On : constant Boolean := Gen >= Broxton;
71 Skylake_On : constant Boolean := Gen >= Skylake;
72
Nico Huber998ee2b2018-06-12 23:02:17 +020073 CPU_Ironlake : constant Boolean := Gen_Ironlake and then CPU = Ironlake;
74 CPU_Sandybridge : constant Boolean := Gen_Ironlake and then CPU = Sandybridge;
75 CPU_Ivybridge : constant Boolean := Gen_Ironlake and then CPU = Ivybridge;
76 CPU_Haswell : constant Boolean := Gen_Haswell and then CPU = Haswell;
77 CPU_Broadwell : constant Boolean := Gen_Haswell and then CPU = Broadwell;
78
79 Sandybridge_On : constant Boolean :=
80 ((Gen_Ironlake and then CPU >= Sandybridge) or Haswell_On);
81 Ivybridge_On : constant Boolean :=
82 ((Gen_Ironlake and then CPU >= Ivybridge) or Haswell_On);
83 Broadwell_On : constant Boolean :=
84 ((Gen_Haswell and then CPU >= Broadwell) or Broxton_On);
85
Nico Huber6621a142018-06-07 23:56:54 +020086 ----------------------------------------------------------------------------
87
Nico Huber117db372018-06-09 17:56:05 +020088 Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation >= 0;
Nico Huber2b6f6992017-07-09 18:11:34 +020089 Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0;
90
Nico Huber83693c82016-10-08 22:17:55 +020091 Has_Internal_Display : constant Boolean := Internal_Display /= None;
Nico Huber318bca12018-06-09 19:22:52 +020092 Internal_Is_LVDS : constant Boolean := Internal_Display = LVDS;
Nico Huber83693c82016-10-08 22:17:55 +020093 Internal_Is_EDP : constant Boolean := Internal_Display = DP;
Nico Huber1bc496f2017-06-09 22:23:28 +020094 Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC;
Nico Huber6621a142018-06-07 23:56:54 +020095 Has_Presence_Straps : constant Boolean := not Gen_Broxton;
Nico Huber998ee2b2018-06-12 23:02:17 +020096 Is_ULT : constant Boolean :=
97 ((Gen_Haswell or Gen_Skylake) and then CPU_Var = ULT);
Nico Huber83693c82016-10-08 22:17:55 +020098
99 ----- CPU pipe: --------
Nico Huber998ee2b2018-06-12 23:02:17 +0200100 Has_Tertiary_Pipe : constant Boolean := Ivybridge_On;
Nico Huber6621a142018-06-07 23:56:54 +0200101 Disable_Trickle_Feed : constant Boolean := not Gen_Haswell;
Nico Huber998ee2b2018-06-12 23:02:17 +0200102 Pipe_Enabled_Workaround : constant Boolean := CPU_Broadwell;
Nico Huber6621a142018-06-07 23:56:54 +0200103 Has_EDP_Transcoder : constant Boolean := Haswell_On;
Nico Huber998ee2b2018-06-12 23:02:17 +0200104 Use_PDW_For_EDP_Scaling : constant Boolean := CPU_Haswell;
Nico Huber6621a142018-06-07 23:56:54 +0200105 Has_Pipe_DDI_Func : constant Boolean := Haswell_On;
106 Has_Trans_Clk_Sel : constant Boolean := Haswell_On;
107 Has_Pipe_MSA_Misc : constant Boolean := Haswell_On;
Nico Huber998ee2b2018-06-12 23:02:17 +0200108 Has_Pipeconf_Misc : constant Boolean := Broadwell_On;
109 Has_Pipeconf_BPC : constant Boolean := not CPU_Haswell;
Nico Huber6621a142018-06-07 23:56:54 +0200110 Has_Plane_Control : constant Boolean := Broxton_On;
111 Has_DSP_Linoff : constant Boolean := Up_To_Ironlake;
Nico Huber998ee2b2018-06-12 23:02:17 +0200112 Has_PF_Pipe_Select : constant Boolean := CPU_Ivybridge or CPU_Haswell;
113 Has_Cursor_FBC_Control : constant Boolean := Ivybridge_On;
114 VGA_Plane_Workaround : constant Boolean := CPU_Ivybridge;
Nico Huber6621a142018-06-07 23:56:54 +0200115 Has_GMCH_DP_Transcoder : constant Boolean := Gen_G45;
116 Has_GMCH_VGACNTRL : constant Boolean := Gen_G45;
117 Has_GMCH_PFIT_CONTROL : constant Boolean := Gen_G45;
Nico Huber83693c82016-10-08 22:17:55 +0200118
119 ----- Panel power: -----
Nico Huber6621a142018-06-07 23:56:54 +0200120 Has_PP_Write_Protection : constant Boolean := Up_To_Ironlake;
121 Has_PP_Port_Select : constant Boolean := Up_To_Ironlake;
122 Use_PP_VDD_Override : constant Boolean := Up_To_Ironlake;
123 Has_PCH_Panel_Power : constant Boolean := Ironlake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200124
125 ----- PCH/FDI: ---------
Nico Huber6621a142018-06-07 23:56:54 +0200126 Has_PCH : constant Boolean := not Gen_Broxton and not Gen_G45;
Nico Huber998ee2b2018-06-12 23:02:17 +0200127 Has_PCH_DAC : constant Boolean :=
128 (Gen_Ironlake or (Gen_Haswell and then not Is_ULT));
Nico Huber83693c82016-10-08 22:17:55 +0200129
Nico Huber6621a142018-06-07 23:56:54 +0200130 Has_PCH_Aux_Channels : constant Boolean := Gen_Ironlake or Gen_Haswell;
Nico Huber83693c82016-10-08 22:17:55 +0200131
Nico Huber6621a142018-06-07 23:56:54 +0200132 VGA_Has_Sync_Disable : constant Boolean := Up_To_Ironlake;
Nico Huber83693c82016-10-08 22:17:55 +0200133
Nico Huber998ee2b2018-06-12 23:02:17 +0200134 Has_Trans_Timing_Ovrrde : constant Boolean := Sandybridge_On;
Nico Huber83693c82016-10-08 22:17:55 +0200135
Nico Huber6621a142018-06-07 23:56:54 +0200136 Has_DPLL_SEL : constant Boolean := Gen_Ironlake;
137 Has_FDI_BPC : constant Boolean := Gen_Ironlake;
Nico Huber998ee2b2018-06-12 23:02:17 +0200138 Has_FDI_Composite_Sel : constant Boolean := CPU_Ivybridge;
139 Has_New_FDI_Sink : constant Boolean := Sandybridge_On;
140 Has_New_FDI_Source : constant Boolean := Ivybridge_On;
141 Has_Trans_DP_Ctl : constant Boolean := CPU_Sandybridge or CPU_Ivybridge;
142 Has_FDI_C : constant Boolean := CPU_Ivybridge;
Nico Huber83693c82016-10-08 22:17:55 +0200143
Nico Huber6621a142018-06-07 23:56:54 +0200144 Has_FDI_RX_Power_Down : constant Boolean := Gen_Haswell;
Nico Huber83693c82016-10-08 22:17:55 +0200145
Nico Huber6621a142018-06-07 23:56:54 +0200146 Has_GMCH_RawClk : constant Boolean := Gen_G45;
Arthur Heymans73ea0322018-03-28 17:17:07 +0200147
Nico Huber83693c82016-10-08 22:17:55 +0200148 ----- DDI: -------------
Nico Huber6621a142018-06-07 23:56:54 +0200149 End_EDP_Training_Late : constant Boolean := Gen_Haswell;
150 Has_Per_DDI_Clock_Sel : constant Boolean := Gen_Haswell;
151 Has_HOTPLUG_CTL : constant Boolean := Gen_Haswell;
Nico Huber998ee2b2018-06-12 23:02:17 +0200152 Has_SHOTPLUG_CTL_A : constant Boolean :=
153 ((Gen_Haswell and then Is_ULT) or Skylake_On);
Nico Huber83693c82016-10-08 22:17:55 +0200154
Nico Huber6621a142018-06-07 23:56:54 +0200155 Has_DDI_PHYs : constant Boolean := Gen_Broxton;
Nico Huber19729a72017-07-30 01:05:05 +0200156
Nico Huber998ee2b2018-06-12 23:02:17 +0200157 Has_DDI_D : constant Boolean :=
158 ((Gen_Haswell or Gen_Skylake) and then not Is_ULT);
Nico Huber907e4152017-07-29 21:18:59 +0200159 Has_DDI_E : constant Boolean := -- might be disabled by x4 eDP
160 Has_DDI_D;
Nico Huber83693c82016-10-08 22:17:55 +0200161
Nico Huber6621a142018-06-07 23:56:54 +0200162 Has_DDI_Buffer_Trans : constant Boolean := Haswell_On and
163 not Gen_Broxton;
164 Has_Low_Voltage_Swing : constant Boolean := Broxton_On;
165 Has_Iboost_Config : constant Boolean := Skylake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200166
167 Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
168
Nico Huber1c3b9282017-02-09 13:57:04 +0100169 ----- GMBUS: -----------
Nico Huber6621a142018-06-07 23:56:54 +0200170 Ungate_GMBUS_Unit_Level : constant Boolean := Skylake_On;
171 GMBUS_Alternative_Pins : constant Boolean := Gen_Broxton;
172 Has_PCH_GMBUS : constant Boolean := Ironlake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200173
174 ----- Power: -----------
Nico Huber998ee2b2018-06-12 23:02:17 +0200175 Has_IPS : constant Boolean :=
176 (Gen_Haswell and then
177 ((CPU_Haswell and Is_ULT) or CPU_Broadwell));
178 Has_IPS_CTL_Mailbox : constant Boolean := CPU_Broadwell;
Nico Huber83693c82016-10-08 22:17:55 +0200179
Nico Huber998ee2b2018-06-12 23:02:17 +0200180 Has_Per_Pipe_SRD : constant Boolean := Broadwell_On;
Nico Huber83693c82016-10-08 22:17:55 +0200181
Nico Huber21da5742017-01-20 14:00:53 +0100182 ----- GTT: -------------
Nico Huber998ee2b2018-06-12 23:02:17 +0200183 Has_64bit_GTT : constant Boolean := Broadwell_On;
Nico Huber83693c82016-10-08 22:17:55 +0200184
185 ----------------------------------------------------------------------------
186
Nico Huber1b2c9a32016-11-20 03:42:08 +0100187 Max_Pipe : constant Pipe_Index :=
Nico Huberd58de7d2018-06-07 23:06:55 +0200188 (if Has_Tertiary_Pipe then Tertiary else Secondary);
Nico Huber83693c82016-10-08 22:17:55 +0200189
Nico Huber318bca12018-06-09 19:22:52 +0200190 Valid_Port : array (Port_Type) of Boolean := (others => False)
Nico Huber83693c82016-10-08 22:17:55 +0200191 with
192 Part_Of => GMA.Config_State;
Nico Huber83693c82016-10-08 22:17:55 +0200193
Nico Huberac455ad2017-02-14 14:41:19 +0100194 Last_Digital_Port : constant Digital_Port :=
Nico Huber208857d2017-07-29 21:30:24 +0200195 (if Has_DDI_E then DIGI_E else DIGI_C);
Nico Huberac455ad2017-02-14 14:41:19 +0100196
Nico Huber83693c82016-10-08 22:17:55 +0200197 ----------------------------------------------------------------------------
198
Nico Huber3c544ee2016-11-20 04:56:58 +0100199 type FDI_Per_Port is array (Port_Type) of Boolean;
200 Is_FDI_Port : constant FDI_Per_Port :=
Nico Huber6621a142018-06-07 23:56:54 +0200201 (Disabled => False,
202 Internal => Gen_Ironlake and Internal_Is_LVDS,
203 DP1 .. HDMI3 => Gen_Ironlake,
204 Analog => Has_PCH_DAC);
Nico Huber83693c82016-10-08 22:17:55 +0200205
206 type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count;
207 FDI_Lane_Count : constant FDI_Lanes_Per_Port :=
208 (DIGI_D => DP_Lane_Count_2,
Nico Huber6621a142018-06-07 23:56:54 +0200209 others => (if Gen_Ironlake then DP_Lane_Count_4 else DP_Lane_Count_2));
Nico Huber83693c82016-10-08 22:17:55 +0200210
211 FDI_Training : constant FDI_Training_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200212 (if CPU_Ironlake then Simple_Training
213 elsif CPU_Sandybridge then Full_Training
214 else Auto_Training);
Nico Huber83693c82016-10-08 22:17:55 +0200215
Nico Huberf54d0962016-10-20 14:17:18 +0200216 ----------------------------------------------------------------------------
217
Nico Huber247adf32017-06-12 14:39:11 +0200218 Default_DDI_HDMI_Buffer_Translation : constant DDI_HDMI_Buf_Trans_Range :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200219 (if CPU_Haswell then 6
220 elsif CPU_Broadwell then 7
221 elsif Broxton_On then 8
222 else 0);
Nico Huber247adf32017-06-12 14:39:11 +0200223
224 ----------------------------------------------------------------------------
225
Nico Huberabe3de22016-10-20 15:03:46 +0200226 Default_CDClk_Freq : constant Frequency_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200227 (if Gen_G45 then 320_000_000 -- unused
228 elsif CPU_Ironlake or Gen_Haswell then 450_000_000
229 elsif CPU_Sandybridge or CPU_Ivybridge then 400_000_000
230 elsif Gen_Broxton then 288_000_000
231 elsif Gen_Skylake then 337_500_000
232 else Frequency_Type'First);
Nico Huberabe3de22016-10-20 15:03:46 +0200233
Nico Huberf54d0962016-10-20 14:17:18 +0200234 Default_RawClk_Freq : constant Frequency_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200235 (if Gen_G45 then 100_000_000 -- unused, depends on FSB
236 elsif Gen_Ironlake then 125_000_000
237 elsif Gen_Haswell then (if Is_ULT then 24_000_000 else 125_000_000)
238 elsif Gen_Broxton then Frequency_Type'First -- none needed
239 elsif Gen_Skylake then 24_000_000
240 else Frequency_Type'First);
Nico Huberf54d0962016-10-20 14:17:18 +0200241
Arthur Heymansd1988d12018-03-28 16:27:57 +0200242 Raw_Clock : Frequency_Type := Default_RawClk_Freq
243 with Part_Of => GMA.Config_State;
244
Nico Huberdcd274b2016-11-03 20:15:39 +0100245 ----------------------------------------------------------------------------
246
247 -- Maximum source width with enabled scaler. This only accounts
248 -- for simple 1:1 pipe:scaler mappings.
249
Nico Huberc5c767a2018-06-03 01:09:04 +0200250 type Width_Per_Pipe is array (Pipe_Index) of Width_Type;
Nico Huberdcd274b2016-11-03 20:15:39 +0100251
252 Maximum_Scalable_Width : constant Width_Per_Pipe :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200253 (if Gen_G45 then -- TODO: Is this true?
254 (Primary => 4096,
255 Secondary => 2048,
256 Tertiary => Pos32'First)
257 elsif Gen_Ironlake or CPU_Haswell then
258 (Primary => 4096,
259 Secondary => 2048,
260 Tertiary => 2048)
261 else
262 (Primary => 4096,
263 Secondary => 4096,
264 Tertiary => 4096));
Nico Huberdcd274b2016-11-03 20:15:39 +0100265
Nico Hubera02b2c62018-01-09 15:58:34 +0100266 -- Maximum X position of hardware cursors
Nico Huber6621a142018-06-07 23:56:54 +0200267 Maximum_Cursor_X : constant := (case Gen is
268 when G45 .. Ironlake => 4095,
Nico Hubera02b2c62018-01-09 15:58:34 +0100269 when Haswell .. Skylake => 8191);
270
271 Maximum_Cursor_Y : constant := 4095;
272
Nico Huber74ec9622016-11-19 03:00:43 +0100273 ----------------------------------------------------------------------------
274
Nico Huber21da5742017-01-20 14:00:53 +0100275 -- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D
Nico Huber74ec9622016-11-19 03:00:43 +0100276 HDMI_Max_Clock_24bpp : constant Frequency_Type :=
Nico Huber6621a142018-06-07 23:56:54 +0200277 (if Haswell_On then 300_000_000 else 225_000_000);
Nico Huber74ec9622016-11-19 03:00:43 +0100278
Nico Huberb8ae6182017-07-15 20:03:56 +0200279 ----------------------------------------------------------------------------
280
Nico Huber0b2329a2018-06-09 21:14:27 +0200281 GTT_PTE_Size : constant := (if Has_64bit_GTT then 8 else 4);
Nico Huberb8ae6182017-07-15 20:03:56 +0200282
Nico Huber998ee2b2018-06-12 23:02:17 +0200283 Fence_Base : constant :=
284 (if not Sandybridge_On then 16#0000_3000# else 16#0010_0000#);
Nico Huberb03c8f12017-08-25 13:29:08 +0200285
Nico Huber998ee2b2018-06-12 23:02:17 +0200286 Fence_Count : constant :=
287 (if not Ivybridge_On then 16 else 32);
Nico Huberb03c8f12017-08-25 13:29:08 +0200288
Nico Hubere7ac6eb2017-09-04 23:54:13 +0200289 ----------------------------------------------------------------------------
290
291 use type HW.Word16;
292
293 function Is_Broadwell_H (Device_Id : Word16) return Boolean is
294 (Device_Id = 16#1612# or Device_Id = 16#1622# or Device_Id = 16#162a#);
295
296 function Is_Skylake_U (Device_Id : Word16) return Boolean is
297 (Device_Id = 16#1906# or Device_Id = 16#1916# or Device_Id = 16#1923# or
298 Device_Id = 16#1926# or Device_Id = 16#1927#);
299
300 -- Rather catch too much here than too little,
301 -- it's only used to distinguish generations.
302 function Is_GPU (Device_Id : Word16; CPU : CPU_Type; CPU_Var : CPU_Variant)
303 return Boolean is
304 (case CPU is
Arthur Heymans73ea0322018-03-28 17:17:07 +0200305 when G45 => (Device_Id and 16#ff02#) = 16#2e02# or
306 (Device_Id and 16#fffe#) = 16#2a42#,
Nico Hubere7ac6eb2017-09-04 23:54:13 +0200307 when Ironlake => (Device_Id and 16#fff3#) = 16#0042#,
308 when Sandybridge => (Device_Id and 16#ffc2#) = 16#0102#,
309 when Ivybridge => (Device_Id and 16#ffc3#) = 16#0142#,
310 when Haswell =>
311 (case CPU_Var is
312 when Normal => (Device_Id and 16#ffc3#) = 16#0402# or
313 (Device_Id and 16#ffc3#) = 16#0d02#,
314 when ULT => (Device_Id and 16#ffc3#) = 16#0a02#),
315 when Broadwell => ((Device_Id and 16#ffc3#) = 16#1602# or
316 (Device_Id and 16#ffcf#) = 16#160b# or
317 (Device_Id and 16#ffcf#) = 16#160d#) and
318 (case CPU_Var is
319 when Normal => Is_Broadwell_H (Device_Id),
320 when ULT => not Is_Broadwell_H (Device_Id)),
321 when Broxton => (Device_Id and 16#fffe#) = 16#5a84#,
322 when Skylake => ((Device_Id and 16#ffc3#) = 16#1902# or
323 (Device_Id and 16#ffcf#) = 16#190b# or
324 (Device_Id and 16#ffcf#) = 16#190d# or
325 (Device_Id and 16#fff9#) = 16#1921#) and
326 (case CPU_Var is
327 when Normal => not Is_Skylake_U (Device_Id),
328 when ULT => Is_Skylake_U (Device_Id)));
329
330 function Compatible_GPU (Device_Id : Word16) return Boolean is
331 (Is_GPU (Device_Id, CPU, CPU_Var));
332
Nico Huber83693c82016-10-08 22:17:55 +0200333end HW.GFX.GMA.Config;