gma dp aux: Program 2x bit clock divider
This setting exists for any platform before Skylake. Some have sane
defaults after reset, some don't. So we always set the correct divisor.
This makes external DP output work with coreboot on Ivy Bridge.
Change-Id: I91d8030a985cc35c7cf826c0276753137b5d6b77
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17072
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index cba1396..c3a5152 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -205,6 +205,15 @@
----------------------------------------------------------------------------
+ Default_CDClk_Freq : constant Frequency_Type :=
+ (case CPU is
+ when Ironlake |
+ Haswell |
+ Broadwell => 450_000_000,
+ when Sandybridge |
+ Ivybridge => 400_000_000,
+ when Skylake => 337_500_000);
+
Default_RawClk_Freq : constant Frequency_Type :=
(case CPU is
when Ironlake |