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Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2009 coresystems GmbH
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __PROGRAMMER_H__
25#define __PROGRAMMER_H__ 1
26
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027#include "flash.h" /* for chipaddr and flashctx */
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +000028
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000029enum programmer {
30#if CONFIG_INTERNAL == 1
31 PROGRAMMER_INTERNAL,
32#endif
33#if CONFIG_DUMMY == 1
34 PROGRAMMER_DUMMY,
35#endif
36#if CONFIG_NIC3COM == 1
37 PROGRAMMER_NIC3COM,
38#endif
39#if CONFIG_NICREALTEK == 1
40 PROGRAMMER_NICREALTEK,
Idwer Vollering004f4b72010-09-03 18:21:21 +000041#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000042#if CONFIG_NICNATSEMI == 1
43 PROGRAMMER_NICNATSEMI,
Idwer Vollering004f4b72010-09-03 18:21:21 +000044#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000045#if CONFIG_GFXNVIDIA == 1
46 PROGRAMMER_GFXNVIDIA,
47#endif
48#if CONFIG_DRKAISER == 1
49 PROGRAMMER_DRKAISER,
50#endif
51#if CONFIG_SATASII == 1
52 PROGRAMMER_SATASII,
53#endif
54#if CONFIG_ATAHPT == 1
55 PROGRAMMER_ATAHPT,
56#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000057#if CONFIG_FT2232_SPI == 1
58 PROGRAMMER_FT2232_SPI,
59#endif
60#if CONFIG_SERPROG == 1
61 PROGRAMMER_SERPROG,
62#endif
63#if CONFIG_BUSPIRATE_SPI == 1
64 PROGRAMMER_BUSPIRATE_SPI,
65#endif
66#if CONFIG_DEDIPROG == 1
67 PROGRAMMER_DEDIPROG,
68#endif
69#if CONFIG_RAYER_SPI == 1
70 PROGRAMMER_RAYER_SPI,
71#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +000072#if CONFIG_PONY_SPI == 1
73 PROGRAMMER_PONY_SPI,
74#endif
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +000075#if CONFIG_NICINTEL == 1
76 PROGRAMMER_NICINTEL,
77#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +000078#if CONFIG_NICINTEL_SPI == 1
79 PROGRAMMER_NICINTEL_SPI,
80#endif
Mark Marshall90021f22010-12-03 14:48:11 +000081#if CONFIG_OGP_SPI == 1
82 PROGRAMMER_OGP_SPI,
83#endif
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +000084#if CONFIG_SATAMV == 1
85 PROGRAMMER_SATAMV,
86#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +000087#if CONFIG_LINUX_SPI == 1
88 PROGRAMMER_LINUX_SPI,
89#endif
James Lairdc60de0e2013-03-27 13:00:23 +000090#if CONFIG_USBBLASTER_SPI == 1
91 PROGRAMMER_USBBLASTER_SPI,
92#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000093 PROGRAMMER_INVALID /* This must always be the last entry. */
94};
95
Stefan Tauneraf358d62012-12-27 18:40:26 +000096enum programmer_type {
97 PCI = 1, /* to detect uninitialized values */
98 USB,
99 OTHER,
100};
101
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000102struct dev_entry {
103 uint16_t vendor_id;
104 uint16_t device_id;
105 const enum test_state status;
106 const char *vendor_name;
107 const char *device_name;
108};
109
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000110struct programmer_entry {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000111 const char *name;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000112 const enum programmer_type type;
113 union {
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000114 const struct dev_entry *const dev;
Stefan Tauneraf358d62012-12-27 18:40:26 +0000115 const char *const note;
116 } devs;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000117
118 int (*init) (void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000119
Stefan Tauner305e0b92013-07-17 23:46:44 +0000120 void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000121 void (*unmap_flash_region) (void *virt_addr, size_t len);
122
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000123 void (*delay) (int usecs);
124};
125
126extern const struct programmer_entry programmer_table[];
127
Nico Huberbcb2e5a2012-12-30 01:23:17 +0000128int programmer_init(enum programmer prog, const char *param);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000129int programmer_shutdown(void);
130
131enum bitbang_spi_master_type {
132 BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
133#if CONFIG_RAYER_SPI == 1
134 BITBANG_SPI_MASTER_RAYER,
135#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000136#if CONFIG_PONY_SPI == 1
137 BITBANG_SPI_MASTER_PONY,
138#endif
Idwer Vollering004f4b72010-09-03 18:21:21 +0000139#if CONFIG_NICINTEL_SPI == 1
140 BITBANG_SPI_MASTER_NICINTEL,
141#endif
Carl-Daniel Hailfinger2f436162010-07-28 15:08:35 +0000142#if CONFIG_INTERNAL == 1
143#if defined(__i386__) || defined(__x86_64__)
144 BITBANG_SPI_MASTER_MCP,
145#endif
146#endif
Mark Marshall90021f22010-12-03 14:48:11 +0000147#if CONFIG_OGP_SPI == 1
148 BITBANG_SPI_MASTER_OGP,
149#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000150};
151
152struct bitbang_spi_master {
153 enum bitbang_spi_master_type type;
154
155 /* Note that CS# is active low, so val=0 means the chip is active. */
156 void (*set_cs) (int val);
157 void (*set_sck) (int val);
158 void (*set_mosi) (int val);
159 int (*get_miso) (void);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000160 void (*request_bus) (void);
161 void (*release_bus) (void);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000162 /* Length of half a clock period in usecs. */
163 unsigned int half_period;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000164};
165
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000166#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000167struct pci_dev;
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000168
169/* pcidev.c */
170// FIXME: These need to be local, not global
171extern uint32_t io_base_addr;
172extern struct pci_access *pacc;
173int pci_init_common(void);
174uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
175struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
176/* rpci_write_* are reversible writes. The original PCI config space register
177 * contents will be restored on shutdown.
178 */
179int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
180int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
181int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
182#endif
183
184#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000185struct penable {
186 uint16_t vendor_id;
187 uint16_t device_id;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000188 const enum test_state status;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000189 const char *vendor_name;
190 const char *device_name;
191 int (*doit) (struct pci_dev *dev, const char *name);
192};
193
194extern const struct penable chipset_enables[];
195
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000196enum board_match_phase {
197 P1,
198 P2,
199 P3
200};
201
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000202struct board_match {
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000203 /* Any device, but make it sensible, like the ISA bridge. */
204 uint16_t first_vendor;
205 uint16_t first_device;
206 uint16_t first_card_vendor;
207 uint16_t first_card_device;
208
209 /* Any device, but make it sensible, like
210 * the host bridge. May be NULL.
211 */
212 uint16_t second_vendor;
213 uint16_t second_device;
214 uint16_t second_card_vendor;
215 uint16_t second_card_device;
216
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000217 /* Pattern to match DMI entries. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000218 const char *dmi_pattern;
219
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000220 /* The vendor / part name from the coreboot table. May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000221 const char *lb_vendor;
222 const char *lb_part;
223
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000224 enum board_match_phase phase;
225
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000226 const char *vendor_name;
227 const char *board_name;
228
229 int max_rom_decode_parallel;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000230 const enum test_state status;
Stefan Tauner7bcacb12011-05-26 01:35:19 +0000231 int (*enable) (void); /* May be NULL. */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000232};
233
Carl-Daniel Hailfinger97d5b122011-08-31 16:19:50 +0000234extern const struct board_match board_matches[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000235
236struct board_info {
237 const char *vendor;
238 const char *name;
Stefan Tauner2c20b282012-07-28 19:35:26 +0000239 const enum test_state working;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000240#ifdef CONFIG_PRINT_WIKI
241 const char *url;
242 const char *note;
243#endif
244};
245
246extern const struct board_info boards_known[];
247extern const struct board_info laptops_known[];
248#endif
249
250/* udelay.c */
251void myusec_delay(int usecs);
252void myusec_calibrate_delay(void);
Maksim Kuleshov73dc0db2013-04-05 08:06:10 +0000253void internal_sleep(int usecs);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000254void internal_delay(int usecs);
255
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000256#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000257/* board_enable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000258int board_parse_parameter(const char *boardstring, const char **vendor, const char **model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000259void w836xx_ext_enter(uint16_t port);
260void w836xx_ext_leave(uint16_t port);
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000261void probe_superio_winbond(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000262int it8705f_write_enable(uint8_t port);
263uint8_t sio_read(uint16_t port, uint8_t reg);
264void sio_write(uint16_t port, uint8_t reg, uint8_t data);
265void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000266void board_handle_before_superio(void);
267void board_handle_before_laptop(void);
Stefan Taunerfa9fa712012-09-24 21:29:29 +0000268int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000269
270/* chipset_enable.c */
271int chipset_flash_enable(void);
272
273/* processor_enable.c */
274int processor_flash_enable(void);
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000275#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000276
277/* physmap.c */
Stefan Tauner305e0b92013-07-17 23:46:44 +0000278void *physmap(const char *descr, uintptr_t phys_addr, size_t len);
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000279void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len);
Niklas Söderlund5d307202013-09-14 09:02:27 +0000280void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000281void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000282void physunmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger43eac032014-03-05 00:16:16 +0000283void physunmap_unaligned(void *virt_addr, size_t len);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000284#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000285int setup_cpu_msr(int cpu);
286void cleanup_cpu_msr(void);
287
288/* cbtable.c */
Stefan Taunerb4e06bd2012-08-20 00:24:22 +0000289int cb_parse_table(const char **vendor, const char **model);
290int cb_check_image(uint8_t *bios, int size);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000291
292/* dmi.c */
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000293#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000294extern int has_dmi_support;
295void dmi_init(void);
296int dmi_match(const char *pattern);
Sean Nelson4c6d3a42013-09-11 23:35:03 +0000297#endif // defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000298
299/* internal.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000300struct superio {
301 uint16_t vendor;
302 uint16_t port;
303 uint16_t model;
304};
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000305extern struct superio superios[];
306extern int superio_count;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000307#define SUPERIO_VENDOR_NONE 0x0
308#define SUPERIO_VENDOR_ITE 0x1
Carl-Daniel Hailfingerf5e62cb2012-05-06 22:48:01 +0000309#define SUPERIO_VENDOR_WINBOND 0x2
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000310#endif
311#if NEED_PCI == 1
Patrick Georgi32508eb2012-07-20 20:35:14 +0000312struct pci_filter;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000313struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
Uwe Hermann24c35e42011-07-13 11:22:03 +0000314struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000315struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
316struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
317 uint16_t card_vendor, uint16_t card_device);
318#endif
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000319int rget_io_perms(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000320#if CONFIG_INTERNAL == 1
321extern int is_laptop;
Carl-Daniel Hailfinger580d29a2011-05-05 07:12:40 +0000322extern int laptop_ok;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000323extern int force_boardenable;
324extern int force_boardmismatch;
325void probe_superio(void);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000326int register_superio(struct superio s);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000327extern enum chipbustype internal_buses_supported;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000328int internal_init(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000329#endif
330
331/* hwaccess.c */
332void mmio_writeb(uint8_t val, void *addr);
333void mmio_writew(uint16_t val, void *addr);
334void mmio_writel(uint32_t val, void *addr);
335uint8_t mmio_readb(void *addr);
336uint16_t mmio_readw(void *addr);
337uint32_t mmio_readl(void *addr);
Carl-Daniel Hailfingerccd71c22012-03-01 22:38:27 +0000338void mmio_readn(void *addr, uint8_t *buf, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000339void mmio_le_writeb(uint8_t val, void *addr);
340void mmio_le_writew(uint16_t val, void *addr);
341void mmio_le_writel(uint32_t val, void *addr);
342uint8_t mmio_le_readb(void *addr);
343uint16_t mmio_le_readw(void *addr);
344uint32_t mmio_le_readl(void *addr);
345#define pci_mmio_writeb mmio_le_writeb
346#define pci_mmio_writew mmio_le_writew
347#define pci_mmio_writel mmio_le_writel
348#define pci_mmio_readb mmio_le_readb
349#define pci_mmio_readw mmio_le_readw
350#define pci_mmio_readl mmio_le_readl
Carl-Daniel Hailfinger54ce73a2011-05-03 21:49:41 +0000351void rmmio_writeb(uint8_t val, void *addr);
352void rmmio_writew(uint16_t val, void *addr);
353void rmmio_writel(uint32_t val, void *addr);
354void rmmio_le_writeb(uint8_t val, void *addr);
355void rmmio_le_writew(uint16_t val, void *addr);
356void rmmio_le_writel(uint32_t val, void *addr);
357#define pci_rmmio_writeb rmmio_le_writeb
358#define pci_rmmio_writew rmmio_le_writew
359#define pci_rmmio_writel rmmio_le_writel
360void rmmio_valb(void *addr);
361void rmmio_valw(void *addr);
362void rmmio_vall(void *addr);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000363
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000364/* dummyflasher.c */
365#if CONFIG_DUMMY == 1
366int dummy_init(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000367void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000368void dummy_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000369#endif
370
371/* nic3com.c */
372#if CONFIG_NIC3COM == 1
373int nic3com_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000374extern const struct dev_entry nics_3com[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000375#endif
376
377/* gfxnvidia.c */
378#if CONFIG_GFXNVIDIA == 1
379int gfxnvidia_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000380extern const struct dev_entry gfx_nvidia[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000381#endif
382
383/* drkaiser.c */
384#if CONFIG_DRKAISER == 1
385int drkaiser_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000386extern const struct dev_entry drkaiser_pcidev[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000387#endif
388
389/* nicrealtek.c */
390#if CONFIG_NICREALTEK == 1
391int nicrealtek_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000392extern const struct dev_entry nics_realtek[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000393#endif
394
395/* nicnatsemi.c */
396#if CONFIG_NICNATSEMI == 1
397int nicnatsemi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000398extern const struct dev_entry nics_natsemi[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000399#endif
400
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000401/* nicintel.c */
402#if CONFIG_NICINTEL == 1
403int nicintel_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000404extern const struct dev_entry nics_intel[];
Carl-Daniel Hailfingerb713d2e2011-05-08 00:24:18 +0000405#endif
406
Idwer Vollering004f4b72010-09-03 18:21:21 +0000407/* nicintel_spi.c */
408#if CONFIG_NICINTEL_SPI == 1
409int nicintel_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000410extern const struct dev_entry nics_intel_spi[];
Idwer Vollering004f4b72010-09-03 18:21:21 +0000411#endif
412
Mark Marshall90021f22010-12-03 14:48:11 +0000413/* ogp_spi.c */
414#if CONFIG_OGP_SPI == 1
415int ogp_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000416extern const struct dev_entry ogp_spi[];
Mark Marshall90021f22010-12-03 14:48:11 +0000417#endif
418
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000419/* satamv.c */
420#if CONFIG_SATAMV == 1
421int satamv_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000422extern const struct dev_entry satas_mv[];
Carl-Daniel Hailfinger9a1105c2011-02-04 21:37:59 +0000423#endif
424
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000425/* satasii.c */
426#if CONFIG_SATASII == 1
427int satasii_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000428extern const struct dev_entry satas_sii[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000429#endif
430
431/* atahpt.c */
432#if CONFIG_ATAHPT == 1
433int atahpt_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000434extern const struct dev_entry ata_hpt[];
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000435#endif
436
437/* ft2232_spi.c */
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000438#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000439int ft2232_spi_init(void);
Stefan Tauner4b24a2d2012-12-27 18:40:36 +0000440extern const struct dev_entry devs_ft2232spi[];
Jörg Fischer6529b9f2010-07-29 15:54:53 +0000441#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000442
James Lairdc60de0e2013-03-27 13:00:23 +0000443/* usbblaster_spi.c */
444#if CONFIG_USBBLASTER_SPI == 1
445int usbblaster_spi_init(void);
446extern const struct dev_entry devs_usbblasterspi[];
447#endif
448
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000449/* rayer_spi.c */
450#if CONFIG_RAYER_SPI == 1
451int rayer_spi_init(void);
452#endif
453
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000454/* pony_spi.c */
455#if CONFIG_PONY_SPI == 1
456int pony_spi_init(void);
457#endif
458
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000459/* bitbang_spi.c */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000460int bitbang_spi_init(const struct bitbang_spi_master *master);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000461
462/* buspirate_spi.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000463#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000464int buspirate_spi_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000465#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000466
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000467/* linux_spi.c */
468#if CONFIG_LINUX_SPI == 1
469int linux_spi_init(void);
470#endif
471
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000472/* dediprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000473#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000474int dediprog_init(void);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000475#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000476
477/* flashrom.c */
478struct decode_sizes {
479 uint32_t parallel;
480 uint32_t lpc;
481 uint32_t fwh;
482 uint32_t spi;
483};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000484// FIXME: These need to be local, not global
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000485extern struct decode_sizes max_rom_decode;
486extern int programmer_may_write;
487extern unsigned long flashbase;
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000488void check_chip_supported(const struct flashchip *chip);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000489int check_max_decode(enum chipbustype buses, uint32_t size);
Stefan Tauner66652442011-06-26 17:38:17 +0000490char *extract_programmer_param(const char *param_name);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000491
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000492/* spi.c */
493enum spi_controller {
494 SPI_CONTROLLER_NONE,
495#if CONFIG_INTERNAL == 1
496#if defined(__i386__) || defined(__x86_64__)
497 SPI_CONTROLLER_ICH7,
498 SPI_CONTROLLER_ICH9,
David Hendricks4e748392011-02-28 23:58:15 +0000499 SPI_CONTROLLER_IT85XX,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000500 SPI_CONTROLLER_IT87XX,
501 SPI_CONTROLLER_SB600,
502 SPI_CONTROLLER_VIA,
503 SPI_CONTROLLER_WBSIO,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000504#endif
505#endif
506#if CONFIG_FT2232_SPI == 1
507 SPI_CONTROLLER_FT2232,
508#endif
509#if CONFIG_DUMMY == 1
510 SPI_CONTROLLER_DUMMY,
511#endif
512#if CONFIG_BUSPIRATE_SPI == 1
513 SPI_CONTROLLER_BUSPIRATE,
514#endif
515#if CONFIG_DEDIPROG == 1
516 SPI_CONTROLLER_DEDIPROG,
517#endif
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000518#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__)))
Michael Karcherb9dbe482011-05-11 17:07:07 +0000519 SPI_CONTROLLER_BITBANG,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000520#endif
Sven Schnelle5ce5f702011-09-03 18:37:52 +0000521#if CONFIG_LINUX_SPI == 1
522 SPI_CONTROLLER_LINUX,
523#endif
Urja Rannikkoc93f5f12011-09-15 23:38:14 +0000524#if CONFIG_SERPROG == 1
525 SPI_CONTROLLER_SERPROG,
526#endif
James Lairdc60de0e2013-03-27 13:00:23 +0000527#if CONFIG_USBBLASTER_SPI == 1
528 SPI_CONTROLLER_USBBLASTER,
529#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000530};
Michael Karcher62797512011-05-11 17:07:02 +0000531
532#define MAX_DATA_UNSPECIFIED 0
533#define MAX_DATA_READ_UNLIMITED 64 * 1024
534#define MAX_DATA_WRITE_UNLIMITED 256
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000535struct spi_programmer {
Michael Karcherb9dbe482011-05-11 17:07:07 +0000536 enum spi_controller type;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000537 unsigned int max_data_read;
538 unsigned int max_data_write;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000539 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000540 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000541 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000542
543 /* Optimized functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000544 int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
545 int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000546 int (*write_aai)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000547 const void *data;
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000548};
549
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000550int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000551 const unsigned char *writearr, unsigned char *readarr);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000552int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000553int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
554int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Nico Huber7bca1262012-06-15 22:28:12 +0000555int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000556int register_spi_programmer(const struct spi_programmer *programmer);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000557
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000558/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
Stefan Taunera8d838d2011-11-06 23:51:09 +0000559enum ich_chipset {
560 CHIPSET_ICH_UNKNOWN,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000561 CHIPSET_ICH,
562 CHIPSET_ICH2345,
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000563 CHIPSET_ICH6,
Stefan Tauner92d6a862013-10-25 00:33:37 +0000564 CHIPSET_POULSBO, /* SCH U* */
565 CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
566 CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
Kyösti Mälkki78cd0872013-09-14 23:36:57 +0000567 CHIPSET_ICH7,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000568 CHIPSET_ICH8,
569 CHIPSET_ICH9,
570 CHIPSET_ICH10,
571 CHIPSET_5_SERIES_IBEX_PEAK,
572 CHIPSET_6_SERIES_COUGAR_POINT,
Stefan Tauner2abab942012-04-27 20:41:23 +0000573 CHIPSET_7_SERIES_PANTHER_POINT,
Duncan Laurie90eb2262013-03-15 03:12:29 +0000574 CHIPSET_8_SERIES_LYNX_POINT,
575 CHIPSET_8_SERIES_LYNX_POINT_LP,
576 CHIPSET_8_SERIES_WELLSBURG,
Stefan Taunera8d838d2011-11-06 23:51:09 +0000577};
578
Stefan Tauner2abab942012-04-27 20:41:23 +0000579/* ichspi.c */
580#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000581extern uint32_t ichspi_bbar;
Stefan Tauner92d6a862013-10-25 00:33:37 +0000582int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation);
Helge Wagnerdd73d832012-08-24 23:03:46 +0000583int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000584
Stefan Taunerdbac46c2013-08-13 22:10:41 +0000585/* amd_imc.c */
Rudolf Marek70e14592013-07-25 22:58:56 +0000586int amd_imc_shutdown(struct pci_dev *dev);
587
David Hendricks4e748392011-02-28 23:58:15 +0000588/* it85spi.c */
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000589int it85xx_spi_init(struct superio s);
David Hendricks4e748392011-02-28 23:58:15 +0000590
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000591/* it87spi.c */
592void enter_conf_mode_ite(uint16_t port);
593void exit_conf_mode_ite(uint16_t port);
Carl-Daniel Hailfingerbfecef62011-04-27 14:34:08 +0000594void probe_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000595int init_superio_ite(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000596
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000597/* mcp6x_spi.c */
598int mcp6x_spi_init(int want_spi);
599
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000600/* sb600spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000601int sb600_probe_spi(struct pci_dev *dev);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000602
603/* wbsio_spi.c */
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000604int wbsio_check_for_spi(void);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000605#endif
606
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000607/* opaque.c */
608struct opaque_programmer {
609 int max_data_read;
610 int max_data_write;
611 /* Specific functions for this programmer */
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000612 int (*probe) (struct flashctx *flash);
613 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
614 int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
615 int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000616 const void *data;
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000617};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000618int register_opaque_programmer(const struct opaque_programmer *pgm);
Carl-Daniel Hailfinger532c7172011-11-04 21:35:26 +0000619
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000620/* programmer.c */
621int noop_shutdown(void);
Stefan Tauner305e0b92013-07-17 23:46:44 +0000622void *fallback_map(const char *descr, uintptr_t phys_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000623void fallback_unmap(void *virt_addr, size_t len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000624void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
625void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
626void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
627void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
628uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
629uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
630void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
631struct par_programmer {
632 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
633 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
634 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
635 void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
636 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
637 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
638 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
639 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000640 const void *data;
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000641};
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000642int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
643struct registered_programmer {
644 enum chipbustype buses_supported;
645 union {
646 struct par_programmer par;
647 struct spi_programmer spi;
648 struct opaque_programmer opaque;
649 };
650};
651extern struct registered_programmer registered_programmers[];
652extern int registered_programmer_count;
653int register_programmer(struct registered_programmer *pgm);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000654
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000655/* serprog.c */
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000656#if CONFIG_SERPROG == 1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000657int serprog_init(void);
Stefan Tauner31019d42011-10-22 21:45:27 +0000658void serprog_delay(int usecs);
Carl-Daniel Hailfingerc4224842011-06-09 20:06:34 +0000659#endif
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000660
661/* serial.c */
Carl-Daniel Hailfinger60d9bd22012-08-09 23:34:41 +0000662#ifdef _WIN32
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000663typedef HANDLE fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000664#define SER_INV_FD INVALID_HANDLE_VALUE
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000665#else
666typedef int fdtype;
Stefan Taunerbb4fed72012-09-01 21:47:19 +0000667#define SER_INV_FD -1
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000668#endif
669
670void sp_flush_incoming(void);
671fdtype sp_openserport(char *dev, unsigned int baud);
Stefan Tauner184c52c2013-08-23 21:51:32 +0000672int serialport_config(fdtype fd, unsigned int baud);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000673extern fdtype sp_fd;
David Hendricks8bb20212011-06-14 01:35:36 +0000674/* expose serialport_shutdown as it's currently used by buspirate */
675int serialport_shutdown(void *data);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000676int serialport_write(unsigned char *buf, unsigned int writecnt);
Stefan Taunerae3d8372013-04-01 00:45:45 +0000677int serialport_write_nonblock(unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000678int serialport_read(unsigned char *buf, unsigned int readcnt);
Stefan Tauner00e16082013-04-01 00:45:38 +0000679int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read);
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000680
Virgil-Adrian Teacada7c5452012-04-30 23:11:06 +0000681/* Serial port/pin mapping:
682
683 1 CD <-
684 2 RXD <-
685 3 TXD ->
686 4 DTR ->
687 5 GND --
688 6 DSR <-
689 7 RTS ->
690 8 CTS <-
691 9 RI <-
692*/
693enum SP_PIN {
694 PIN_CD = 1,
695 PIN_RXD,
696 PIN_TXD,
697 PIN_DTR,
698 PIN_GND,
699 PIN_DSR,
700 PIN_RTS,
701 PIN_CTS,
702 PIN_RI,
703};
704
705void sp_set_pin(enum SP_PIN pin, int val);
706int sp_get_pin(enum SP_PIN pin);
707
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +0000708#endif /* !__PROGRAMMER_H__ */