Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it> |
| 6 | * Copyright (C) 2006 coresystems GmbH <info@coresystems.de> |
Carl-Daniel Hailfinger | ae8afa9 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 7 | * Copyright (C) 2007 Carl-Daniel Hailfinger |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 8 | * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com> |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 9 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 14 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 19 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 26 | #include "chipdrivers.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 27 | |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 28 | #define MAX_REFLASH_TRIES 0x10 |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 29 | #define MASK_FULL 0xffff |
| 30 | #define MASK_2AA 0x7ff |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 31 | #define MASK_AAA 0xfff |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 32 | |
Carl-Daniel Hailfinger | a758f51 | 2008-05-14 12:03:06 +0000 | [diff] [blame] | 33 | /* Check one byte for odd parity */ |
| 34 | uint8_t oddparity(uint8_t val) |
| 35 | { |
| 36 | val = (val ^ (val >> 4)) & 0xf; |
| 37 | val = (val ^ (val >> 2)) & 0x3; |
| 38 | return (val ^ (val >> 1)) & 0x1; |
| 39 | } |
| 40 | |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 41 | void toggle_ready_jedec_common(chipaddr dst, int delay) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 42 | { |
| 43 | unsigned int i = 0; |
| 44 | uint8_t tmp1, tmp2; |
| 45 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 46 | tmp1 = chip_readb(dst) & 0x40; |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 47 | |
| 48 | while (i++ < 0xFFFFFFF) { |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 49 | if (delay) |
| 50 | programmer_delay(delay); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 51 | tmp2 = chip_readb(dst) & 0x40; |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 52 | if (tmp1 == tmp2) { |
| 53 | break; |
| 54 | } |
| 55 | tmp1 = tmp2; |
| 56 | } |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 57 | if (i > 0x100000) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 58 | msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | void toggle_ready_jedec(chipaddr dst) |
| 62 | { |
| 63 | toggle_ready_jedec_common(dst, 0); |
| 64 | } |
| 65 | |
| 66 | /* Some chips require a minimum delay between toggle bit reads. |
| 67 | * The Winbond W39V040C wants 50 ms between reads on sector erase toggle, |
| 68 | * but experiments show that 2 ms are already enough. Pick a safety factor |
| 69 | * of 4 and use an 8 ms delay. |
| 70 | * Given that erase is slow on all chips, it is recommended to use |
| 71 | * toggle_ready_jedec_slow in erase functions. |
| 72 | */ |
| 73 | void toggle_ready_jedec_slow(chipaddr dst) |
| 74 | { |
| 75 | toggle_ready_jedec_common(dst, 8 * 1000); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 76 | } |
| 77 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 78 | void data_polling_jedec(chipaddr dst, uint8_t data) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 79 | { |
| 80 | unsigned int i = 0; |
| 81 | uint8_t tmp; |
| 82 | |
| 83 | data &= 0x80; |
| 84 | |
| 85 | while (i++ < 0xFFFFFFF) { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 86 | tmp = chip_readb(dst) & 0x80; |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 87 | if (tmp == data) { |
| 88 | break; |
| 89 | } |
| 90 | } |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 91 | if (i > 0x100000) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 92 | msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 93 | } |
| 94 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 95 | void start_program_jedec_common(struct flashchip *flash, unsigned int mask) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 96 | { |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 97 | chipaddr bios = flash->virtual_memory; |
| 98 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
| 99 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
| 100 | chip_writeb(0xA0, bios + (0x5555 & mask)); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 101 | } |
| 102 | |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 103 | int probe_jedec_common(struct flashchip *flash, unsigned int mask) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 104 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 105 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 106 | uint8_t id1, id2; |
Carl-Daniel Hailfinger | ae8afa9 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 107 | uint32_t largeid1, largeid2; |
Carl-Daniel Hailfinger | 8130f2d | 2009-05-11 14:40:31 +0000 | [diff] [blame] | 108 | uint32_t flashcontent1, flashcontent2; |
Maciej Pijanka | c6e1111 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 109 | int probe_timing_enter, probe_timing_exit; |
| 110 | |
| 111 | if (flash->probe_timing > 0) |
| 112 | probe_timing_enter = probe_timing_exit = flash->probe_timing; |
| 113 | else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */ |
| 114 | probe_timing_enter = probe_timing_exit = 0; |
| 115 | } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */ |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 116 | msg_cdbg("Chip lacks correct probe timing information, " |
Carl-Daniel Hailfinger | 414bd32 | 2009-07-23 01:33:43 +0000 | [diff] [blame] | 117 | "using default 10mS/40uS. "); |
Maciej Pijanka | c6e1111 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 118 | probe_timing_enter = 10000; |
| 119 | probe_timing_exit = 40; |
| 120 | } else { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 121 | msg_cerr("Chip has negative value in probe_timing, failing " |
Maciej Pijanka | c6e1111 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 122 | "without chip access\n"); |
| 123 | return 0; |
| 124 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 125 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 126 | /* Issue JEDEC Product ID Entry command */ |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 127 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Sean Nelson | c12fc71 | 2009-12-17 04:22:40 +0000 | [diff] [blame] | 128 | if (probe_timing_enter) |
| 129 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 130 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Sean Nelson | c12fc71 | 2009-12-17 04:22:40 +0000 | [diff] [blame] | 131 | if (probe_timing_enter) |
| 132 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 133 | chip_writeb(0x90, bios + (0x5555 & mask)); |
Sean Nelson | c12fc71 | 2009-12-17 04:22:40 +0000 | [diff] [blame] | 134 | if (probe_timing_enter) |
| 135 | programmer_delay(probe_timing_enter); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 136 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 137 | /* Read product ID */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 138 | id1 = chip_readb(bios); |
| 139 | id2 = chip_readb(bios + 0x01); |
Carl-Daniel Hailfinger | ae8afa9 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 140 | largeid1 = id1; |
| 141 | largeid2 = id2; |
| 142 | |
| 143 | /* Check if it is a continuation ID, this should be a while loop. */ |
| 144 | if (id1 == 0x7F) { |
| 145 | largeid1 <<= 8; |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 146 | id1 = chip_readb(bios + 0x100); |
Carl-Daniel Hailfinger | ae8afa9 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 147 | largeid1 |= id1; |
| 148 | } |
| 149 | if (id2 == 0x7F) { |
| 150 | largeid2 <<= 8; |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 151 | id2 = chip_readb(bios + 0x101); |
Carl-Daniel Hailfinger | ae8afa9 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 152 | largeid2 |= id2; |
| 153 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 154 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 155 | /* Issue JEDEC Product ID Exit command */ |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 156 | if ((flash->feature_bits & FEATURE_SHORT_RESET) == FEATURE_LONG_RESET) |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 157 | { |
| 158 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
| 159 | if (probe_timing_exit) |
| 160 | programmer_delay(10); |
| 161 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
| 162 | if (probe_timing_exit) |
| 163 | programmer_delay(10); |
| 164 | } |
| 165 | chip_writeb(0xF0, bios + (0x5555 & mask)); |
Sean Nelson | c12fc71 | 2009-12-17 04:22:40 +0000 | [diff] [blame] | 166 | if (probe_timing_exit) |
| 167 | programmer_delay(probe_timing_exit); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 168 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 169 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2); |
Carl-Daniel Hailfinger | a758f51 | 2008-05-14 12:03:06 +0000 | [diff] [blame] | 170 | if (!oddparity(id1)) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 171 | msg_cdbg(", id1 parity violation"); |
Carl-Daniel Hailfinger | 8130f2d | 2009-05-11 14:40:31 +0000 | [diff] [blame] | 172 | |
| 173 | /* Read the product ID location again. We should now see normal flash contents. */ |
| 174 | flashcontent1 = chip_readb(bios); |
| 175 | flashcontent2 = chip_readb(bios + 0x01); |
| 176 | |
| 177 | /* Check if it is a continuation ID, this should be a while loop. */ |
| 178 | if (flashcontent1 == 0x7F) { |
| 179 | flashcontent1 <<= 8; |
| 180 | flashcontent1 |= chip_readb(bios + 0x100); |
| 181 | } |
| 182 | if (flashcontent2 == 0x7F) { |
| 183 | flashcontent2 <<= 8; |
| 184 | flashcontent2 |= chip_readb(bios + 0x101); |
| 185 | } |
| 186 | |
| 187 | if (largeid1 == flashcontent1) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 188 | msg_cdbg(", id1 is normal flash content"); |
Carl-Daniel Hailfinger | 8130f2d | 2009-05-11 14:40:31 +0000 | [diff] [blame] | 189 | if (largeid2 == flashcontent2) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 190 | msg_cdbg(", id2 is normal flash content"); |
Carl-Daniel Hailfinger | 8130f2d | 2009-05-11 14:40:31 +0000 | [diff] [blame] | 191 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 192 | msg_cdbg("\n"); |
Carl-Daniel Hailfinger | e940466 | 2010-01-09 02:24:17 +0000 | [diff] [blame] | 193 | if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) |
| 194 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 195 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 196 | if (flash->feature_bits & FEATURE_REGISTERMAP) |
| 197 | map_flash_registers(flash); |
| 198 | |
Carl-Daniel Hailfinger | e940466 | 2010-01-09 02:24:17 +0000 | [diff] [blame] | 199 | return 1; |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 200 | } |
| 201 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 202 | int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, |
| 203 | unsigned int pagesize, unsigned int mask) |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 204 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 205 | chipaddr bios = flash->virtual_memory; |
| 206 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 207 | /* Issue the Sector Erase command */ |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 208 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 209 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 210 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 211 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 212 | chip_writeb(0x80, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 213 | programmer_delay(10); |
Ollie Lho | efa2858 | 2004-12-08 20:10:01 +0000 | [diff] [blame] | 214 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 215 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 216 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 217 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 218 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 219 | chip_writeb(0x30, bios + page); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 220 | programmer_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 221 | |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 222 | /* wait for Toggle bit ready */ |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 223 | toggle_ready_jedec_slow(bios); |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 224 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 225 | if (check_erased_range(flash, page, pagesize)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 226 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 227 | return -1; |
| 228 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 229 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 230 | } |
Ollie Lho | 98bea8a | 2004-12-07 03:15:51 +0000 | [diff] [blame] | 231 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 232 | int erase_block_jedec_common(struct flashchip *flash, unsigned int block, |
| 233 | unsigned int blocksize, unsigned int mask) |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 234 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 235 | chipaddr bios = flash->virtual_memory; |
| 236 | |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 237 | /* Issue the Sector Erase command */ |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 238 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 239 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 240 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 241 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 242 | chip_writeb(0x80, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 243 | programmer_delay(10); |
Ollie Lho | efa2858 | 2004-12-08 20:10:01 +0000 | [diff] [blame] | 244 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 245 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 246 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 247 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 248 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 249 | chip_writeb(0x50, bios + block); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 250 | programmer_delay(10); |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 251 | |
| 252 | /* wait for Toggle bit ready */ |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 253 | toggle_ready_jedec_slow(bios); |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 254 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 255 | if (check_erased_range(flash, block, blocksize)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 256 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 257 | return -1; |
| 258 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 259 | return 0; |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 260 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 261 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 262 | int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 263 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 264 | int total_size = flash->total_size * 1024; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 265 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 266 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 267 | /* Issue the JEDEC Chip Erase command */ |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 268 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 269 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 270 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 271 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 272 | chip_writeb(0x80, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 273 | programmer_delay(10); |
Ollie Lho | efa2858 | 2004-12-08 20:10:01 +0000 | [diff] [blame] | 274 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 275 | chip_writeb(0xAA, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 276 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 277 | chip_writeb(0x55, bios + (0x2AAA & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 278 | programmer_delay(10); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 279 | chip_writeb(0x10, bios + (0x5555 & mask)); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 280 | programmer_delay(10); |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 281 | |
Carl-Daniel Hailfinger | aa00098 | 2009-12-17 16:20:26 +0000 | [diff] [blame] | 282 | toggle_ready_jedec_slow(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 283 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 284 | if (check_erased_range(flash, 0, total_size)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 285 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 286 | return -1; |
| 287 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 288 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 289 | } |
| 290 | |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 291 | int write_byte_program_jedec_common(struct flashchip *flash, uint8_t *src, |
| 292 | chipaddr dst, unsigned int mask) |
| 293 | { |
| 294 | int tried = 0, failed = 0; |
| 295 | chipaddr bios = flash->virtual_memory; |
| 296 | |
| 297 | /* If the data is 0xFF, don't program it and don't complain. */ |
| 298 | if (*src == 0xFF) { |
| 299 | return 0; |
| 300 | } |
| 301 | |
| 302 | retry: |
| 303 | /* Issue JEDEC Byte Program command */ |
| 304 | start_program_jedec_common(flash, mask); |
| 305 | |
| 306 | /* transfer data from source to destination */ |
| 307 | chip_writeb(*src, dst); |
| 308 | toggle_ready_jedec(bios); |
| 309 | |
| 310 | if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) { |
| 311 | goto retry; |
| 312 | } |
| 313 | |
| 314 | if (tried >= MAX_REFLASH_TRIES) |
| 315 | failed = 1; |
| 316 | |
| 317 | return failed; |
| 318 | } |
| 319 | |
| 320 | int write_sector_jedec_common(struct flashchip *flash, uint8_t *src, |
| 321 | chipaddr dst, unsigned int page_size, unsigned int mask) |
| 322 | { |
| 323 | int i, failed = 0; |
| 324 | chipaddr olddst; |
| 325 | |
| 326 | olddst = dst; |
| 327 | for (i = 0; i < page_size; i++) { |
| 328 | if (write_byte_program_jedec_common(flash, src, dst, mask)) |
| 329 | failed = 1; |
| 330 | dst++, src++; |
| 331 | } |
| 332 | if (failed) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 333 | msg_cerr(" writing sector at 0x%lx failed!\n", olddst); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 334 | |
| 335 | return failed; |
| 336 | } |
| 337 | |
| 338 | int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, |
| 339 | int start, int page_size, unsigned int mask) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 340 | { |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 341 | int i, tried = 0, failed; |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 342 | uint8_t *s = src; |
Urja Rannikko | 0c854c0 | 2009-06-25 13:57:31 +0000 | [diff] [blame] | 343 | chipaddr bios = flash->virtual_memory; |
| 344 | chipaddr dst = bios + start; |
| 345 | chipaddr d = dst; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 346 | |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 347 | retry: |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 348 | /* Issue JEDEC Start Program comand */ |
| 349 | start_program_jedec_common(flash, mask); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 350 | |
Ollie Lho | 98bea8a | 2004-12-07 03:15:51 +0000 | [diff] [blame] | 351 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 8a8a226 | 2009-11-14 03:48:33 +0000 | [diff] [blame] | 352 | for (i = 0; i < page_size; i++) { |
Ollie Lho | 98bea8a | 2004-12-07 03:15:51 +0000 | [diff] [blame] | 353 | /* If the data is 0xFF, don't program it */ |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 354 | if (*src != 0xFF) |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 355 | chip_writeb(*src, dst); |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 356 | dst++; |
| 357 | src++; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 358 | } |
| 359 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 360 | toggle_ready_jedec(dst - 1); |
Ollie Lho | 98bea8a | 2004-12-07 03:15:51 +0000 | [diff] [blame] | 361 | |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 362 | dst = d; |
| 363 | src = s; |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 364 | failed = verify_range(flash, src, start, page_size, NULL); |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 365 | |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 366 | if (failed && tried++ < MAX_REFLASH_TRIES) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 367 | msg_cerr("retrying.\n"); |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 368 | goto retry; |
| 369 | } |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 370 | if (failed) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 371 | msg_cerr(" page 0x%lx failed!\n", |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 372 | (d - bios) / page_size); |
Giampiero Giancipoli | 8c5299f | 2006-11-22 00:29:51 +0000 | [diff] [blame] | 373 | } |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 374 | return failed; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 375 | } |
| 376 | |
Carl-Daniel Hailfinger | 4bf4e79 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 377 | int getaddrmask(struct flashchip *flash) |
| 378 | { |
| 379 | switch (flash->feature_bits & FEATURE_ADDR_MASK) { |
| 380 | case FEATURE_ADDR_FULL: |
| 381 | return MASK_FULL; |
| 382 | break; |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 383 | case FEATURE_ADDR_2AA: |
| 384 | return MASK_2AA; |
| 385 | break; |
| 386 | case FEATURE_ADDR_AAA: |
| 387 | return MASK_AAA; |
| 388 | break; |
Carl-Daniel Hailfinger | 4bf4e79 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 389 | default: |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 390 | msg_cerr("%s called with unknown mask\n", __func__); |
Carl-Daniel Hailfinger | 4bf4e79 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 391 | return 0; |
| 392 | break; |
| 393 | } |
| 394 | } |
| 395 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 396 | int write_jedec(struct flashchip *flash, uint8_t *buf) |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 397 | { |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 398 | int mask; |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 399 | int i, failed = 0; |
Ollie Lho | 070647d | 2004-03-22 22:19:17 +0000 | [diff] [blame] | 400 | int total_size = flash->total_size * 1024; |
| 401 | int page_size = flash->page_size; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 402 | |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 403 | mask = getaddrmask(flash); |
| 404 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 405 | if (erase_chip_jedec(flash)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 406 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 407 | return -1; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 408 | } |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 409 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 410 | msg_cinfo("Programming page: "); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 411 | for (i = 0; i < total_size / page_size; i++) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 412 | msg_cinfo("%04d at address: 0x%08x", i, i * page_size); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 413 | if (write_page_write_jedec_common(flash, buf + i * page_size, |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 414 | i * page_size, page_size, mask)) |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 415 | failed = 1; |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 416 | msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 417 | } |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 418 | msg_cinfo("DONE!\n"); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 419 | |
Carl-Daniel Hailfinger | 2925d6f | 2009-11-25 16:41:50 +0000 | [diff] [blame] | 420 | return failed; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 421 | } |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 422 | |
| 423 | int write_jedec_1(struct flashchip *flash, uint8_t * buf) |
| 424 | { |
| 425 | int i; |
| 426 | chipaddr bios = flash->virtual_memory; |
| 427 | chipaddr dst = bios; |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 428 | int mask; |
| 429 | |
| 430 | mask = getaddrmask(flash); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 431 | |
| 432 | programmer_delay(10); |
| 433 | if (erase_flash(flash)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 434 | msg_cerr("ERASE FAILED!\n"); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 435 | return -1; |
| 436 | } |
| 437 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 438 | msg_cinfo("Programming page: "); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 439 | for (i = 0; i < flash->total_size; i++) { |
| 440 | if ((i & 0x3) == 0) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 441 | msg_cinfo("address: 0x%08lx", (unsigned long)i * 1024); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 442 | |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 443 | write_sector_jedec_common(flash, buf + i * 1024, dst + i * 1024, 1024, mask); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 444 | |
| 445 | if ((i & 0x3) == 0) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 446 | msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 447 | } |
| 448 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 449 | msg_cinfo("DONE!\n"); |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 450 | return 0; |
| 451 | } |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 452 | |
| 453 | /* erase chip with block_erase() prototype */ |
| 454 | int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr, |
| 455 | unsigned int blocksize) |
| 456 | { |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 457 | int mask; |
| 458 | |
| 459 | mask = getaddrmask(flash); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 460 | if ((addr != 0) || (blocksize != flash->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame^] | 461 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 462 | __func__); |
| 463 | return -1; |
| 464 | } |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 465 | return erase_chip_jedec_common(flash, mask); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | int probe_jedec(struct flashchip *flash) |
| 469 | { |
Carl-Daniel Hailfinger | 4bf4e79 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 470 | int mask; |
| 471 | |
| 472 | mask = getaddrmask(flash); |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 473 | return probe_jedec_common(flash, mask); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 474 | } |
| 475 | |
| 476 | int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size) |
| 477 | { |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 478 | int mask; |
| 479 | |
| 480 | mask = getaddrmask(flash); |
| 481 | return erase_sector_jedec_common(flash, page, size, mask); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 482 | } |
| 483 | |
| 484 | int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int size) |
| 485 | { |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 486 | int mask; |
| 487 | |
| 488 | mask = getaddrmask(flash); |
| 489 | return erase_block_jedec_common(flash, page, size, mask); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 490 | } |
| 491 | |
| 492 | int erase_chip_jedec(struct flashchip *flash) |
| 493 | { |
Sean Nelson | 35727f7 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 494 | int mask; |
| 495 | |
| 496 | mask = getaddrmask(flash); |
| 497 | return erase_chip_jedec_common(flash, mask); |
Sean Nelson | c57a920 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 498 | } |