Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * jedec.c: driver for programming JEDEC standard flash parts |
| 3 | * |
| 4 | * |
| 5 | * Copyright 2000 Silicon Integrated System Corporation |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | * |
| 21 | * |
| 22 | * Reference: |
| 23 | * |
| 24 | * $Id$ |
| 25 | */ |
| 26 | |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 27 | #include <stdio.h> |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 28 | #include "flash.h" |
| 29 | #include "jedec.h" |
| 30 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 31 | int probe_jedec(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 32 | { |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 33 | volatile char *bios = flash->virt_addr; |
| 34 | unsigned char id1, id2; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 35 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 36 | /* Issue JEDEC Product ID Entry command */ |
| 37 | *(volatile char *) (bios + 0x5555) = 0xAA; |
| 38 | myusec_delay(10); |
| 39 | *(volatile char *) (bios + 0x2AAA) = 0x55; |
| 40 | myusec_delay(10); |
| 41 | *(volatile char *) (bios + 0x5555) = 0x90; |
| 42 | myusec_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 43 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 44 | /* Read product ID */ |
| 45 | id1 = *(volatile unsigned char *) bios; |
| 46 | id2 = *(volatile unsigned char *) (bios + 0x01); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 47 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 48 | /* Issue JEDEC Product ID Exit command */ |
| 49 | *(volatile char *) (bios + 0x5555) = 0xAA; |
| 50 | myusec_delay(10); |
| 51 | *(volatile char *) (bios + 0x2AAA) = 0x55; |
| 52 | myusec_delay(10); |
| 53 | *(volatile char *) (bios + 0x5555) = 0xF0; |
| 54 | myusec_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 55 | |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 56 | printf("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 57 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 58 | return 1; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 59 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 60 | return 0; |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 61 | } |
| 62 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 63 | int erase_sector_jedec(volatile char *bios, unsigned int page) |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 64 | { |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 65 | volatile unsigned char *Temp; |
| 66 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 67 | /* Issue the Sector Erase command */ |
| 68 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 69 | *Temp = 0xAA; /* write data 0xAA to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 70 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 71 | Temp = bios + 0x2AAA; /* set up address to be BASE:2AAAh */ |
| 72 | *Temp = 0x55; /* write data 0x55 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 73 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 74 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 75 | *Temp = 0x80; /* write data 0x80 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 76 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 77 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 78 | *Temp = 0xAA; /* write data 0xAA to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 79 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 80 | Temp = bios + 0x2AAA; /* set up address to be BASE:2AAAh */ |
| 81 | *Temp = 0x55; /* write data 0x55 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 82 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 83 | Temp = bios + page; /* set up address to be the current sector */ |
| 84 | *Temp = 0x30; /* write data 0x30 to the address */ |
| 85 | myusec_delay(10); |
| 86 | |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 87 | /* wait for Toggle bit ready */ |
| 88 | toggle_ready_jedec(bios); |
| 89 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 90 | return (0); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 91 | } |
| 92 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 93 | int erase_chip_jedec(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 94 | { |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 95 | volatile unsigned char *bios = flash->virt_addr; |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 96 | volatile unsigned char *Temp; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 97 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 98 | /* Issue the JEDEC Chip Erase command */ |
| 99 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 100 | *Temp = 0xAA; /* write data 0xAA to the address */ |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 101 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 102 | Temp = bios + 0x2AAA; /* set up address to be BASE:2AAAh */ |
| 103 | *Temp = 0x55; /* write data 0x55 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 104 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 105 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 106 | *Temp = 0x80; /* write data 0x80 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 107 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 108 | Temp = bios + 0x5555; /* set up address to be BASE:5555h */ |
| 109 | *Temp = 0xAA; /* write data 0xAA to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 110 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 111 | Temp = bios + 0x2AAA; /* set up address to be BASE:2AAAh */ |
| 112 | *Temp = 0x55; /* write data 0x55 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 113 | myusec_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 114 | Temp = bios + 0x5555; /* set up address to be BASEy:5555h */ |
| 115 | *Temp = 0x10; /* write data 0x10 to the address */ |
Ollie Lho | 73eca80 | 2004-03-19 22:10:07 +0000 | [diff] [blame] | 116 | myusec_delay(10); |
| 117 | |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 118 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 119 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 120 | return (0); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 121 | } |
| 122 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 123 | void write_page_jedec(volatile char *bios, char *src, volatile char *dst, |
| 124 | int page_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 125 | { |
| 126 | int i; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 127 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 128 | /* Issue JEDEC Data Unprotect comand */ |
| 129 | *(volatile char *) (bios + 0x5555) = 0xAA; |
| 130 | *(volatile char *) (bios + 0x2AAA) = 0x55; |
| 131 | *(volatile char *) (bios + 0x5555) = 0xA0; |
| 132 | |
| 133 | for (i = 0; i < page_size; i++) { |
| 134 | /* transfer data from source to destination */ |
| 135 | *dst++ = *src++; |
| 136 | } |
| 137 | |
| 138 | usleep(100); |
| 139 | toggle_ready_jedec(dst - 1); |
| 140 | } |
| 141 | |
| 142 | int write_sector_jedec(volatile char *bios, |
| 143 | unsigned char *src, |
| 144 | volatile unsigned char *dst, unsigned int page_size) |
| 145 | { |
| 146 | int i; |
| 147 | volatile char *Temp; |
| 148 | |
| 149 | for (i = 0; i < page_size; i++) { |
| 150 | if (*dst != 0xff) { |
| 151 | printf("FATAL: dst %p not erased (val 0x%x\n", dst, |
| 152 | *dst); |
| 153 | return (-1); |
| 154 | } |
| 155 | /* transfer data from source to destination */ |
| 156 | if (*src == 0xFF) { |
| 157 | dst++, src++; |
| 158 | /* If the data is 0xFF, don't program it */ |
| 159 | continue; |
| 160 | } |
| 161 | /* Issue JEDEC Byte Program command */ |
| 162 | Temp = bios + 0x5555; |
| 163 | *Temp = 0xAA; |
| 164 | Temp = bios + 0x2AAA; |
| 165 | *Temp = 0x55; |
| 166 | Temp = bios + 0x5555; |
| 167 | *Temp = 0xA0; |
| 168 | *dst = *src; |
| 169 | toggle_ready_jedec(bios); |
| 170 | if (*dst != *src) |
| 171 | printf("BAD! dst 0x%lx val 0x%x src 0x%x\n", |
| 172 | (unsigned long) dst, *dst, *src); |
| 173 | dst++, src++; |
| 174 | } |
| 175 | |
| 176 | return (0); |
| 177 | } |
| 178 | |
| 179 | int write_jedec(struct flashchip *flash, unsigned char *buf) |
| 180 | { |
| 181 | int i; |
| 182 | int total_size = flash->total_size * 1024, page_size = |
| 183 | flash->page_size; |
| 184 | volatile unsigned char *bios = flash->virt_addr; |
| 185 | |
| 186 | erase_chip_jedec(flash); |
| 187 | if (*bios != (unsigned char) 0xff) { |
Ronald G. Minnich | 5643942 | 2002-09-06 16:58:14 +0000 | [diff] [blame] | 188 | printf("ERASE FAILED\n"); |
| 189 | return -1; |
| 190 | } |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 191 | printf("Programming Page: "); |
| 192 | for (i = 0; i < total_size / page_size; i++) { |
| 193 | printf("%04d at address: 0x%08x", i, i * page_size); |
| 194 | write_page_jedec(bios, buf + i * page_size, |
| 195 | bios + i * page_size, page_size); |
| 196 | printf |
| 197 | ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 198 | } |
| 199 | printf("\n"); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 200 | protect_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 201 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame^] | 202 | return (0); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 203 | } |