Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
Carl-Daniel Hailfinger | 3431bb7 | 2009-06-24 08:28:39 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 5 | * Copyright (C) 2008 coresystems GmbH |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * Contains the generic SPI framework |
| 23 | */ |
| 24 | |
Carl-Daniel Hailfinger | ec489e4 | 2010-09-15 00:13:02 +0000 | [diff] [blame] | 25 | #include <string.h> |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 26 | #include "flash.h" |
Carl-Daniel Hailfinger | 0845464 | 2009-06-15 14:14:48 +0000 | [diff] [blame] | 27 | #include "flashchips.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 28 | #include "chipdrivers.h" |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 29 | #include "programmer.h" |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 30 | #include "spi.h" |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 31 | |
Carl-Daniel Hailfinger | 1dfe0ff | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 32 | enum spi_controller spi_controller = SPI_CONTROLLER_NONE; |
Carl-Daniel Hailfinger | 1dfe0ff | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 33 | |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 34 | const struct spi_programmer spi_programmer[] = { |
| 35 | { /* SPI_CONTROLLER_NONE */ |
| 36 | .command = NULL, |
| 37 | .multicommand = NULL, |
| 38 | .read = NULL, |
| 39 | .write_256 = NULL, |
| 40 | }, |
| 41 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 42 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 43 | #if defined(__i386__) || defined(__x86_64__) |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 44 | { /* SPI_CONTROLLER_ICH7 */ |
| 45 | .command = ich_spi_send_command, |
| 46 | .multicommand = ich_spi_send_multicommand, |
| 47 | .read = ich_spi_read, |
| 48 | .write_256 = ich_spi_write_256, |
| 49 | }, |
| 50 | |
| 51 | { /* SPI_CONTROLLER_ICH9 */ |
| 52 | .command = ich_spi_send_command, |
| 53 | .multicommand = ich_spi_send_multicommand, |
| 54 | .read = ich_spi_read, |
| 55 | .write_256 = ich_spi_write_256, |
| 56 | }, |
| 57 | |
David Hendricks | 4e74839 | 2011-02-28 23:58:15 +0000 | [diff] [blame] | 58 | { /* SPI_CONTROLLER_IT85XX */ |
| 59 | .command = it85xx_spi_send_command, |
| 60 | .multicommand = default_spi_send_multicommand, |
| 61 | .read = ich_spi_read, |
| 62 | .write_256 = ich_spi_write_256, |
| 63 | }, |
| 64 | |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 65 | { /* SPI_CONTROLLER_IT87XX */ |
| 66 | .command = it8716f_spi_send_command, |
| 67 | .multicommand = default_spi_send_multicommand, |
| 68 | .read = it8716f_spi_chip_read, |
| 69 | .write_256 = it8716f_spi_chip_write_256, |
| 70 | }, |
| 71 | |
| 72 | { /* SPI_CONTROLLER_SB600 */ |
| 73 | .command = sb600_spi_send_command, |
| 74 | .multicommand = default_spi_send_multicommand, |
| 75 | .read = sb600_spi_read, |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 76 | .write_256 = sb600_spi_write_256, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 77 | }, |
| 78 | |
| 79 | { /* SPI_CONTROLLER_VIA */ |
| 80 | .command = ich_spi_send_command, |
| 81 | .multicommand = ich_spi_send_multicommand, |
| 82 | .read = ich_spi_read, |
| 83 | .write_256 = ich_spi_write_256, |
| 84 | }, |
| 85 | |
| 86 | { /* SPI_CONTROLLER_WBSIO */ |
| 87 | .command = wbsio_spi_send_command, |
| 88 | .multicommand = default_spi_send_multicommand, |
| 89 | .read = wbsio_spi_read, |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 90 | .write_256 = spi_chip_write_1, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 91 | }, |
Carl-Daniel Hailfinger | 2f43616 | 2010-07-28 15:08:35 +0000 | [diff] [blame] | 92 | |
| 93 | { /* SPI_CONTROLLER_MCP6X_BITBANG */ |
| 94 | .command = bitbang_spi_send_command, |
| 95 | .multicommand = default_spi_send_multicommand, |
| 96 | .read = bitbang_spi_read, |
| 97 | .write_256 = bitbang_spi_write_256, |
| 98 | }, |
Carl-Daniel Hailfinger | 66ef4e5 | 2009-12-13 22:28:00 +0000 | [diff] [blame] | 99 | #endif |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 100 | #endif |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 101 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 102 | #if CONFIG_FT2232_SPI == 1 |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 103 | { /* SPI_CONTROLLER_FT2232 */ |
| 104 | .command = ft2232_spi_send_command, |
| 105 | .multicommand = default_spi_send_multicommand, |
| 106 | .read = ft2232_spi_read, |
| 107 | .write_256 = ft2232_spi_write_256, |
| 108 | }, |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 109 | #endif |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 110 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 111 | #if CONFIG_DUMMY == 1 |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 112 | { /* SPI_CONTROLLER_DUMMY */ |
| 113 | .command = dummy_spi_send_command, |
| 114 | .multicommand = default_spi_send_multicommand, |
Carl-Daniel Hailfinger | 1b0ba89 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 115 | .read = dummy_spi_read, |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 116 | .write_256 = dummy_spi_write_256, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 117 | }, |
Carl-Daniel Hailfinger | 4740c6f | 2009-09-16 10:09:21 +0000 | [diff] [blame] | 118 | #endif |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 119 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 120 | #if CONFIG_BUSPIRATE_SPI == 1 |
Carl-Daniel Hailfinger | 5cca01f | 2009-11-24 00:20:03 +0000 | [diff] [blame] | 121 | { /* SPI_CONTROLLER_BUSPIRATE */ |
| 122 | .command = buspirate_spi_send_command, |
| 123 | .multicommand = default_spi_send_multicommand, |
| 124 | .read = buspirate_spi_read, |
Carl-Daniel Hailfinger | 408e47a | 2010-03-22 03:30:58 +0000 | [diff] [blame] | 125 | .write_256 = buspirate_spi_write_256, |
Carl-Daniel Hailfinger | 5cca01f | 2009-11-24 00:20:03 +0000 | [diff] [blame] | 126 | }, |
| 127 | #endif |
| 128 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 129 | #if CONFIG_DEDIPROG == 1 |
Carl-Daniel Hailfinger | d38fac8 | 2010-01-19 11:15:48 +0000 | [diff] [blame] | 130 | { /* SPI_CONTROLLER_DEDIPROG */ |
| 131 | .command = dediprog_spi_send_command, |
| 132 | .multicommand = default_spi_send_multicommand, |
| 133 | .read = dediprog_spi_read, |
Carl-Daniel Hailfinger | 306b818 | 2010-11-23 21:28:16 +0000 | [diff] [blame] | 134 | .write_256 = dediprog_spi_write_256, |
Carl-Daniel Hailfinger | d38fac8 | 2010-01-19 11:15:48 +0000 | [diff] [blame] | 135 | }, |
| 136 | #endif |
| 137 | |
Carl-Daniel Hailfinger | e7fdd6e | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 138 | #if CONFIG_RAYER_SPI == 1 |
| 139 | { /* SPI_CONTROLLER_RAYER */ |
| 140 | .command = bitbang_spi_send_command, |
| 141 | .multicommand = default_spi_send_multicommand, |
| 142 | .read = bitbang_spi_read, |
| 143 | .write_256 = bitbang_spi_write_256, |
| 144 | }, |
| 145 | #endif |
| 146 | |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 147 | #if CONFIG_NICINTEL_SPI == 1 |
| 148 | { /* SPI_CONTROLLER_NICINTEL */ |
| 149 | .command = bitbang_spi_send_command, |
| 150 | .multicommand = default_spi_send_multicommand, |
| 151 | .read = bitbang_spi_read, |
| 152 | .write_256 = bitbang_spi_write_256, |
| 153 | }, |
| 154 | #endif |
| 155 | |
Mark Marshall | 90021f2 | 2010-12-03 14:48:11 +0000 | [diff] [blame] | 156 | #if CONFIG_OGP_SPI == 1 |
| 157 | { /* SPI_CONTROLLER_OGP */ |
| 158 | .command = bitbang_spi_send_command, |
| 159 | .multicommand = default_spi_send_multicommand, |
| 160 | .read = bitbang_spi_read, |
| 161 | .write_256 = bitbang_spi_write_256, |
| 162 | }, |
| 163 | #endif |
| 164 | |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 165 | {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 166 | }; |
| 167 | |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 168 | const int spi_programmer_count = ARRAY_SIZE(spi_programmer); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 169 | |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 170 | int spi_send_command(unsigned int writecnt, unsigned int readcnt, |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 171 | const unsigned char *writearr, unsigned char *readarr) |
Carl-Daniel Hailfinger | 3d94a0e | 2007-10-16 21:09:06 +0000 | [diff] [blame] | 172 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 173 | if (!spi_programmer[spi_controller].command) { |
Sean Nelson | 316a29f | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 174 | msg_perr("%s called, but SPI is unsupported on this " |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 175 | "hardware. Please report a bug at " |
| 176 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 177 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 178 | } |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 179 | |
| 180 | return spi_programmer[spi_controller].command(writecnt, readcnt, |
| 181 | writearr, readarr); |
Carl-Daniel Hailfinger | 3d94a0e | 2007-10-16 21:09:06 +0000 | [diff] [blame] | 182 | } |
| 183 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 184 | int spi_send_multicommand(struct spi_command *cmds) |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 185 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 186 | if (!spi_programmer[spi_controller].multicommand) { |
Sean Nelson | 316a29f | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 187 | msg_perr("%s called, but SPI is unsupported on this " |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 188 | "hardware. Please report a bug at " |
| 189 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 190 | return 1; |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 191 | } |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 192 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 193 | return spi_programmer[spi_controller].multicommand(cmds); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 194 | } |
| 195 | |
| 196 | int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, |
| 197 | const unsigned char *writearr, unsigned char *readarr) |
| 198 | { |
| 199 | struct spi_command cmd[] = { |
| 200 | { |
| 201 | .writecnt = writecnt, |
| 202 | .readcnt = readcnt, |
| 203 | .writearr = writearr, |
| 204 | .readarr = readarr, |
| 205 | }, { |
| 206 | .writecnt = 0, |
| 207 | .writearr = NULL, |
| 208 | .readcnt = 0, |
| 209 | .readarr = NULL, |
| 210 | }}; |
| 211 | |
| 212 | return spi_send_multicommand(cmd); |
| 213 | } |
| 214 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 215 | int default_spi_send_multicommand(struct spi_command *cmds) |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 216 | { |
| 217 | int result = 0; |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 218 | for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { |
| 219 | result = spi_send_command(cmds->writecnt, cmds->readcnt, |
| 220 | cmds->writearr, cmds->readarr); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 221 | } |
| 222 | return result; |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 223 | } |
| 224 | |
Carl-Daniel Hailfinger | cbf563c | 2009-06-16 08:55:44 +0000 | [diff] [blame] | 225 | int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) |
Ronald Hoogenboom | 7ff530b | 2008-01-19 00:04:46 +0000 | [diff] [blame] | 226 | { |
Carl-Daniel Hailfinger | ec489e4 | 2010-09-15 00:13:02 +0000 | [diff] [blame] | 227 | int addrbase = 0; |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 228 | if (!spi_programmer[spi_controller].read) { |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 229 | msg_perr("%s called, but SPI read is unsupported on this " |
| 230 | "hardware. Please report a bug at " |
| 231 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 232 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 233 | } |
| 234 | |
Carl-Daniel Hailfinger | ec489e4 | 2010-09-15 00:13:02 +0000 | [diff] [blame] | 235 | /* Check if the chip fits between lowest valid and highest possible |
| 236 | * address. Highest possible address with the current SPI implementation |
| 237 | * means 0xffffff, the highest unsigned 24bit number. |
| 238 | */ |
| 239 | addrbase = spi_get_valid_read_addr(); |
| 240 | if (addrbase + flash->total_size * 1024 > (1 << 24)) { |
| 241 | msg_perr("Flash chip size exceeds the allowed access window. "); |
| 242 | msg_perr("Read will probably fail.\n"); |
| 243 | /* Try to get the best alignment subject to constraints. */ |
| 244 | addrbase = (1 << 24) - flash->total_size * 1024; |
| 245 | } |
| 246 | /* Check if alignment is native (at least the largest power of two which |
| 247 | * is a factor of the mapped size of the chip). |
| 248 | */ |
| 249 | if (ffs(flash->total_size * 1024) > (ffs(addrbase) ? : 33)) { |
| 250 | msg_perr("Flash chip is not aligned natively in the allowed " |
| 251 | "access window.\n"); |
| 252 | msg_perr("Read will probably return garbage.\n"); |
| 253 | } |
| 254 | return spi_programmer[spi_controller].read(flash, buf, addrbase + start, len); |
Ronald Hoogenboom | 7ff530b | 2008-01-19 00:04:46 +0000 | [diff] [blame] | 255 | } |
| 256 | |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 257 | /* |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 258 | * Program chip using page (256 bytes) programming. |
| 259 | * Some SPI masters can't do this, they use single byte programming instead. |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 260 | * The redirect to single byte programming is achieved by setting |
| 261 | * .write_256 = spi_chip_write_1 |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 262 | */ |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 263 | /* real chunksize is up to 256, logical chunksize is 256 */ |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 264 | int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) |
Carl-Daniel Hailfinger | bfe5b4a | 2008-05-13 23:03:12 +0000 | [diff] [blame] | 265 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 266 | if (!spi_programmer[spi_controller].write_256) { |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 267 | msg_perr("%s called, but SPI page write is unsupported on this " |
| 268 | "hardware. Please report a bug at " |
| 269 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 270 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 273 | return spi_programmer[spi_controller].write_256(flash, buf, start, len); |
| 274 | } |
| 275 | |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 276 | /* |
| 277 | * Get the lowest allowed address for read accesses. This often happens to |
| 278 | * be the lowest allowed address for all commands which take an address. |
| 279 | * This is a programmer limitation. |
| 280 | */ |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 281 | uint32_t spi_get_valid_read_addr(void) |
| 282 | { |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 283 | switch (spi_controller) { |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 284 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 285 | #if defined(__i386__) || defined(__x86_64__) |
| 286 | case SPI_CONTROLLER_ICH7: |
| 287 | /* Return BBAR for ICH chipsets. */ |
| 288 | return ichspi_bbar; |
| 289 | #endif |
| 290 | #endif |
| 291 | default: |
| 292 | return 0; |
| 293 | } |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 294 | } |