Move the SPI #defines from spi.c to spi.h
This patch has no code changes.
Corresponding to flashrom svn r228 and coreboot v2 svn r3302.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
diff --git a/spi.c b/spi.c
index cf547c5..cba6942 100644
--- a/spi.c
+++ b/spi.c
@@ -27,70 +27,11 @@
#include <stdint.h>
#include <string.h>
#include "flash.h"
+#include "spi.h"
#define ITE_SUPERIO_PORT1 0x2e
#define ITE_SUPERIO_PORT2 0x4e
-/* Read Electronic ID */
-#define JEDEC_RDID 0x9f
-#define JEDEC_RDID_OUTSIZE 0x01
-#define JEDEC_RDID_INSIZE 0x03
-
-/* Write Enable */
-#define JEDEC_WREN 0x06
-#define JEDEC_WREN_OUTSIZE 0x01
-#define JEDEC_WREN_INSIZE 0x00
-
-/* Write Disable */
-#define JEDEC_WRDI 0x04
-#define JEDEC_WRDI_OUTSIZE 0x01
-#define JEDEC_WRDI_INSIZE 0x00
-
-/* Chip Erase 0x60 is supported by Macronix/SST chips. */
-#define JEDEC_CE_60 0x60
-#define JEDEC_CE_60_OUTSIZE 0x01
-#define JEDEC_CE_60_INSIZE 0x00
-
-/* Chip Erase 0xc7 is supported by ST/EON/Macronix chips. */
-#define JEDEC_CE_C7 0xc7
-#define JEDEC_CE_C7_OUTSIZE 0x01
-#define JEDEC_CE_C7_INSIZE 0x00
-
-/* Block Erase 0x52 is supported by SST chips. */
-#define JEDEC_BE_52 0x52
-#define JEDEC_BE_52_OUTSIZE 0x04
-#define JEDEC_BE_52_INSIZE 0x00
-
-/* Block Erase 0xd8 is supported by EON/Macronix chips. */
-#define JEDEC_BE_D8 0xd8
-#define JEDEC_BE_D8_OUTSIZE 0x04
-#define JEDEC_BE_D8_INSIZE 0x00
-
-/* Sector Erase 0x20 is supported by Macronix/SST chips. */
-#define JEDEC_SE 0x20
-#define JEDEC_SE_OUTSIZE 0x04
-#define JEDEC_SE_INSIZE 0x00
-
-/* Read Status Register */
-#define JEDEC_RDSR 0x05
-#define JEDEC_RDSR_OUTSIZE 0x01
-#define JEDEC_RDSR_INSIZE 0x01
-#define JEDEC_RDSR_BIT_WIP (0x01 << 0)
-
-/* Write Status Register */
-#define JEDEC_WRSR 0x01
-#define JEDEC_WRSR_OUTSIZE 0x02
-#define JEDEC_WRSR_INSIZE 0x00
-
-/* Read the memory */
-#define JEDEC_READ 0x03
-#define JEDEC_READ_OUTSIZE 0x04
-/* JEDEC_READ_INSIZE : any length */
-
-/* Write memory byte */
-#define JEDEC_BYTE_PROGRAM 0x02
-#define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05
-#define JEDEC_BYTE_PROGRAM_INSIZE 0x00
uint16_t it8716f_flashport = 0;
/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */