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Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger3431bb72009-06-24 08:28:39 +00004 * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger
Stefan Reinauera9424d52008-06-27 16:28:34 +00005 * Copyright (C) 2008 coresystems GmbH
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Contains the generic SPI framework
23 */
24
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000025#include "flash.h"
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000026#include "flashchips.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000027#include "chipdrivers.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000028#include "programmer.h"
Carl-Daniel Hailfingerd6cbf762008-05-13 14:58:23 +000029#include "spi.h"
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000030
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +000031enum spi_controller spi_controller = SPI_CONTROLLER_NONE;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +000032
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +000033void spi_prettyprint_status_register(struct flashchip *flash);
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000034
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000035const struct spi_programmer spi_programmer[] = {
36 { /* SPI_CONTROLLER_NONE */
37 .command = NULL,
38 .multicommand = NULL,
39 .read = NULL,
40 .write_256 = NULL,
41 },
42
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000043#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000044#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000045 { /* SPI_CONTROLLER_ICH7 */
46 .command = ich_spi_send_command,
47 .multicommand = ich_spi_send_multicommand,
48 .read = ich_spi_read,
49 .write_256 = ich_spi_write_256,
50 },
51
52 { /* SPI_CONTROLLER_ICH9 */
53 .command = ich_spi_send_command,
54 .multicommand = ich_spi_send_multicommand,
55 .read = ich_spi_read,
56 .write_256 = ich_spi_write_256,
57 },
58
59 { /* SPI_CONTROLLER_IT87XX */
60 .command = it8716f_spi_send_command,
61 .multicommand = default_spi_send_multicommand,
62 .read = it8716f_spi_chip_read,
63 .write_256 = it8716f_spi_chip_write_256,
64 },
65
66 { /* SPI_CONTROLLER_SB600 */
67 .command = sb600_spi_send_command,
68 .multicommand = default_spi_send_multicommand,
69 .read = sb600_spi_read,
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +000070 .write_256 = sb600_spi_write_256,
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000071 },
72
73 { /* SPI_CONTROLLER_VIA */
74 .command = ich_spi_send_command,
75 .multicommand = ich_spi_send_multicommand,
76 .read = ich_spi_read,
77 .write_256 = ich_spi_write_256,
78 },
79
80 { /* SPI_CONTROLLER_WBSIO */
81 .command = wbsio_spi_send_command,
82 .multicommand = default_spi_send_multicommand,
83 .read = wbsio_spi_read,
Carl-Daniel Hailfingerca812d42010-07-14 19:57:52 +000084 .write_256 = spi_chip_write_1_new,
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000085 },
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000086#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000087#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000088
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000089#if CONFIG_FT2232_SPI == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000090 { /* SPI_CONTROLLER_FT2232 */
91 .command = ft2232_spi_send_command,
92 .multicommand = default_spi_send_multicommand,
93 .read = ft2232_spi_read,
94 .write_256 = ft2232_spi_write_256,
95 },
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000096#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000097
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +000098#if CONFIG_DUMMY == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000099 { /* SPI_CONTROLLER_DUMMY */
100 .command = dummy_spi_send_command,
101 .multicommand = default_spi_send_multicommand,
Carl-Daniel Hailfinger1b0ba892010-06-20 10:58:32 +0000102 .read = dummy_spi_read,
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000103 .write_256 = dummy_spi_write_256,
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000104 },
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000105#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000106
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000107#if CONFIG_BUSPIRATE_SPI == 1
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000108 { /* SPI_CONTROLLER_BUSPIRATE */
109 .command = buspirate_spi_send_command,
110 .multicommand = default_spi_send_multicommand,
111 .read = buspirate_spi_read,
Carl-Daniel Hailfinger408e47a2010-03-22 03:30:58 +0000112 .write_256 = buspirate_spi_write_256,
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000113 },
114#endif
115
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000116#if CONFIG_DEDIPROG == 1
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000117 { /* SPI_CONTROLLER_DEDIPROG */
118 .command = dediprog_spi_send_command,
119 .multicommand = default_spi_send_multicommand,
120 .read = dediprog_spi_read,
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000121 .write_256 = spi_chip_write_1_new,
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000122 },
123#endif
124
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000125#if CONFIG_RAYER_SPI == 1
126 { /* SPI_CONTROLLER_RAYER */
127 .command = bitbang_spi_send_command,
128 .multicommand = default_spi_send_multicommand,
129 .read = bitbang_spi_read,
130 .write_256 = bitbang_spi_write_256,
131 },
132#endif
133
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000134 {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000135};
136
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000137const int spi_programmer_count = ARRAY_SIZE(spi_programmer);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000138
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000139int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000140 const unsigned char *writearr, unsigned char *readarr)
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000141{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000142 if (!spi_programmer[spi_controller].command) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000143 msg_perr("%s called, but SPI is unsupported on this "
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000144 "hardware. Please report a bug at "
145 "flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000146 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000147 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000148
149 return spi_programmer[spi_controller].command(writecnt, readcnt,
150 writearr, readarr);
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000151}
152
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000153int spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000154{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000155 if (!spi_programmer[spi_controller].multicommand) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000156 msg_perr("%s called, but SPI is unsupported on this "
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000157 "hardware. Please report a bug at "
158 "flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000159 return 1;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000160 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000161
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000162 return spi_programmer[spi_controller].multicommand(cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000163}
164
165int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
166 const unsigned char *writearr, unsigned char *readarr)
167{
168 struct spi_command cmd[] = {
169 {
170 .writecnt = writecnt,
171 .readcnt = readcnt,
172 .writearr = writearr,
173 .readarr = readarr,
174 }, {
175 .writecnt = 0,
176 .writearr = NULL,
177 .readcnt = 0,
178 .readarr = NULL,
179 }};
180
181 return spi_send_multicommand(cmd);
182}
183
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000184int default_spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000185{
186 int result = 0;
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000187 for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
188 result = spi_send_command(cmds->writecnt, cmds->readcnt,
189 cmds->writearr, cmds->readarr);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000190 }
191 return result;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000192}
193
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000194int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000195{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000196 if (!spi_programmer[spi_controller].read) {
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000197 msg_perr("%s called, but SPI read is unsupported on this "
198 "hardware. Please report a bug at "
199 "flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000200 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000201 }
202
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000203 return spi_programmer[spi_controller].read(flash, buf, start, len);
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000204}
205
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000206/*
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000207 * Program chip using page (256 bytes) programming.
208 * Some SPI masters can't do this, they use single byte programming instead.
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000209 * The redirect to single byte programming is achieved by setting
210 * .write_256 = spi_chip_write_1
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000211 */
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000212/* real chunksize is up to 256, logical chunksize is 256 */
213int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len)
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000214{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000215 if (!spi_programmer[spi_controller].write_256) {
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000216 msg_perr("%s called, but SPI page write is unsupported on this "
217 "hardware. Please report a bug at "
218 "flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000219 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000220 }
221
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000222 return spi_programmer[spi_controller].write_256(flash, buf, start, len);
223}
224
225/* Wrapper function until the generic code is converted to partial writes. */
226int spi_chip_write_256(struct flashchip *flash, uint8_t *buf)
227{
228 int ret;
229
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000230 msg_pinfo("Erasing flash before programming... ");
231 if (erase_flash(flash)) {
232 msg_perr("ERASE FAILED!\n");
233 return -1;
234 }
235 msg_pinfo("done.\n");
236 msg_pinfo("Programming flash... ");
237 ret = spi_chip_write_256_new(flash, buf, 0, flash->total_size * 1024);
238 if (!ret)
239 msg_pinfo("done.\n");
240 else
241 msg_pinfo("\n");
242 return ret;
Carl-Daniel Hailfinger6b444962007-10-18 00:24:07 +0000243}
Peter Stugefd9217d2009-01-26 03:37:40 +0000244
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000245/*
246 * Get the lowest allowed address for read accesses. This often happens to
247 * be the lowest allowed address for all commands which take an address.
248 * This is a programmer limitation.
249 */
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000250uint32_t spi_get_valid_read_addr(void)
251{
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000252 switch (spi_controller) {
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000253#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000254#if defined(__i386__) || defined(__x86_64__)
255 case SPI_CONTROLLER_ICH7:
256 /* Return BBAR for ICH chipsets. */
257 return ichspi_bbar;
258#endif
259#endif
260 default:
261 return 0;
262 }
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000263}