blob: 41bb8f31e52c65d692c01d8247dcecc1e20c12ba [file] [log] [blame]
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger3431bb72009-06-24 08:28:39 +00004 * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger
Stefan Reinauera9424d52008-06-27 16:28:34 +00005 * Copyright (C) 2008 coresystems GmbH
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Contains the generic SPI framework
23 */
24
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000025#include <string.h>
26#include "flash.h"
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000027#include "flashchips.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000028#include "chipdrivers.h"
Carl-Daniel Hailfingerd6cbf762008-05-13 14:58:23 +000029#include "spi.h"
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000030
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +000031enum spi_controller spi_controller = SPI_CONTROLLER_NONE;
32void *spibar = NULL;
33
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +000034void spi_prettyprint_status_register(struct flashchip *flash);
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000035
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000036const struct spi_programmer spi_programmer[] = {
37 { /* SPI_CONTROLLER_NONE */
38 .command = NULL,
39 .multicommand = NULL,
40 .read = NULL,
41 .write_256 = NULL,
42 },
43
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000044#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000045 { /* SPI_CONTROLLER_ICH7 */
46 .command = ich_spi_send_command,
47 .multicommand = ich_spi_send_multicommand,
48 .read = ich_spi_read,
49 .write_256 = ich_spi_write_256,
50 },
51
52 { /* SPI_CONTROLLER_ICH9 */
53 .command = ich_spi_send_command,
54 .multicommand = ich_spi_send_multicommand,
55 .read = ich_spi_read,
56 .write_256 = ich_spi_write_256,
57 },
58
59 { /* SPI_CONTROLLER_IT87XX */
60 .command = it8716f_spi_send_command,
61 .multicommand = default_spi_send_multicommand,
62 .read = it8716f_spi_chip_read,
63 .write_256 = it8716f_spi_chip_write_256,
64 },
65
66 { /* SPI_CONTROLLER_SB600 */
67 .command = sb600_spi_send_command,
68 .multicommand = default_spi_send_multicommand,
69 .read = sb600_spi_read,
70 .write_256 = sb600_spi_write_1,
71 },
72
73 { /* SPI_CONTROLLER_VIA */
74 .command = ich_spi_send_command,
75 .multicommand = ich_spi_send_multicommand,
76 .read = ich_spi_read,
77 .write_256 = ich_spi_write_256,
78 },
79
80 { /* SPI_CONTROLLER_WBSIO */
81 .command = wbsio_spi_send_command,
82 .multicommand = default_spi_send_multicommand,
83 .read = wbsio_spi_read,
84 .write_256 = wbsio_spi_write_1,
85 },
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000086#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000087
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000088#if FT2232_SPI_SUPPORT == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000089 { /* SPI_CONTROLLER_FT2232 */
90 .command = ft2232_spi_send_command,
91 .multicommand = default_spi_send_multicommand,
92 .read = ft2232_spi_read,
93 .write_256 = ft2232_spi_write_256,
94 },
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000095#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000096
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000097#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000098 { /* SPI_CONTROLLER_DUMMY */
99 .command = dummy_spi_send_command,
100 .multicommand = default_spi_send_multicommand,
101 .read = NULL,
102 .write_256 = NULL,
103 },
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000104#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000105
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000106#if BUSPIRATE_SPI_SUPPORT == 1
107 { /* SPI_CONTROLLER_BUSPIRATE */
108 .command = buspirate_spi_send_command,
109 .multicommand = default_spi_send_multicommand,
110 .read = buspirate_spi_read,
111 .write_256 = spi_chip_write_1,
112 },
113#endif
114
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000115#if DEDIPROG_SUPPORT == 1
116 { /* SPI_CONTROLLER_DEDIPROG */
117 .command = dediprog_spi_send_command,
118 .multicommand = default_spi_send_multicommand,
119 .read = dediprog_spi_read,
120 .write_256 = spi_chip_write_1,
121 },
122#endif
123
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000124 {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000125};
126
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000127const int spi_programmer_count = ARRAY_SIZE(spi_programmer);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000128
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000129int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000130 const unsigned char *writearr, unsigned char *readarr)
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000131{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000132 if (!spi_programmer[spi_controller].command) {
133 fprintf(stderr, "%s called, but SPI is unsupported on this "
134 "hardware. Please report a bug.\n", __func__);
135 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000136 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000137
138 return spi_programmer[spi_controller].command(writecnt, readcnt,
139 writearr, readarr);
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000140}
141
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000142int spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000143{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000144 if (!spi_programmer[spi_controller].multicommand) {
145 fprintf(stderr, "%s called, but SPI is unsupported on this "
146 "hardware. Please report a bug.\n", __func__);
147 return 1;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000148 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000149
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000150 return spi_programmer[spi_controller].multicommand(cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000151}
152
153int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
154 const unsigned char *writearr, unsigned char *readarr)
155{
156 struct spi_command cmd[] = {
157 {
158 .writecnt = writecnt,
159 .readcnt = readcnt,
160 .writearr = writearr,
161 .readarr = readarr,
162 }, {
163 .writecnt = 0,
164 .writearr = NULL,
165 .readcnt = 0,
166 .readarr = NULL,
167 }};
168
169 return spi_send_multicommand(cmd);
170}
171
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000172int default_spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000173{
174 int result = 0;
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000175 for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
176 result = spi_send_command(cmds->writecnt, cmds->readcnt,
177 cmds->writearr, cmds->readarr);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000178 }
179 return result;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000180}
181
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000182int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000183{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000184 if (!spi_programmer[spi_controller].read) {
185 fprintf(stderr, "%s called, but SPI read is unsupported on this"
186 " hardware. Please report a bug.\n", __func__);
187 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000188 }
189
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000190 return spi_programmer[spi_controller].read(flash, buf, start, len);
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000191}
192
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000193/*
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000194 * Program chip using page (256 bytes) programming.
195 * Some SPI masters can't do this, they use single byte programming instead.
196 */
Carl-Daniel Hailfinger8d497012009-05-09 02:34:18 +0000197int spi_chip_write_256(struct flashchip *flash, uint8_t *buf)
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000198{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000199 if (!spi_programmer[spi_controller].write_256) {
200 fprintf(stderr, "%s called, but SPI page write is unsupported "
201 " on this hardware. Please report a bug.\n", __func__);
202 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000203 }
204
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000205 return spi_programmer[spi_controller].write_256(flash, buf);
Carl-Daniel Hailfinger6b444962007-10-18 00:24:07 +0000206}
Peter Stugefd9217d2009-01-26 03:37:40 +0000207
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000208uint32_t spi_get_valid_read_addr(void)
209{
210 /* Need to return BBAR for ICH chipsets. */
211 return 0;
212}