Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 22 | #include "chipdrivers.h" |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 23 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 24 | /* WARNING! |
| 25 | This chip uses the standard JEDEC Addresses in 16-bit mode as word |
| 26 | addresses. In byte mode, 0xAAA has to be used instead of 0x555 and |
| 27 | 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC |
| 28 | functions. */ |
| 29 | |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 30 | /* chunksize is 1 */ |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 31 | int write_m29f400bt(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 32 | { |
| 33 | int i; |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 34 | chipaddr bios = flash->virtual_memory; |
| 35 | chipaddr dst = flash->virtual_memory + start; |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 36 | |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 37 | for (i = 0; i < len; i++) { |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 38 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 39 | chip_writeb(flash, 0x55, bios + 0x555); |
| 40 | chip_writeb(flash, 0xA0, bios + 0xAAA); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 41 | |
| 42 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 43 | chip_writeb(flash, *src, dst); |
| 44 | toggle_ready_jedec(flash, dst); |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 45 | #if 0 |
| 46 | /* We only want to print something in the error case. */ |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 47 | msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 48 | (dst - bios), chip_readb(flash, dst), *src); |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 49 | #endif |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 50 | dst++; |
| 51 | src++; |
| 52 | } |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 53 | |
| 54 | /* FIXME: Ignore errors for now. */ |
| 55 | return 0; |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 56 | } |
| 57 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 58 | int probe_m29f400bt(struct flashctx *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 59 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 60 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 61 | uint8_t id1, id2; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 62 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 63 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 64 | chip_writeb(flash, 0x55, bios + 0x555); |
| 65 | chip_writeb(flash, 0x90, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 66 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 67 | programmer_delay(10); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 68 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 69 | id1 = chip_readb(flash, bios); |
Carl-Daniel Hailfinger | c2a1845 | 2007-12-31 01:18:26 +0000 | [diff] [blame] | 70 | /* The data sheet says id2 is at (bios + 0x01) and id2 listed in |
| 71 | * flash.h does not match. It should be possible to use JEDEC probe. |
| 72 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 73 | id2 = chip_readb(flash, bios + 0x02); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 74 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 75 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 76 | chip_writeb(flash, 0x55, bios + 0x555); |
| 77 | chip_writeb(flash, 0xF0, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 78 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 79 | programmer_delay(10); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 80 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 81 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 82 | |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 83 | if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 84 | return 1; |
| 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 89 | int erase_m29f400bt(struct flashctx *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 90 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 91 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 92 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 93 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 94 | chip_writeb(flash, 0x55, bios + 0x555); |
| 95 | chip_writeb(flash, 0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 96 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 97 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 98 | chip_writeb(flash, 0x55, bios + 0x555); |
| 99 | chip_writeb(flash, 0x10, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 100 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 101 | programmer_delay(10); |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 102 | toggle_ready_jedec(flash, bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 103 | |
Carl-Daniel Hailfinger | b4061f6 | 2011-06-26 17:04:16 +0000 | [diff] [blame] | 104 | /* FIXME: Check the status register for errors. */ |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 105 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 106 | } |
| 107 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 108 | int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, |
| 109 | unsigned int len) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 110 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 111 | chipaddr bios = flash->virtual_memory; |
| 112 | chipaddr dst = bios + start; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 113 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 114 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 115 | chip_writeb(flash, 0x55, bios + 0x555); |
| 116 | chip_writeb(flash, 0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 117 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 118 | chip_writeb(flash, 0xAA, bios + 0xAAA); |
| 119 | chip_writeb(flash, 0x55, bios + 0x555); |
| 120 | chip_writeb(flash, 0x30, dst); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 121 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 122 | programmer_delay(10); |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 123 | toggle_ready_jedec(flash, bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 124 | |
Carl-Daniel Hailfinger | b4061f6 | 2011-06-26 17:04:16 +0000 | [diff] [blame] | 125 | /* FIXME: Check the status register for errors. */ |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 126 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 127 | } |
| 128 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 129 | int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, |
| 130 | unsigned int blocklen) |
Sean Nelson | 6b11ad2 | 2009-12-23 17:05:59 +0000 | [diff] [blame] | 131 | { |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 132 | if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 133 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | 6b11ad2 | 2009-12-23 17:05:59 +0000 | [diff] [blame] | 134 | __func__); |
| 135 | return -1; |
| 136 | } |
| 137 | return erase_m29f400bt(flash); |
| 138 | } |