Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 22 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame^] | 23 | /* WARNING! |
| 24 | This chip uses the standard JEDEC Addresses in 16-bit mode as word |
| 25 | addresses. In byte mode, 0xAAA has to be used instead of 0x555 and |
| 26 | 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC |
| 27 | functions. */ |
| 28 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 29 | void write_page_m29f400bt(chipaddr bios, uint8_t *src, |
| 30 | chipaddr dst, int page_size) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 31 | { |
| 32 | int i; |
| 33 | |
| 34 | for (i = 0; i < page_size; i++) { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 35 | chip_writeb(0xAA, bios + 0xAAA); |
| 36 | chip_writeb(0x55, bios + 0x555); |
| 37 | chip_writeb(0xA0, bios + 0xAAA); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 38 | |
| 39 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 40 | chip_writeb(*src, dst); |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 41 | //chip_writeb(0xF0, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 42 | //programmer_delay(5); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 43 | toggle_ready_jedec(dst); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 44 | printf |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 45 | ("Value in the flash at address 0x%lx = %#x, want %#x\n", |
| 46 | (dst - bios), chip_readb(dst), *src); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 47 | dst++; |
| 48 | src++; |
| 49 | } |
| 50 | } |
| 51 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 52 | int probe_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 53 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 54 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 55 | uint8_t id1, id2; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 56 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 57 | chip_writeb(0xAA, bios + 0xAAA); |
| 58 | chip_writeb(0x55, bios + 0x555); |
| 59 | chip_writeb(0x90, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 60 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 61 | programmer_delay(10); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 62 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 63 | id1 = chip_readb(bios); |
Carl-Daniel Hailfinger | c2a1845 | 2007-12-31 01:18:26 +0000 | [diff] [blame] | 64 | /* The data sheet says id2 is at (bios + 0x01) and id2 listed in |
| 65 | * flash.h does not match. It should be possible to use JEDEC probe. |
| 66 | */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 67 | id2 = chip_readb(bios + 0x02); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 68 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 69 | chip_writeb(0xAA, bios + 0xAAA); |
| 70 | chip_writeb(0x55, bios + 0x555); |
| 71 | chip_writeb(0xF0, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 72 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 73 | programmer_delay(10); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 74 | |
Uwe Hermann | 04aa59a | 2009-09-02 22:09:00 +0000 | [diff] [blame] | 75 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 76 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 77 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 78 | return 1; |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 83 | int erase_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 84 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 85 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 86 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 87 | chip_writeb(0xAA, bios + 0xAAA); |
| 88 | chip_writeb(0x55, bios + 0x555); |
| 89 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 90 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 91 | chip_writeb(0xAA, bios + 0xAAA); |
| 92 | chip_writeb(0x55, bios + 0x555); |
| 93 | chip_writeb(0x10, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 94 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 95 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 96 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 97 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 98 | if (check_erased_range(flash, 0, flash->total_size * 1024)) { |
| 99 | fprintf(stderr, "ERASE FAILED!\n"); |
| 100 | return -1; |
| 101 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 102 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 105 | int block_erase_m29f400bt(struct flashchip *flash, int start, int len) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 106 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 107 | chipaddr bios = flash->virtual_memory; |
| 108 | chipaddr dst = bios + start; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 109 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 110 | chip_writeb(0xAA, bios + 0xAAA); |
| 111 | chip_writeb(0x55, bios + 0x555); |
| 112 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 113 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 114 | chip_writeb(0xAA, bios + 0xAAA); |
| 115 | chip_writeb(0x55, bios + 0x555); |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 116 | //chip_writeb(0x10, bios + 0xAAA); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 117 | chip_writeb(0x30, dst); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 118 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 119 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 120 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 121 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 122 | if (check_erased_range(flash, start, len)) { |
| 123 | fprintf(stderr, "ERASE FAILED!\n"); |
| 124 | return -1; |
| 125 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 126 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 127 | } |
| 128 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 129 | int write_m29f400bt(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 130 | { |
| 131 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 132 | int total_size = flash->total_size * 1024; |
| 133 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 134 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 135 | |
| 136 | //erase_m29f400bt (flash); |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 137 | printf("Programming page:\n "); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 138 | /********************************* |
| 139 | *Pages for M29F400BT: |
| 140 | * 16 0x7c000 0x7ffff TOP |
| 141 | * 8 0x7a000 0x7bfff |
| 142 | * 8 0x78000 0x79fff |
| 143 | * 32 0x70000 0x77fff |
| 144 | * 64 0x60000 0x6ffff |
| 145 | * 64 0x50000 0x5ffff |
| 146 | * 64 0x40000 0x4ffff |
| 147 | *--------------------------------- |
| 148 | * 64 0x30000 0x3ffff |
| 149 | * 64 0x20000 0x2ffff |
| 150 | * 64 0x10000 0x1ffff |
| 151 | * 64 0x00000 0x0ffff BOTTOM |
| 152 | *********************************/ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 153 | printf("total_size/page_size = %d\n", total_size / page_size); |
| 154 | for (i = 0; i < (total_size / page_size) - 1; i++) { |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 155 | printf("%04d at address: 0x%08x\n", i, i * page_size); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 156 | if (block_erase_m29f400bt(flash, i * page_size, page_size)) { |
| 157 | fprintf(stderr, "ERASE FAILED!\n"); |
| 158 | return -1; |
| 159 | } |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 160 | write_page_m29f400bt(bios, buf + i * page_size, |
| 161 | bios + i * page_size, page_size); |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 162 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 163 | } |
| 164 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 165 | printf("%04d at address: 0x%08x\n", 7, 0x70000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 166 | if (block_erase_m29f400bt(flash, 0x70000, 32 * 1024)) { |
| 167 | fprintf(stderr, "ERASE FAILED!\n"); |
| 168 | return -1; |
| 169 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 170 | write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 171 | |
| 172 | printf("%04d at address: 0x%08x\n", 8, 0x78000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 173 | if (block_erase_m29f400bt(flash, 0x78000, 8 * 1024)) { |
| 174 | fprintf(stderr, "ERASE FAILED!\n"); |
| 175 | return -1; |
| 176 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 177 | write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 178 | |
| 179 | printf("%04d at address: 0x%08x\n", 9, 0x7a000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 180 | if (block_erase_m29f400bt(flash, 0x7a000, 8 * 1024)) { |
| 181 | fprintf(stderr, "ERASE FAILED!\n"); |
| 182 | return -1; |
| 183 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 184 | write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 185 | |
| 186 | printf("%04d at address: 0x%08x\n", 10, 0x7c000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 187 | if (block_erase_m29f400bt(flash, 0x7c000, 16 * 1024)) { |
| 188 | fprintf(stderr, "ERASE FAILED!\n"); |
| 189 | return -1; |
| 190 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 191 | write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 192 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 193 | printf("\n"); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 194 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 195 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 196 | } |
| 197 | |
Stefan Reinauer | e3f3e2e | 2008-01-18 15:33:10 +0000 | [diff] [blame] | 198 | int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 199 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 200 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 201 | |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 202 | printf("Programming page:\n "); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 203 | /********************************* |
| 204 | *Pages for M29F400BT: |
| 205 | * 16 0x7c000 0x7ffff TOP |
| 206 | * 8 0x7a000 0x7bfff |
| 207 | * 8 0x78000 0x79fff |
| 208 | * 32 0x70000 0x77fff |
| 209 | * 64 0x60000 0x6ffff |
| 210 | * 64 0x50000 0x5ffff |
| 211 | * 64 0x40000 0x4ffff |
| 212 | *--------------------------------- |
| 213 | * 64 0x30000 0x3ffff |
| 214 | * 64 0x20000 0x2ffff |
| 215 | * 64 0x10000 0x1ffff |
| 216 | * 64 0x00000 0x0ffff BOTTOM |
| 217 | *********************************/ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 218 | printf("%04d at address: 0x%08x\n", 7, 0x00000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 219 | if (block_erase_m29f400bt(flash, 0x00000, 64 * 1024)) { |
| 220 | fprintf(stderr, "ERASE FAILED!\n"); |
| 221 | return -1; |
| 222 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 223 | write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 224 | |
| 225 | printf("%04d at address: 0x%08x\n", 7, 0x10000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 226 | if (block_erase_m29f400bt(flash, 0x10000, 64 * 1024)) { |
| 227 | fprintf(stderr, "ERASE FAILED!\n"); |
| 228 | return -1; |
| 229 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 230 | write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 231 | |
| 232 | printf("%04d at address: 0x%08x\n", 7, 0x20000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 233 | if (block_erase_m29f400bt(flash, 0x20000, 64 * 1024)) { |
| 234 | fprintf(stderr, "ERASE FAILED!\n"); |
| 235 | return -1; |
| 236 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 237 | write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 238 | |
| 239 | printf("%04d at address: 0x%08x\n", 7, 0x30000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 240 | if (block_erase_m29f400bt(flash, 0x30000, 64 * 1024)) { |
| 241 | fprintf(stderr, "ERASE FAILED!\n"); |
| 242 | return -1; |
| 243 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 244 | write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 245 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 246 | printf("\n"); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 247 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 248 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 249 | } |