Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 22 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 23 | void protect_m29f400bt(chipaddr bios) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 24 | { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 25 | chip_writeb(0xAA, bios + 0xAAA); |
| 26 | chip_writeb(0x55, bios + 0x555); |
| 27 | chip_writeb(0xA0, bios + 0xAAA); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 28 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 29 | programmer_delay(200); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 30 | } |
| 31 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 32 | void write_page_m29f400bt(chipaddr bios, uint8_t *src, |
| 33 | chipaddr dst, int page_size) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 34 | { |
| 35 | int i; |
| 36 | |
| 37 | for (i = 0; i < page_size; i++) { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 38 | chip_writeb(0xAA, bios + 0xAAA); |
| 39 | chip_writeb(0x55, bios + 0x555); |
| 40 | chip_writeb(0xA0, bios + 0xAAA); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 41 | |
| 42 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 43 | chip_writeb(*src, dst); |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 44 | //chip_writeb(0xF0, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 45 | //programmer_delay(5); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 46 | toggle_ready_jedec(dst); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 47 | printf |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 48 | ("Value in the flash at address 0x%lx = %#x, want %#x\n", |
| 49 | (dst - bios), chip_readb(dst), *src); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 50 | dst++; |
| 51 | src++; |
| 52 | } |
| 53 | } |
| 54 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 55 | int probe_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 56 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 57 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 58 | uint8_t id1, id2; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 59 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 60 | chip_writeb(0xAA, bios + 0xAAA); |
| 61 | chip_writeb(0x55, bios + 0x555); |
| 62 | chip_writeb(0x90, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 63 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 64 | programmer_delay(10); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 65 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 66 | id1 = chip_readb(bios); |
Carl-Daniel Hailfinger | c2a1845 | 2007-12-31 01:18:26 +0000 | [diff] [blame] | 67 | /* The data sheet says id2 is at (bios + 0x01) and id2 listed in |
| 68 | * flash.h does not match. It should be possible to use JEDEC probe. |
| 69 | */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 70 | id2 = chip_readb(bios + 0x02); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 71 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 72 | chip_writeb(0xAA, bios + 0xAAA); |
| 73 | chip_writeb(0x55, bios + 0x555); |
| 74 | chip_writeb(0xF0, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 75 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 76 | programmer_delay(10); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 77 | |
Peter Stuge | 5cafc33 | 2009-01-25 23:52:45 +0000 | [diff] [blame] | 78 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 79 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 80 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 81 | return 1; |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 86 | int erase_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 87 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 88 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 89 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 90 | chip_writeb(0xAA, bios + 0xAAA); |
| 91 | chip_writeb(0x55, bios + 0x555); |
| 92 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 93 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 94 | chip_writeb(0xAA, bios + 0xAAA); |
| 95 | chip_writeb(0x55, bios + 0x555); |
| 96 | chip_writeb(0x10, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 97 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 98 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 99 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 100 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 101 | if (check_erased_range(flash, 0, flash->total_size * 1024)) { |
| 102 | fprintf(stderr, "ERASE FAILED!\n"); |
| 103 | return -1; |
| 104 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 105 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 106 | } |
| 107 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 108 | int block_erase_m29f400bt(struct flashchip *flash, int start, int len) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 109 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 110 | chipaddr bios = flash->virtual_memory; |
| 111 | chipaddr dst = bios + start; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 112 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 113 | chip_writeb(0xAA, bios + 0xAAA); |
| 114 | chip_writeb(0x55, bios + 0x555); |
| 115 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 116 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 117 | chip_writeb(0xAA, bios + 0xAAA); |
| 118 | chip_writeb(0x55, bios + 0x555); |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 119 | //chip_writeb(0x10, bios + 0xAAA); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 120 | chip_writeb(0x30, dst); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 121 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 122 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 123 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 124 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 125 | if (check_erased_range(flash, start, len)) { |
| 126 | fprintf(stderr, "ERASE FAILED!\n"); |
| 127 | return -1; |
| 128 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 129 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 130 | } |
| 131 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 132 | int write_m29f400bt(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 133 | { |
| 134 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 135 | int total_size = flash->total_size * 1024; |
| 136 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 137 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 138 | |
| 139 | //erase_m29f400bt (flash); |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 140 | printf("Programming page:\n "); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 141 | /********************************* |
| 142 | *Pages for M29F400BT: |
| 143 | * 16 0x7c000 0x7ffff TOP |
| 144 | * 8 0x7a000 0x7bfff |
| 145 | * 8 0x78000 0x79fff |
| 146 | * 32 0x70000 0x77fff |
| 147 | * 64 0x60000 0x6ffff |
| 148 | * 64 0x50000 0x5ffff |
| 149 | * 64 0x40000 0x4ffff |
| 150 | *--------------------------------- |
| 151 | * 64 0x30000 0x3ffff |
| 152 | * 64 0x20000 0x2ffff |
| 153 | * 64 0x10000 0x1ffff |
| 154 | * 64 0x00000 0x0ffff BOTTOM |
| 155 | *********************************/ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 156 | printf("total_size/page_size = %d\n", total_size / page_size); |
| 157 | for (i = 0; i < (total_size / page_size) - 1; i++) { |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 158 | printf("%04d at address: 0x%08x\n", i, i * page_size); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 159 | if (block_erase_m29f400bt(flash, i * page_size, page_size)) { |
| 160 | fprintf(stderr, "ERASE FAILED!\n"); |
| 161 | return -1; |
| 162 | } |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 163 | write_page_m29f400bt(bios, buf + i * page_size, |
| 164 | bios + i * page_size, page_size); |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 165 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 166 | } |
| 167 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 168 | printf("%04d at address: 0x%08x\n", 7, 0x70000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 169 | if (block_erase_m29f400bt(flash, 0x70000, 32 * 1024)) { |
| 170 | fprintf(stderr, "ERASE FAILED!\n"); |
| 171 | return -1; |
| 172 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 173 | write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 174 | |
| 175 | printf("%04d at address: 0x%08x\n", 8, 0x78000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 176 | if (block_erase_m29f400bt(flash, 0x78000, 8 * 1024)) { |
| 177 | fprintf(stderr, "ERASE FAILED!\n"); |
| 178 | return -1; |
| 179 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 180 | write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 181 | |
| 182 | printf("%04d at address: 0x%08x\n", 9, 0x7a000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 183 | if (block_erase_m29f400bt(flash, 0x7a000, 8 * 1024)) { |
| 184 | fprintf(stderr, "ERASE FAILED!\n"); |
| 185 | return -1; |
| 186 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 187 | write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 188 | |
| 189 | printf("%04d at address: 0x%08x\n", 10, 0x7c000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 190 | if (block_erase_m29f400bt(flash, 0x7c000, 16 * 1024)) { |
| 191 | fprintf(stderr, "ERASE FAILED!\n"); |
| 192 | return -1; |
| 193 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 194 | write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 195 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 196 | printf("\n"); |
| 197 | //protect_m29f400bt (bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 198 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 199 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 200 | } |
| 201 | |
Stefan Reinauer | e3f3e2e | 2008-01-18 15:33:10 +0000 | [diff] [blame] | 202 | int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 203 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 204 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 205 | |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 206 | printf("Programming page:\n "); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 207 | /********************************* |
| 208 | *Pages for M29F400BT: |
| 209 | * 16 0x7c000 0x7ffff TOP |
| 210 | * 8 0x7a000 0x7bfff |
| 211 | * 8 0x78000 0x79fff |
| 212 | * 32 0x70000 0x77fff |
| 213 | * 64 0x60000 0x6ffff |
| 214 | * 64 0x50000 0x5ffff |
| 215 | * 64 0x40000 0x4ffff |
| 216 | *--------------------------------- |
| 217 | * 64 0x30000 0x3ffff |
| 218 | * 64 0x20000 0x2ffff |
| 219 | * 64 0x10000 0x1ffff |
| 220 | * 64 0x00000 0x0ffff BOTTOM |
| 221 | *********************************/ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 222 | printf("%04d at address: 0x%08x\n", 7, 0x00000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 223 | if (block_erase_m29f400bt(flash, 0x00000, 64 * 1024)) { |
| 224 | fprintf(stderr, "ERASE FAILED!\n"); |
| 225 | return -1; |
| 226 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 227 | write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 228 | |
| 229 | printf("%04d at address: 0x%08x\n", 7, 0x10000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 230 | if (block_erase_m29f400bt(flash, 0x10000, 64 * 1024)) { |
| 231 | fprintf(stderr, "ERASE FAILED!\n"); |
| 232 | return -1; |
| 233 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 234 | write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 235 | |
| 236 | printf("%04d at address: 0x%08x\n", 7, 0x20000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 237 | if (block_erase_m29f400bt(flash, 0x20000, 64 * 1024)) { |
| 238 | fprintf(stderr, "ERASE FAILED!\n"); |
| 239 | return -1; |
| 240 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 241 | write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 242 | |
| 243 | printf("%04d at address: 0x%08x\n", 7, 0x30000); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame^] | 244 | if (block_erase_m29f400bt(flash, 0x30000, 64 * 1024)) { |
| 245 | fprintf(stderr, "ERASE FAILED!\n"); |
| 246 | return -1; |
| 247 | } |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 248 | write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 249 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 250 | printf("\n"); |
| 251 | //protect_m29f400bt (bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 252 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 253 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 254 | } |