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Ronald G. Minnichb1934902002-06-11 19:15:55 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnichb1934902002-06-11 19:15:55 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnichb1934902002-06-11 19:15:55 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnichb1934902002-06-11 19:15:55 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnichb1934902002-06-11 19:15:55 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnichb1934902002-06-11 19:15:55 +000019 */
20
21#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000022#include "chipdrivers.h"
Ronald G. Minnichb1934902002-06-11 19:15:55 +000023
Michael Karcher1c296ca2009-11-27 17:49:42 +000024/* WARNING!
25 This chip uses the standard JEDEC Addresses in 16-bit mode as word
26 addresses. In byte mode, 0xAAA has to be used instead of 0x555 and
27 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC
28 functions. */
29
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +000030/* chunksize is 1 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000031int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start,
32 unsigned int len)
Uwe Hermann51582f22007-08-23 10:20:40 +000033{
34 int i;
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000035 chipaddr bios = flash->virtual_memory;
36 chipaddr dst = flash->virtual_memory + start;
Uwe Hermann51582f22007-08-23 10:20:40 +000037
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000038 for (i = 0; i < len; i++) {
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000039 chip_writeb(flash, 0xAA, bios + 0xAAA);
40 chip_writeb(flash, 0x55, bios + 0x555);
41 chip_writeb(flash, 0xA0, bios + 0xAAA);
Uwe Hermann51582f22007-08-23 10:20:40 +000042
43 /* transfer data from source to destination */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000044 chip_writeb(flash, *src, dst);
45 toggle_ready_jedec(flash, dst);
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000046#if 0
47 /* We only want to print something in the error case. */
Sean Nelsoned479d22010-03-24 23:14:32 +000048 msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n",
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000049 (dst - bios), chip_readb(flash, dst), *src);
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000050#endif
Uwe Hermann51582f22007-08-23 10:20:40 +000051 dst++;
52 src++;
53 }
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000054
55 /* FIXME: Ignore errors for now. */
56 return 0;
Uwe Hermann51582f22007-08-23 10:20:40 +000057}
58
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000059int probe_m29f400bt(struct flashctx *flash)
Ronald G. Minnichb1934902002-06-11 19:15:55 +000060{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000061 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000062 uint8_t id1, id2;
Ronald G. Minnichb1934902002-06-11 19:15:55 +000063
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000064 chip_writeb(flash, 0xAA, bios + 0xAAA);
65 chip_writeb(flash, 0x55, bios + 0x555);
66 chip_writeb(flash, 0x90, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000067
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000068 programmer_delay(10);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000069
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000070 id1 = chip_readb(flash, bios);
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +000071 /* The data sheet says id2 is at (bios + 0x01) and id2 listed in
72 * flash.h does not match. It should be possible to use JEDEC probe.
73 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000074 id2 = chip_readb(flash, bios + 0x02);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000075
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000076 chip_writeb(flash, 0xAA, bios + 0xAAA);
77 chip_writeb(flash, 0x55, bios + 0x555);
78 chip_writeb(flash, 0xF0, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000079
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000080 programmer_delay(10);
Ronald G. Minnichd4228fd2003-02-28 17:21:38 +000081
Sean Nelsoned479d22010-03-24 23:14:32 +000082 msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnichd4228fd2003-02-28 17:21:38 +000083
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +000084 if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id)
Ronald G. Minnichb1934902002-06-11 19:15:55 +000085 return 1;
86
87 return 0;
88}
89
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000090int erase_m29f400bt(struct flashctx *flash)
Ronald G. Minnichb1934902002-06-11 19:15:55 +000091{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000092 chipaddr bios = flash->virtual_memory;
Ronald G. Minnichb1934902002-06-11 19:15:55 +000093
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000094 chip_writeb(flash, 0xAA, bios + 0xAAA);
95 chip_writeb(flash, 0x55, bios + 0x555);
96 chip_writeb(flash, 0x80, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000097
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000098 chip_writeb(flash, 0xAA, bios + 0xAAA);
99 chip_writeb(flash, 0x55, bios + 0x555);
100 chip_writeb(flash, 0x10, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000101
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000102 programmer_delay(10);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000103 toggle_ready_jedec(flash, bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000104
Carl-Daniel Hailfingerb4061f62011-06-26 17:04:16 +0000105 /* FIXME: Check the status register for errors. */
Uwe Hermannffec5f32007-08-23 16:08:21 +0000106 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000107}
108
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000109int block_erase_m29f400bt(struct flashctx *flash, unsigned int start,
110 unsigned int len)
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000111{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000112 chipaddr bios = flash->virtual_memory;
113 chipaddr dst = bios + start;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000114
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000115 chip_writeb(flash, 0xAA, bios + 0xAAA);
116 chip_writeb(flash, 0x55, bios + 0x555);
117 chip_writeb(flash, 0x80, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000118
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000119 chip_writeb(flash, 0xAA, bios + 0xAAA);
120 chip_writeb(flash, 0x55, bios + 0x555);
121 chip_writeb(flash, 0x30, dst);
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000122
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000123 programmer_delay(10);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000124 toggle_ready_jedec(flash, bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000125
Carl-Daniel Hailfingerb4061f62011-06-26 17:04:16 +0000126 /* FIXME: Check the status register for errors. */
Uwe Hermannffec5f32007-08-23 16:08:21 +0000127 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000128}
129
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000130int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address,
131 unsigned int blocklen)
Sean Nelson6b11ad22009-12-23 17:05:59 +0000132{
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000133 if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000134 msg_cerr("%s called with incorrect arguments\n",
Sean Nelson6b11ad22009-12-23 17:05:59 +0000135 __func__);
136 return -1;
137 }
138 return erase_m29f400bt(flash);
139}