blob: d12a9f16c77764aa9e3cdf548d28f8d214b70141 [file] [log] [blame]
Nico Huber83693c82016-10-08 22:17:55 +02001--
Nico Huber3d06de82018-05-29 01:35:04 +02002-- Copyright (C) 2015-2018 secunet Security Networks AG
Nico Huber83693c82016-10-08 22:17:55 +02003--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
Nico Huber27088aa2018-06-10 13:28:05 +020015private package HW.GFX.GMA.Config is
Nico Huber83693c82016-10-08 22:17:55 +020016
Nico Huber6621a142018-06-07 23:56:54 +020017 Gen : constant Generation := <<GEN>>;
18
Nico Huberd7809ab2018-06-10 15:44:23 +020019 CPU_First : constant CPU_Type :=
20 (case Gen is
21 when G45 => G45,
22 when Ironlake => Ironlake,
23 when Haswell => Haswell,
24 when Broxton => Broxton,
25 when Skylake => Skylake);
26 CPU_Last : constant CPU_Type :=
27 (case Gen is
28 when G45 => G45,
29 when Ironlake => Ivybridge,
30 when Haswell => Broadwell,
31 when Broxton => Broxton,
32 when Skylake => Skylake);
33 CPU_Var_Last : constant CPU_Variant :=
34 (case Gen is
35 when Haswell | Skylake => ULT,
36 when others => Normal);
37 subtype Gen_CPU_Type is CPU_Type range CPU_First .. CPU_Last;
38 subtype Gen_CPU_Variant is CPU_Variant range Normal .. CPU_Var_Last;
Nico Huber83693c82016-10-08 22:17:55 +020039
Nico Huberd7809ab2018-06-10 15:44:23 +020040 CPU : constant Gen_CPU_Type := <<CPU>>;
41
42 CPU_Var : constant Gen_CPU_Variant := <<CPU_VARIANT>>;
Nico Huber83693c82016-10-08 22:17:55 +020043
44 Internal_Display : constant Internal_Type := <<INTERNAL_PORT>>;
45
Nico Huberd55afeb2016-10-21 14:31:10 +020046 Analog_I2C_Port : constant PCH_Port := <<ANALOG_I2C_PORT>>;
47
Nico Huber83693c82016-10-08 22:17:55 +020048 EDP_Low_Voltage_Swing : constant Boolean := False;
49
Nico Huber247adf32017-06-12 14:39:11 +020050 DDI_HDMI_Buffer_Translation : constant Integer := -1;
51
Nico Huber83693c82016-10-08 22:17:55 +020052 Default_MMIO_Base : constant := <<DEFAULT_MMIO_BASE>>;
53
54 LVDS_Dual_Threshold : constant := 95_000_000;
55
56 ----------------------------------------------------------------------------
57
Nico Huber30e84082018-06-10 13:28:05 +020058 type Valid_Port_Array is array (Port_Type) of Boolean;
59 type Variable_Config is record
60 Valid_Port : Valid_Port_Array;
61 Raw_Clock : Frequency_Type;
62 end record;
63
Nico Huber27088aa2018-06-10 13:28:05 +020064 Initial_Settings : constant Variable_Config :=
Nico Huber30e84082018-06-10 13:28:05 +020065 (Valid_Port => (others => False),
Nico Huber27088aa2018-06-10 13:28:05 +020066 Raw_Clock => Frequency_Type'First);
67
68 Variable : Variable_Config with Part_Of => GMA.Config_State;
Nico Huber30e84082018-06-10 13:28:05 +020069
70 Valid_Port : Valid_Port_Array renames Variable.Valid_Port;
71 Raw_Clock : Frequency_Type renames Variable.Raw_Clock;
72
73 ----------------------------------------------------------------------------
74
Nico Huber6621a142018-06-07 23:56:54 +020075 Gen_G45 : constant Boolean := Gen = G45;
76 Gen_Ironlake : constant Boolean := Gen = Ironlake;
77 Gen_Haswell : constant Boolean := Gen = Haswell;
78 Gen_Broxton : constant Boolean := Gen = Broxton;
79 Gen_Skylake : constant Boolean := Gen = Skylake;
80
81 Up_To_Ironlake : constant Boolean := Gen <= Ironlake;
82 Ironlake_On : constant Boolean := Gen >= Ironlake;
83 Haswell_On : constant Boolean := Gen >= Haswell;
84 Broxton_On : constant Boolean := Gen >= Broxton;
85 Skylake_On : constant Boolean := Gen >= Skylake;
86
Nico Huber998ee2b2018-06-12 23:02:17 +020087 CPU_Ironlake : constant Boolean := Gen_Ironlake and then CPU = Ironlake;
88 CPU_Sandybridge : constant Boolean := Gen_Ironlake and then CPU = Sandybridge;
89 CPU_Ivybridge : constant Boolean := Gen_Ironlake and then CPU = Ivybridge;
90 CPU_Haswell : constant Boolean := Gen_Haswell and then CPU = Haswell;
91 CPU_Broadwell : constant Boolean := Gen_Haswell and then CPU = Broadwell;
92
93 Sandybridge_On : constant Boolean :=
94 ((Gen_Ironlake and then CPU >= Sandybridge) or Haswell_On);
95 Ivybridge_On : constant Boolean :=
96 ((Gen_Ironlake and then CPU >= Ivybridge) or Haswell_On);
97 Broadwell_On : constant Boolean :=
98 ((Gen_Haswell and then CPU >= Broadwell) or Broxton_On);
99
Nico Huber6621a142018-06-07 23:56:54 +0200100 ----------------------------------------------------------------------------
101
Nico Huber117db372018-06-09 17:56:05 +0200102 Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation >= 0;
Nico Huber2b6f6992017-07-09 18:11:34 +0200103 Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0;
104
Nico Huber83693c82016-10-08 22:17:55 +0200105 Has_Internal_Display : constant Boolean := Internal_Display /= None;
Nico Huber318bca12018-06-09 19:22:52 +0200106 Internal_Is_LVDS : constant Boolean := Internal_Display = LVDS;
Nico Huber83693c82016-10-08 22:17:55 +0200107 Internal_Is_EDP : constant Boolean := Internal_Display = DP;
Nico Huber1bc496f2017-06-09 22:23:28 +0200108 Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC;
Nico Huber6621a142018-06-07 23:56:54 +0200109 Has_Presence_Straps : constant Boolean := not Gen_Broxton;
Nico Huber998ee2b2018-06-12 23:02:17 +0200110 Is_ULT : constant Boolean :=
111 ((Gen_Haswell or Gen_Skylake) and then CPU_Var = ULT);
Nico Huber83693c82016-10-08 22:17:55 +0200112
113 ----- CPU pipe: --------
Nico Huber998ee2b2018-06-12 23:02:17 +0200114 Has_Tertiary_Pipe : constant Boolean := Ivybridge_On;
Nico Huber6621a142018-06-07 23:56:54 +0200115 Disable_Trickle_Feed : constant Boolean := not Gen_Haswell;
Nico Huber998ee2b2018-06-12 23:02:17 +0200116 Pipe_Enabled_Workaround : constant Boolean := CPU_Broadwell;
Nico Huber6621a142018-06-07 23:56:54 +0200117 Has_EDP_Transcoder : constant Boolean := Haswell_On;
Nico Huber998ee2b2018-06-12 23:02:17 +0200118 Use_PDW_For_EDP_Scaling : constant Boolean := CPU_Haswell;
Nico Huber6621a142018-06-07 23:56:54 +0200119 Has_Pipe_DDI_Func : constant Boolean := Haswell_On;
120 Has_Trans_Clk_Sel : constant Boolean := Haswell_On;
121 Has_Pipe_MSA_Misc : constant Boolean := Haswell_On;
Nico Huber998ee2b2018-06-12 23:02:17 +0200122 Has_Pipeconf_Misc : constant Boolean := Broadwell_On;
123 Has_Pipeconf_BPC : constant Boolean := not CPU_Haswell;
Nico Huber6621a142018-06-07 23:56:54 +0200124 Has_Plane_Control : constant Boolean := Broxton_On;
125 Has_DSP_Linoff : constant Boolean := Up_To_Ironlake;
Nico Huber998ee2b2018-06-12 23:02:17 +0200126 Has_PF_Pipe_Select : constant Boolean := CPU_Ivybridge or CPU_Haswell;
127 Has_Cursor_FBC_Control : constant Boolean := Ivybridge_On;
128 VGA_Plane_Workaround : constant Boolean := CPU_Ivybridge;
Nico Huber6621a142018-06-07 23:56:54 +0200129 Has_GMCH_DP_Transcoder : constant Boolean := Gen_G45;
130 Has_GMCH_VGACNTRL : constant Boolean := Gen_G45;
131 Has_GMCH_PFIT_CONTROL : constant Boolean := Gen_G45;
Nico Huber83693c82016-10-08 22:17:55 +0200132
133 ----- Panel power: -----
Nico Huber6621a142018-06-07 23:56:54 +0200134 Has_PP_Write_Protection : constant Boolean := Up_To_Ironlake;
135 Has_PP_Port_Select : constant Boolean := Up_To_Ironlake;
136 Use_PP_VDD_Override : constant Boolean := Up_To_Ironlake;
137 Has_PCH_Panel_Power : constant Boolean := Ironlake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200138
139 ----- PCH/FDI: ---------
Nico Huber6621a142018-06-07 23:56:54 +0200140 Has_PCH : constant Boolean := not Gen_Broxton and not Gen_G45;
Nico Huber998ee2b2018-06-12 23:02:17 +0200141 Has_PCH_DAC : constant Boolean :=
142 (Gen_Ironlake or (Gen_Haswell and then not Is_ULT));
Nico Huber83693c82016-10-08 22:17:55 +0200143
Nico Huber6621a142018-06-07 23:56:54 +0200144 Has_PCH_Aux_Channels : constant Boolean := Gen_Ironlake or Gen_Haswell;
Nico Huber83693c82016-10-08 22:17:55 +0200145
Nico Huber6621a142018-06-07 23:56:54 +0200146 VGA_Has_Sync_Disable : constant Boolean := Up_To_Ironlake;
Nico Huber83693c82016-10-08 22:17:55 +0200147
Nico Huber998ee2b2018-06-12 23:02:17 +0200148 Has_Trans_Timing_Ovrrde : constant Boolean := Sandybridge_On;
Nico Huber83693c82016-10-08 22:17:55 +0200149
Nico Huber6621a142018-06-07 23:56:54 +0200150 Has_DPLL_SEL : constant Boolean := Gen_Ironlake;
151 Has_FDI_BPC : constant Boolean := Gen_Ironlake;
Nico Huber998ee2b2018-06-12 23:02:17 +0200152 Has_FDI_Composite_Sel : constant Boolean := CPU_Ivybridge;
153 Has_New_FDI_Sink : constant Boolean := Sandybridge_On;
154 Has_New_FDI_Source : constant Boolean := Ivybridge_On;
155 Has_Trans_DP_Ctl : constant Boolean := CPU_Sandybridge or CPU_Ivybridge;
156 Has_FDI_C : constant Boolean := CPU_Ivybridge;
Nico Huber83693c82016-10-08 22:17:55 +0200157
Nico Huber6621a142018-06-07 23:56:54 +0200158 Has_FDI_RX_Power_Down : constant Boolean := Gen_Haswell;
Nico Huber83693c82016-10-08 22:17:55 +0200159
Nico Huber6621a142018-06-07 23:56:54 +0200160 Has_GMCH_RawClk : constant Boolean := Gen_G45;
Arthur Heymans73ea0322018-03-28 17:17:07 +0200161
Nico Huber83693c82016-10-08 22:17:55 +0200162 ----- DDI: -------------
Nico Huber6621a142018-06-07 23:56:54 +0200163 End_EDP_Training_Late : constant Boolean := Gen_Haswell;
164 Has_Per_DDI_Clock_Sel : constant Boolean := Gen_Haswell;
165 Has_HOTPLUG_CTL : constant Boolean := Gen_Haswell;
Nico Huber998ee2b2018-06-12 23:02:17 +0200166 Has_SHOTPLUG_CTL_A : constant Boolean :=
167 ((Gen_Haswell and then Is_ULT) or Skylake_On);
Nico Huber83693c82016-10-08 22:17:55 +0200168
Nico Huber6621a142018-06-07 23:56:54 +0200169 Has_DDI_PHYs : constant Boolean := Gen_Broxton;
Nico Huber19729a72017-07-30 01:05:05 +0200170
Nico Huber998ee2b2018-06-12 23:02:17 +0200171 Has_DDI_D : constant Boolean :=
172 ((Gen_Haswell or Gen_Skylake) and then not Is_ULT);
Nico Huber907e4152017-07-29 21:18:59 +0200173 Has_DDI_E : constant Boolean := -- might be disabled by x4 eDP
174 Has_DDI_D;
Nico Huber83693c82016-10-08 22:17:55 +0200175
Nico Huber6621a142018-06-07 23:56:54 +0200176 Has_DDI_Buffer_Trans : constant Boolean := Haswell_On and
177 not Gen_Broxton;
178 Has_Low_Voltage_Swing : constant Boolean := Broxton_On;
179 Has_Iboost_Config : constant Boolean := Skylake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200180
181 Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
182
Nico Huber1c3b9282017-02-09 13:57:04 +0100183 ----- GMBUS: -----------
Nico Huber6621a142018-06-07 23:56:54 +0200184 Ungate_GMBUS_Unit_Level : constant Boolean := Skylake_On;
185 GMBUS_Alternative_Pins : constant Boolean := Gen_Broxton;
186 Has_PCH_GMBUS : constant Boolean := Ironlake_On;
Nico Huber83693c82016-10-08 22:17:55 +0200187
188 ----- Power: -----------
Nico Huber998ee2b2018-06-12 23:02:17 +0200189 Has_IPS : constant Boolean :=
190 (Gen_Haswell and then
191 ((CPU_Haswell and Is_ULT) or CPU_Broadwell));
192 Has_IPS_CTL_Mailbox : constant Boolean := CPU_Broadwell;
Nico Huber83693c82016-10-08 22:17:55 +0200193
Nico Huber998ee2b2018-06-12 23:02:17 +0200194 Has_Per_Pipe_SRD : constant Boolean := Broadwell_On;
Nico Huber83693c82016-10-08 22:17:55 +0200195
Nico Huber21da5742017-01-20 14:00:53 +0100196 ----- GTT: -------------
Nico Huber998ee2b2018-06-12 23:02:17 +0200197 Has_64bit_GTT : constant Boolean := Broadwell_On;
Nico Huber83693c82016-10-08 22:17:55 +0200198
199 ----------------------------------------------------------------------------
200
Nico Huber1b2c9a32016-11-20 03:42:08 +0100201 Max_Pipe : constant Pipe_Index :=
Nico Huberd58de7d2018-06-07 23:06:55 +0200202 (if Has_Tertiary_Pipe then Tertiary else Secondary);
Nico Huber83693c82016-10-08 22:17:55 +0200203
Nico Huberac455ad2017-02-14 14:41:19 +0100204 Last_Digital_Port : constant Digital_Port :=
Nico Huber208857d2017-07-29 21:30:24 +0200205 (if Has_DDI_E then DIGI_E else DIGI_C);
Nico Huberac455ad2017-02-14 14:41:19 +0100206
Nico Huber83693c82016-10-08 22:17:55 +0200207 ----------------------------------------------------------------------------
208
Nico Huber3c544ee2016-11-20 04:56:58 +0100209 type FDI_Per_Port is array (Port_Type) of Boolean;
210 Is_FDI_Port : constant FDI_Per_Port :=
Nico Huber6621a142018-06-07 23:56:54 +0200211 (Disabled => False,
212 Internal => Gen_Ironlake and Internal_Is_LVDS,
213 DP1 .. HDMI3 => Gen_Ironlake,
214 Analog => Has_PCH_DAC);
Nico Huber83693c82016-10-08 22:17:55 +0200215
216 type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count;
217 FDI_Lane_Count : constant FDI_Lanes_Per_Port :=
218 (DIGI_D => DP_Lane_Count_2,
Nico Huber6621a142018-06-07 23:56:54 +0200219 others => (if Gen_Ironlake then DP_Lane_Count_4 else DP_Lane_Count_2));
Nico Huber83693c82016-10-08 22:17:55 +0200220
221 FDI_Training : constant FDI_Training_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200222 (if CPU_Ironlake then Simple_Training
223 elsif CPU_Sandybridge then Full_Training
224 else Auto_Training);
Nico Huber83693c82016-10-08 22:17:55 +0200225
Nico Huberf54d0962016-10-20 14:17:18 +0200226 ----------------------------------------------------------------------------
227
Nico Huber247adf32017-06-12 14:39:11 +0200228 Default_DDI_HDMI_Buffer_Translation : constant DDI_HDMI_Buf_Trans_Range :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200229 (if CPU_Haswell then 6
230 elsif CPU_Broadwell then 7
231 elsif Broxton_On then 8
232 else 0);
Nico Huber247adf32017-06-12 14:39:11 +0200233
234 ----------------------------------------------------------------------------
235
Nico Huberabe3de22016-10-20 15:03:46 +0200236 Default_CDClk_Freq : constant Frequency_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200237 (if Gen_G45 then 320_000_000 -- unused
238 elsif CPU_Ironlake or Gen_Haswell then 450_000_000
239 elsif CPU_Sandybridge or CPU_Ivybridge then 400_000_000
240 elsif Gen_Broxton then 288_000_000
241 elsif Gen_Skylake then 337_500_000
242 else Frequency_Type'First);
Nico Huberabe3de22016-10-20 15:03:46 +0200243
Nico Huberf54d0962016-10-20 14:17:18 +0200244 Default_RawClk_Freq : constant Frequency_Type :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200245 (if Gen_G45 then 100_000_000 -- unused, depends on FSB
246 elsif Gen_Ironlake then 125_000_000
247 elsif Gen_Haswell then (if Is_ULT then 24_000_000 else 125_000_000)
248 elsif Gen_Broxton then Frequency_Type'First -- none needed
249 elsif Gen_Skylake then 24_000_000
250 else Frequency_Type'First);
Nico Huberf54d0962016-10-20 14:17:18 +0200251
Nico Huberdcd274b2016-11-03 20:15:39 +0100252 ----------------------------------------------------------------------------
253
254 -- Maximum source width with enabled scaler. This only accounts
255 -- for simple 1:1 pipe:scaler mappings.
256
Nico Huberc5c767a2018-06-03 01:09:04 +0200257 type Width_Per_Pipe is array (Pipe_Index) of Width_Type;
Nico Huberdcd274b2016-11-03 20:15:39 +0100258
259 Maximum_Scalable_Width : constant Width_Per_Pipe :=
Nico Huber998ee2b2018-06-12 23:02:17 +0200260 (if Gen_G45 then -- TODO: Is this true?
261 (Primary => 4096,
262 Secondary => 2048,
263 Tertiary => Pos32'First)
264 elsif Gen_Ironlake or CPU_Haswell then
265 (Primary => 4096,
266 Secondary => 2048,
267 Tertiary => 2048)
268 else
269 (Primary => 4096,
270 Secondary => 4096,
271 Tertiary => 4096));
Nico Huberdcd274b2016-11-03 20:15:39 +0100272
Nico Hubera02b2c62018-01-09 15:58:34 +0100273 -- Maximum X position of hardware cursors
Nico Huber6621a142018-06-07 23:56:54 +0200274 Maximum_Cursor_X : constant := (case Gen is
275 when G45 .. Ironlake => 4095,
Nico Hubera02b2c62018-01-09 15:58:34 +0100276 when Haswell .. Skylake => 8191);
277
278 Maximum_Cursor_Y : constant := 4095;
279
Nico Huber74ec9622016-11-19 03:00:43 +0100280 ----------------------------------------------------------------------------
281
Nico Huber21da5742017-01-20 14:00:53 +0100282 -- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D
Nico Huber74ec9622016-11-19 03:00:43 +0100283 HDMI_Max_Clock_24bpp : constant Frequency_Type :=
Nico Huber6621a142018-06-07 23:56:54 +0200284 (if Haswell_On then 300_000_000 else 225_000_000);
Nico Huber74ec9622016-11-19 03:00:43 +0100285
Nico Huberb8ae6182017-07-15 20:03:56 +0200286 ----------------------------------------------------------------------------
287
Nico Huber0b2329a2018-06-09 21:14:27 +0200288 GTT_PTE_Size : constant := (if Has_64bit_GTT then 8 else 4);
Nico Huberb8ae6182017-07-15 20:03:56 +0200289
Nico Huber998ee2b2018-06-12 23:02:17 +0200290 Fence_Base : constant :=
291 (if not Sandybridge_On then 16#0000_3000# else 16#0010_0000#);
Nico Huberb03c8f12017-08-25 13:29:08 +0200292
Nico Huber998ee2b2018-06-12 23:02:17 +0200293 Fence_Count : constant :=
294 (if not Ivybridge_On then 16 else 32);
Nico Huberb03c8f12017-08-25 13:29:08 +0200295
Nico Hubere7ac6eb2017-09-04 23:54:13 +0200296 ----------------------------------------------------------------------------
297
298 use type HW.Word16;
299
300 function Is_Broadwell_H (Device_Id : Word16) return Boolean is
301 (Device_Id = 16#1612# or Device_Id = 16#1622# or Device_Id = 16#162a#);
302
303 function Is_Skylake_U (Device_Id : Word16) return Boolean is
304 (Device_Id = 16#1906# or Device_Id = 16#1916# or Device_Id = 16#1923# or
305 Device_Id = 16#1926# or Device_Id = 16#1927#);
306
307 -- Rather catch too much here than too little,
308 -- it's only used to distinguish generations.
309 function Is_GPU (Device_Id : Word16; CPU : CPU_Type; CPU_Var : CPU_Variant)
310 return Boolean is
311 (case CPU is
Arthur Heymans73ea0322018-03-28 17:17:07 +0200312 when G45 => (Device_Id and 16#ff02#) = 16#2e02# or
313 (Device_Id and 16#fffe#) = 16#2a42#,
Nico Hubere7ac6eb2017-09-04 23:54:13 +0200314 when Ironlake => (Device_Id and 16#fff3#) = 16#0042#,
315 when Sandybridge => (Device_Id and 16#ffc2#) = 16#0102#,
316 when Ivybridge => (Device_Id and 16#ffc3#) = 16#0142#,
317 when Haswell =>
318 (case CPU_Var is
319 when Normal => (Device_Id and 16#ffc3#) = 16#0402# or
320 (Device_Id and 16#ffc3#) = 16#0d02#,
321 when ULT => (Device_Id and 16#ffc3#) = 16#0a02#),
322 when Broadwell => ((Device_Id and 16#ffc3#) = 16#1602# or
323 (Device_Id and 16#ffcf#) = 16#160b# or
324 (Device_Id and 16#ffcf#) = 16#160d#) and
325 (case CPU_Var is
326 when Normal => Is_Broadwell_H (Device_Id),
327 when ULT => not Is_Broadwell_H (Device_Id)),
328 when Broxton => (Device_Id and 16#fffe#) = 16#5a84#,
329 when Skylake => ((Device_Id and 16#ffc3#) = 16#1902# or
330 (Device_Id and 16#ffcf#) = 16#190b# or
331 (Device_Id and 16#ffcf#) = 16#190d# or
332 (Device_Id and 16#fff9#) = 16#1921#) and
333 (case CPU_Var is
334 when Normal => not Is_Skylake_U (Device_Id),
335 when ULT => Is_Skylake_U (Device_Id)));
336
337 function Compatible_GPU (Device_Id : Word16) return Boolean is
338 (Is_GPU (Device_Id, CPU, CPU_Var));
339
Nico Huber83693c82016-10-08 22:17:55 +0200340end HW.GFX.GMA.Config;