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Nico Huber83693c82016-10-08 22:17:55 +02001--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.GFX.GMA.Registers;
16
Nico Huber47ff0692016-11-04 14:29:39 +010017use type HW.Int32;
18
Nico Huber83693c82016-10-08 22:17:55 +020019private package HW.GFX.GMA.Pipe_Setup
20is
21
Nico Huber83693c82016-10-08 22:17:55 +020022 procedure On
Nico Huberf3e23662016-12-05 21:33:03 +010023 (Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +020024 Port_Cfg : Port_Config;
Nico Huber4dc4c612018-01-10 15:55:09 +010025 Framebuffer : Framebuffer_Type;
26 Cursor : Cursor_Type)
Nico Huber47ff0692016-11-04 14:29:39 +010027 with
28 Pre =>
Nico Huber9b479412017-08-27 11:55:56 +020029 Rotated_Width (Framebuffer) <= Port_Cfg.Mode.H_Visible and
30 Rotated_Height (Framebuffer) <= Port_Cfg.Mode.V_Visible and
31 (Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or
Nico Huber5ef4d602017-12-13 13:56:47 +010032 Framebuffer.Height + Framebuffer.Start_Y <= Framebuffer.V_Stride);
Nico Huber83693c82016-10-08 22:17:55 +020033
Nico Huber7ad2d652016-12-07 15:19:32 +010034 procedure Off (Pipe : Pipe_Index);
Nico Huber83693c82016-10-08 22:17:55 +020035
Nico Huber33912aa2016-12-06 20:36:23 +010036 procedure Legacy_VGA_Off;
37
Nico Huber83693c82016-10-08 22:17:55 +020038 procedure All_Off;
39
Nico Huberf7f537e2018-01-02 14:15:43 +010040 procedure Setup_FB
41 (Pipe : Pipe_Index;
42 Mode : Mode_Type;
43 Framebuffer : Framebuffer_Type)
44 with
45 Pre =>
46 Rotated_Width (Framebuffer) <= Mode.H_Visible and
47 Rotated_Height (Framebuffer) <= Mode.V_Visible and
48 (Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or
49 Framebuffer.Height + Framebuffer.Start_Y <= Framebuffer.V_Stride);
Nico Huber83693c82016-10-08 22:17:55 +020050
Nico Huber4dc4c612018-01-10 15:55:09 +010051 procedure Update_Cursor
52 (Pipe : Pipe_Index;
53 FB : Framebuffer_Type;
54 Cursor : Cursor_Type);
55 procedure Place_Cursor
56 (Pipe : Pipe_Index;
57 FB : Framebuffer_Type;
58 Cursor : Cursor_Type);
59
Nico Huberf361ec82018-06-02 18:01:45 +020060 procedure Scaler_Available (Available : out Boolean; Pipe : Pipe_Index);
61
Nico Huber83693c82016-10-08 22:17:55 +020062private
63
64 subtype WM_Levels is Natural range 0 .. 7;
65 type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index;
66
67 type Controller_Type is
68 record
Nico Huberf3e23662016-12-05 21:33:03 +010069 Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +020070 PIPESRC : Registers.Registers_Index;
71 PIPEMISC : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +010072 PF_CTRL : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020073 PF_WIN_POS : Registers.Registers_Index;
74 PF_WIN_SZ : Registers.Registers_Index;
75 DSPCNTR : Registers.Registers_Index;
76 DSPLINOFF : Registers.Registers_Index;
77 DSPSTRIDE : Registers.Registers_Index;
78 DSPSURF : Registers.Registers_Index;
79 DSPTILEOFF : Registers.Registers_Index;
80 SPCNTR : Registers.Registers_Index;
Nico Huber4dc4c612018-01-10 15:55:09 +010081 CUR_CTL : Registers.Registers_Index;
82 CUR_BASE : Registers.Registers_Index;
83 CUR_POS : Registers.Registers_Index;
84 CUR_FBC_CTL : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020085 -- Skylake registers (partially aliased)
86 PLANE_CTL : Registers.Registers_Index;
87 PLANE_OFFSET : Registers.Registers_Index;
88 PLANE_POS : Registers.Registers_Index;
89 PLANE_SIZE : Registers.Registers_Index;
90 PLANE_STRIDE : Registers.Registers_Index;
91 PLANE_SURF : Registers.Registers_Index;
92 PS_CTRL_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +010093 PS_WIN_POS_1 : Registers.Registers_Index;
Nico Huber83693c82016-10-08 22:17:55 +020094 PS_WIN_SZ_1 : Registers.Registers_Index;
Nico Huber4916e342016-11-04 14:37:53 +010095 PS_CTRL_2 : Registers.Registers_Invalid_Index;
Nico Huber83693c82016-10-08 22:17:55 +020096 PS_WIN_SZ_2 : Registers.Registers_Invalid_Index;
97 WM_LINETIME : Registers.Registers_Index;
98 PLANE_BUF_CFG : Registers.Registers_Index;
99 PLANE_WM : PLANE_WM_Type;
Nico Huber4dc4c612018-01-10 15:55:09 +0100100 CUR_BUF_CFG : Registers.Registers_Index;
101 CUR_WM : PLANE_WM_Type;
Nico Huber83693c82016-10-08 22:17:55 +0200102 end record;
103
Nico Huberf3e23662016-12-05 21:33:03 +0100104 type Controller_Array is array (Pipe_Index) of Controller_Type;
105
Nico Huberf3e23662016-12-05 21:33:03 +0100106 Controllers : constant Controller_Array :=
107 (Primary => Controller_Type'
108 (Pipe => Primary,
Nico Huber83693c82016-10-08 22:17:55 +0200109 PIPESRC => Registers.PIPEASRC,
110 PIPEMISC => Registers.PIPEAMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100111 PF_CTRL => Registers.PFA_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200112 PF_WIN_POS => Registers.PFA_WIN_POS,
113 PF_WIN_SZ => Registers.PFA_WIN_SZ,
114 DSPCNTR => Registers.DSPACNTR,
115 DSPLINOFF => Registers.DSPALINOFF,
116 DSPSTRIDE => Registers.DSPASTRIDE,
117 DSPSURF => Registers.DSPASURF,
118 DSPTILEOFF => Registers.DSPATILEOFF,
119 SPCNTR => Registers.SPACNTR,
Nico Huber4dc4c612018-01-10 15:55:09 +0100120 CUR_CTL => Registers.CUR_CTL_A,
121 CUR_BASE => Registers.CUR_BASE_A,
122 CUR_POS => Registers.CUR_POS_A,
123 CUR_FBC_CTL => Registers.CUR_FBC_CTL_A,
Nico Huber83693c82016-10-08 22:17:55 +0200124 PLANE_CTL => Registers.DSPACNTR,
125 PLANE_OFFSET => Registers.DSPATILEOFF,
126 PLANE_POS => Registers.PLANE_POS_1_A,
127 PLANE_SIZE => Registers.PLANE_SIZE_1_A,
128 PLANE_STRIDE => Registers.DSPASTRIDE,
129 PLANE_SURF => Registers.DSPASURF,
130 PS_CTRL_1 => Registers.PS_CTRL_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100131 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_A,
Nico Huber83693c82016-10-08 22:17:55 +0200132 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A,
Nico Huber4916e342016-11-04 14:37:53 +0100133 PS_CTRL_2 => Registers.PS_CTRL_2_A,
Nico Huber83693c82016-10-08 22:17:55 +0200134 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A,
135 WM_LINETIME => Registers.WM_LINETIME_A,
136 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A,
137 PLANE_WM => PLANE_WM_Type'(
138 Registers.PLANE_WM_1_A_0,
139 Registers.PLANE_WM_1_A_1,
140 Registers.PLANE_WM_1_A_2,
141 Registers.PLANE_WM_1_A_3,
142 Registers.PLANE_WM_1_A_4,
143 Registers.PLANE_WM_1_A_5,
144 Registers.PLANE_WM_1_A_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100145 Registers.PLANE_WM_1_A_7),
146 CUR_BUF_CFG => Registers.CUR_BUF_CFG_A,
147 CUR_WM => PLANE_WM_Type'(
148 Registers.CUR_WM_A_0,
149 Registers.CUR_WM_A_1,
150 Registers.CUR_WM_A_2,
151 Registers.CUR_WM_A_3,
152 Registers.CUR_WM_A_4,
153 Registers.CUR_WM_A_5,
154 Registers.CUR_WM_A_6,
155 Registers.CUR_WM_A_7)),
Nico Huberf3e23662016-12-05 21:33:03 +0100156 Secondary => Controller_Type'
157 (Pipe => Secondary,
Nico Huber83693c82016-10-08 22:17:55 +0200158 PIPESRC => Registers.PIPEBSRC,
159 PIPEMISC => Registers.PIPEBMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100160 PF_CTRL => Registers.PFB_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200161 PF_WIN_POS => Registers.PFB_WIN_POS,
162 PF_WIN_SZ => Registers.PFB_WIN_SZ,
163 DSPCNTR => Registers.DSPBCNTR,
164 DSPLINOFF => Registers.DSPBLINOFF,
165 DSPSTRIDE => Registers.DSPBSTRIDE,
166 DSPSURF => Registers.DSPBSURF,
167 DSPTILEOFF => Registers.DSPBTILEOFF,
168 SPCNTR => Registers.SPBCNTR,
Nico Huber4dc4c612018-01-10 15:55:09 +0100169 CUR_CTL => Registers.CUR_CTL_B,
170 CUR_BASE => Registers.CUR_BASE_B,
171 CUR_POS => Registers.CUR_POS_B,
172 CUR_FBC_CTL => Registers.CUR_FBC_CTL_B,
Nico Huber83693c82016-10-08 22:17:55 +0200173 PLANE_CTL => Registers.DSPBCNTR,
174 PLANE_OFFSET => Registers.DSPBTILEOFF,
175 PLANE_POS => Registers.PLANE_POS_1_B,
176 PLANE_SIZE => Registers.PLANE_SIZE_1_B,
177 PLANE_STRIDE => Registers.DSPBSTRIDE,
178 PLANE_SURF => Registers.DSPBSURF,
179 PS_CTRL_1 => Registers.PS_CTRL_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100180 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_B,
Nico Huber83693c82016-10-08 22:17:55 +0200181 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B,
Nico Huber4916e342016-11-04 14:37:53 +0100182 PS_CTRL_2 => Registers.PS_CTRL_2_B,
Nico Huber83693c82016-10-08 22:17:55 +0200183 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B,
184 WM_LINETIME => Registers.WM_LINETIME_B,
185 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B,
186 PLANE_WM => PLANE_WM_Type'(
187 Registers.PLANE_WM_1_B_0,
188 Registers.PLANE_WM_1_B_1,
189 Registers.PLANE_WM_1_B_2,
190 Registers.PLANE_WM_1_B_3,
191 Registers.PLANE_WM_1_B_4,
192 Registers.PLANE_WM_1_B_5,
193 Registers.PLANE_WM_1_B_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100194 Registers.PLANE_WM_1_B_7),
195 CUR_BUF_CFG => Registers.CUR_BUF_CFG_B,
196 CUR_WM => PLANE_WM_Type'(
197 Registers.CUR_WM_B_0,
198 Registers.CUR_WM_B_1,
199 Registers.CUR_WM_B_2,
200 Registers.CUR_WM_B_3,
201 Registers.CUR_WM_B_4,
202 Registers.CUR_WM_B_5,
203 Registers.CUR_WM_B_6,
204 Registers.CUR_WM_B_7)),
Nico Huberf3e23662016-12-05 21:33:03 +0100205 Tertiary => Controller_Type'
206 (Pipe => Tertiary,
Nico Huber83693c82016-10-08 22:17:55 +0200207 PIPESRC => Registers.PIPECSRC,
208 PIPEMISC => Registers.PIPECMISC,
Nico Huber4916e342016-11-04 14:37:53 +0100209 PF_CTRL => Registers.PFC_CTL_1,
Nico Huber83693c82016-10-08 22:17:55 +0200210 PF_WIN_POS => Registers.PFC_WIN_POS,
211 PF_WIN_SZ => Registers.PFC_WIN_SZ,
212 DSPCNTR => Registers.DSPCCNTR,
213 DSPLINOFF => Registers.DSPCLINOFF,
214 DSPSTRIDE => Registers.DSPCSTRIDE,
215 DSPSURF => Registers.DSPCSURF,
216 DSPTILEOFF => Registers.DSPCTILEOFF,
217 SPCNTR => Registers.SPCCNTR,
Nico Huber4dc4c612018-01-10 15:55:09 +0100218 CUR_CTL => Registers.CUR_CTL_C,
219 CUR_BASE => Registers.CUR_BASE_C,
220 CUR_POS => Registers.CUR_POS_C,
221 CUR_FBC_CTL => Registers.CUR_FBC_CTL_C,
Nico Huber83693c82016-10-08 22:17:55 +0200222 PLANE_CTL => Registers.DSPCCNTR,
223 PLANE_OFFSET => Registers.DSPCTILEOFF,
224 PLANE_POS => Registers.PLANE_POS_1_C,
225 PLANE_SIZE => Registers.PLANE_SIZE_1_C,
226 PLANE_STRIDE => Registers.DSPCSTRIDE,
227 PLANE_SURF => Registers.DSPCSURF,
228 PS_CTRL_1 => Registers.PS_CTRL_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100229 PS_WIN_POS_1 => Registers.PS_WIN_POS_1_C,
Nico Huber83693c82016-10-08 22:17:55 +0200230 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C,
Nico Huber4916e342016-11-04 14:37:53 +0100231 PS_CTRL_2 => Registers.Invalid_Register,
Nico Huber83693c82016-10-08 22:17:55 +0200232 PS_WIN_SZ_2 => Registers.Invalid_Register,
233 WM_LINETIME => Registers.WM_LINETIME_C,
234 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C,
235 PLANE_WM => PLANE_WM_Type'(
236 Registers.PLANE_WM_1_C_0,
237 Registers.PLANE_WM_1_C_1,
238 Registers.PLANE_WM_1_C_2,
239 Registers.PLANE_WM_1_C_3,
240 Registers.PLANE_WM_1_C_4,
241 Registers.PLANE_WM_1_C_5,
242 Registers.PLANE_WM_1_C_6,
Nico Huber4dc4c612018-01-10 15:55:09 +0100243 Registers.PLANE_WM_1_C_7),
244 CUR_BUF_CFG => Registers.CUR_BUF_CFG_C,
245 CUR_WM => PLANE_WM_Type'(
246 Registers.CUR_WM_C_0,
247 Registers.CUR_WM_C_1,
248 Registers.CUR_WM_C_2,
249 Registers.CUR_WM_C_3,
250 Registers.CUR_WM_C_4,
251 Registers.CUR_WM_C_5,
252 Registers.CUR_WM_C_6,
253 Registers.CUR_WM_C_7)));
Nico Huber83693c82016-10-08 22:17:55 +0200254
Nico Huber83693c82016-10-08 22:17:55 +0200255end HW.GFX.GMA.Pipe_Setup;