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Luc Verhaegen8e3a6002007-04-04 22:45:58 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +00003 *
Uwe Hermannd1107642007-08-29 17:52:32 +00004 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
5 * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
6 * Copyright (C) 2007 Luc Verhaegen <libv@skynet.be>
Carl-Daniel Hailfinger92242622007-09-27 14:29:57 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
Luc Verhaegen8e3a6002007-04-04 22:45:58 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000021 */
22
23/*
24 * Contains the board specific flash enables.
25 */
26
27#include <stdio.h>
28#include <pci/pci.h>
29#include <stdint.h>
30#include <string.h>
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000031#include "flash.h"
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000032
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000033/*
Uwe Hermannffec5f32007-08-23 16:08:21 +000034 * Helper functions for many Winbond Super I/Os of the W836xx range.
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000035 */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000036/* Enter extended functions */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000037static void w836xx_ext_enter(uint16_t port)
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000038{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000039 outb(0x87, port);
40 outb(0x87, port);
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000041}
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000042
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000043/* Leave extended functions */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000044static void w836xx_ext_leave(uint16_t port)
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000045{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000046 outb(0xAA, port);
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000047}
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000048
Uwe Hermannffec5f32007-08-23 16:08:21 +000049/* General functions for reading/writing Winbond Super I/Os. */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000050static unsigned char wbsio_read(uint16_t index, uint8_t reg)
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000051{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000052 outb(reg, index);
Uwe Hermann372eeb52007-12-04 21:49:06 +000053 return inb(index + 1);
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000054}
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000055
Ronald G. Minnichfa496922007-10-12 21:22:40 +000056static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000057{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000058 outb(reg, index);
Uwe Hermann372eeb52007-12-04 21:49:06 +000059 outb(data, index + 1);
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000060}
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000061
Ronald G. Minnichfa496922007-10-12 21:22:40 +000062static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000063{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000064 uint8_t tmp;
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000065
Ronald G. Minnichfa496922007-10-12 21:22:40 +000066 outb(reg, index);
Uwe Hermann372eeb52007-12-04 21:49:06 +000067 tmp = inb(index + 1) & ~mask;
68 outb(tmp | (data & mask), index + 1);
Mondrian Nuessleaef1c7c2007-05-03 10:09:23 +000069}
70
Uwe Hermannffec5f32007-08-23 16:08:21 +000071/**
72 * Winbond W83627HF: Raise GPIO24.
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000073 *
74 * Suited for:
Uwe Hermannffec5f32007-08-23 16:08:21 +000075 * - Agami Aruma
76 * - IWILL DK8-HTX
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000077 */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000078static int w83627hf_gpio24_raise(uint16_t index, const char *name)
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000079{
Ronald G. Minnichfa496922007-10-12 21:22:40 +000080 w836xx_ext_enter(index);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000081
Uwe Hermann372eeb52007-12-04 21:49:06 +000082 /* Is this the W83627HF? */
83 if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID reg. */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000084 fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
Ronald G. Minnichfa496922007-10-12 21:22:40 +000085 name, wbsio_read(index, 0x20));
86 w836xx_ext_leave(index);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000087 return -1;
88 }
89
Luc Verhaegen7977f4e2007-05-04 04:47:04 +000090 /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000091 wbsio_mask(index, 0x2B, 0x10, 0x10);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000092
Uwe Hermann372eeb52007-12-04 21:49:06 +000093 /* Select logical device 8: GPIO port 2 */
94 wbsio_write(index, 0x07, 0x08);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +000095
Ronald G. Minnichfa496922007-10-12 21:22:40 +000096 wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000097 wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000098 wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
Ronald G. Minnichfa496922007-10-12 21:22:40 +000099 wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +0000100
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000101 w836xx_ext_leave(index);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000102
103 return 0;
104}
105
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000106static int w83627hf_gpio24_raise_2e(const char *name)
107{
Uwe Hermann372eeb52007-12-04 21:49:06 +0000108 /* TODO: Typo? Shouldn't this be 0x2e? */
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000109 return w83627hf_gpio24_raise(0x2d, name);
110}
111
112/**
113 * Winbond W83627THF: GPIO 4, bit 4
114 *
115 * Suited for:
116 * - MSI K8N-NEO3
117 */
118static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
119{
120 w836xx_ext_enter(index);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000121
122 /* Is this the W83627THF? */
123 if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID reg. */
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000124 fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
125 name, wbsio_read(index, 0x20));
126 w836xx_ext_leave(index);
127 return -1;
128 }
129
130 /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
131
Uwe Hermann372eeb52007-12-04 21:49:06 +0000132 wbsio_write(index, 0x07, 0x09); /* Select LDN 9: GPIO port 4 */
133 wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */
134 wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */
135 wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */
136 wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000137
138 w836xx_ext_leave(index);
139
140 return 0;
141}
142
143static int w83627thf_gpio4_4_raise_4e(const char *name)
144{
Uwe Hermann372eeb52007-12-04 21:49:06 +0000145 return w83627thf_gpio4_4_raise(0x4e, name);
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000146}
Uwe Hermann372eeb52007-12-04 21:49:06 +0000147
Uwe Hermannffec5f32007-08-23 16:08:21 +0000148/**
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000149 * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
150 *
Uwe Hermannffec5f32007-08-23 16:08:21 +0000151 * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000152 */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +0000153static int board_via_epia_m(const char *name)
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000154{
Uwe Hermanna7e05482007-05-09 10:17:44 +0000155 struct pci_dev *dev;
Uwe Hermann372eeb52007-12-04 21:49:06 +0000156 uint16_t base;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000157 uint8_t val;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000158
Uwe Hermanna7e05482007-05-09 10:17:44 +0000159 dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
160 if (!dev) {
Uwe Hermanna502dce2007-10-17 23:55:15 +0000161 fprintf(stderr, "\nERROR: VT8235 ISA bridge not found.\n");
Uwe Hermanna7e05482007-05-09 10:17:44 +0000162 return -1;
163 }
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000164
Uwe Hermanna7e05482007-05-09 10:17:44 +0000165 /* GPIO12-15 -> output */
166 val = pci_read_byte(dev, 0xE4);
167 val |= 0x10;
168 pci_write_byte(dev, 0xE4, val);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000169
Uwe Hermanna7e05482007-05-09 10:17:44 +0000170 /* Get Power Management IO address. */
171 base = pci_read_word(dev, 0x88) & 0xFF80;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000172
Uwe Hermann372eeb52007-12-04 21:49:06 +0000173 /* Enable GPIO15 which is connected to write protect. */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000174 val = inb(base + 0x4D);
175 val |= 0x80;
176 outb(val, base + 0x4D);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000177
Uwe Hermanna7e05482007-05-09 10:17:44 +0000178 return 0;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000179}
180
Uwe Hermannffec5f32007-08-23 16:08:21 +0000181/**
Luc Verhaegen32707542007-07-04 17:51:49 +0000182 * Suited for:
Uwe Hermannffec5f32007-08-23 16:08:21 +0000183 * - ASUS A7V8X-MX SE and A7V400-MX: AMD K7 + VIA KM400A + VT8235
184 * - Tyan Tomcat K7M: AMD Geode NX + VIA KM400 + VT8237.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000185 */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +0000186static int board_asus_a7v8x_mx(const char *name)
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000187{
Uwe Hermanna7e05482007-05-09 10:17:44 +0000188 struct pci_dev *dev;
189 uint8_t val;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000190
Uwe Hermanna7e05482007-05-09 10:17:44 +0000191 dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
Luc Verhaegen32707542007-07-04 17:51:49 +0000192 if (!dev)
193 dev = pci_dev_find(0x1106, 0x3227); /* VT8237 ISA bridge */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000194 if (!dev) {
Luc Verhaegen32707542007-07-04 17:51:49 +0000195 fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n");
Uwe Hermanna7e05482007-05-09 10:17:44 +0000196 return -1;
197 }
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000198
Uwe Hermann372eeb52007-12-04 21:49:06 +0000199 /* This bit is marked reserved actually. */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000200 val = pci_read_byte(dev, 0x59);
201 val &= 0x7F;
202 pci_write_byte(dev, 0x59, val);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000203
Uwe Hermann372eeb52007-12-04 21:49:06 +0000204 /* Raise ROM MEMW# line on Winbond W83697 Super I/O. */
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000205 w836xx_ext_enter(0x2E);
Luc Verhaegen7977f4e2007-05-04 04:47:04 +0000206
Uwe Hermann372eeb52007-12-04 21:49:06 +0000207 if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* Flash ROM enabled? */
208 wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* Enable MEMW#. */
Luc Verhaegen7977f4e2007-05-04 04:47:04 +0000209
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000210 w836xx_ext_leave(0x2E);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000211
Uwe Hermanna7e05482007-05-09 10:17:44 +0000212 return 0;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000213}
214
Uwe Hermannffec5f32007-08-23 16:08:21 +0000215/**
Luc Verhaegen6b141752007-05-20 16:16:13 +0000216 * Suited for ASUS P5A.
217 *
218 * This is rather nasty code, but there's no way to do this cleanly.
219 * We're basically talking to some unknown device on SMBus, my guess
220 * is that it is the Winbond W83781D that lives near the DIP BIOS.
221 */
Luc Verhaegen6b141752007-05-20 16:16:13 +0000222static int board_asus_p5a(const char *name)
223{
224 uint8_t tmp;
225 int i;
226
227#define ASUSP5A_LOOP 5000
228
229 outb(0x00, 0xE807);
230 outb(0xEF, 0xE803);
231
232 outb(0xFF, 0xE800);
233
234 for (i = 0; i < ASUSP5A_LOOP; i++) {
235 outb(0xE1, 0xFF);
236 if (inb(0xE800) & 0x04)
237 break;
238 }
239
240 if (i == ASUSP5A_LOOP) {
241 printf("%s: Unable to contact device.\n", name);
242 return -1;
243 }
244
245 outb(0x20, 0xE801);
246 outb(0x20, 0xE1);
247
248 outb(0xFF, 0xE802);
249
250 for (i = 0; i < ASUSP5A_LOOP; i++) {
251 tmp = inb(0xE800);
252 if (tmp & 0x70)
253 break;
254 }
255
256 if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
257 printf("%s: failed to read device.\n", name);
258 return -1;
259 }
260
261 tmp = inb(0xE804);
262 tmp &= ~0x02;
263
264 outb(0x00, 0xE807);
265 outb(0xEE, 0xE803);
266
267 outb(tmp, 0xE804);
268
269 outb(0xFF, 0xE800);
270 outb(0xE1, 0xFF);
271
272 outb(0x20, 0xE801);
273 outb(0x20, 0xE1);
274
275 outb(0xFF, 0xE802);
276
277 for (i = 0; i < ASUSP5A_LOOP; i++) {
278 tmp = inb(0xE800);
279 if (tmp & 0x70)
280 break;
281 }
282
283 if ((i == ASUSP5A_LOOP) || !(tmp & 0x10)) {
284 printf("%s: failed to write to device.\n", name);
285 return -1;
286 }
287
288 return 0;
289}
290
Stefan Reinauer1c283f42007-06-05 12:51:52 +0000291static int board_ibm_x3455(const char *name)
292{
293 uint8_t byte;
294
Uwe Hermanne823ee02007-06-05 15:02:18 +0000295 /* Set GPIO lines in the Broadcom HT-1000 southbridge. */
Stefan Reinauer1c283f42007-06-05 12:51:52 +0000296 outb(0x45, 0xcd6);
297 byte = inb(0xcd7);
Uwe Hermanne823ee02007-06-05 15:02:18 +0000298 outb(byte | 0x20, 0xcd7);
Stefan Reinauer1c283f42007-06-05 12:51:52 +0000299
300 return 0;
301}
302
Luc Verhaegenfdd0c582007-08-11 16:59:11 +0000303/**
304 * Suited for EPoX EP-BX3, and maybe some other Intel 440BX based boards.
305 */
306static int board_epox_ep_bx3(const char *name)
307{
308 uint8_t tmp;
309
310 /* Raise GPIO22. */
311 tmp = inb(0x4036);
312 outb(tmp, 0xEB);
313
314 tmp |= 0x40;
315
316 outb(tmp, 0x4036);
317 outb(tmp, 0xEB);
318
319 return 0;
320}
321
Uwe Hermannffec5f32007-08-23 16:08:21 +0000322/**
Uwe Hermann372eeb52007-12-04 21:49:06 +0000323 * Suited for Acorp 6A815EPD.
Jonathan A. Kollaschc7785562007-12-02 19:03:23 +0000324 */
325static int board_acorp_6a815epd(const char *name)
326{
327 struct pci_dev *dev;
328 uint16_t port;
329 uint8_t val;
330
331 dev = pci_dev_find(0x8086, 0x2440); /* Intel ICH2 LPC */
332 if (!dev) {
333 fprintf(stderr, "\nERROR: ICH2 LPC bridge not found.\n");
334 return -1;
335 }
336
337 /* Use GPIOBASE register to find where the GPIO is mapped. */
Uwe Hermann372eeb52007-12-04 21:49:06 +0000338 port = (pci_read_word(dev, 0x58) & 0xFFC0) + 0xE;
Jonathan A. Kollaschc7785562007-12-02 19:03:23 +0000339
340 val = inb(port);
341 val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */
342 val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */
343 outb(val, port);
344
345 return 0;
346}
347
348/**
Uwe Hermannffec5f32007-08-23 16:08:21 +0000349 * We use 2 sets of IDs here, you're free to choose which is which. This
350 * is to provide a very high degree of certainty when matching a board on
351 * the basis of subsystem/card IDs. As not every vendor handles
352 * subsystem/card IDs in a sane manner.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000353 *
Uwe Hermannffec5f32007-08-23 16:08:21 +0000354 * Keep the second set NULLed if it should be ignored.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000355 */
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000356struct board_pciid_enable {
Uwe Hermann372eeb52007-12-04 21:49:06 +0000357 /* Any device, but make it sensible, like the ISA bridge. */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000358 uint16_t first_vendor;
359 uint16_t first_device;
360 uint16_t first_card_vendor;
361 uint16_t first_card_device;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000362
Uwe Hermanna7e05482007-05-09 10:17:44 +0000363 /* Any device, but make it sensible, like
Uwe Hermann372eeb52007-12-04 21:49:06 +0000364 * the host bridge. May be NULL.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000365 */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000366 uint16_t second_vendor;
367 uint16_t second_device;
368 uint16_t second_card_vendor;
369 uint16_t second_card_device;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000370
Uwe Hermann372eeb52007-12-04 21:49:06 +0000371 /* The vendor / part name from the LinuxBIOS table. */
372 const char *lb_vendor;
373 const char *lb_part;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000374
Uwe Hermann372eeb52007-12-04 21:49:06 +0000375 const char *name;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000376 int (*enable) (const char *name);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000377};
378
379struct board_pciid_enable board_pciid_enables[] = {
Carl-Daniel Hailfinger92242622007-09-27 14:29:57 +0000380 {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
Uwe Hermanna502dce2007-10-17 23:55:15 +0000381 "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash},
Michael van der Kolff3385cb82007-10-16 21:18:43 +0000382 {0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
Uwe Hermanna502dce2007-10-17 23:55:15 +0000383 "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash},
Uwe Hermanna7e05482007-05-09 10:17:44 +0000384 {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000385 "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e},
386 {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
387 "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e},
Uwe Hermanna7e05482007-05-09 10:17:44 +0000388 {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000389 "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e},
Uwe Hermanna7e05482007-05-09 10:17:44 +0000390 {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
391 NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m},
392 {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
393 NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx},
Luc Verhaegen32707542007-07-04 17:51:49 +0000394 {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498,
395 NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx},
Luc Verhaegen6b141752007-05-20 16:16:13 +0000396 {0x10B9, 0x1541, 0x0000, 0x0000, 0x10B9, 0x1533, 0x0000, 0x0000,
397 "asus", "p5a", "ASUS P5A", board_asus_p5a},
Stefan Reinauer1c283f42007-06-05 12:51:52 +0000398 {0x1166, 0x0205, 0x1014, 0x0347, 0x0000, 0x0000, 0x0000, 0x0000,
399 "ibm", "x3455", "IBM x3455", board_ibm_x3455},
Luc Verhaegenfdd0c582007-08-11 16:59:11 +0000400 {0x8086, 0x7110, 0x0000, 0x0000, 0x8086, 0x7190, 0x0000, 0x0000,
401 "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3},
Jonathan A. Kollaschc7785562007-12-02 19:03:23 +0000402 {0x8086, 0x1130, 0x0000, 0x0000, 0x105a, 0x0d30, 0x105a, 0x4d33,
403 "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd},
Uwe Hermanna7e05482007-05-09 10:17:44 +0000404 {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000405};
406
Uwe Hermannffec5f32007-08-23 16:08:21 +0000407/**
408 * Match boards on LinuxBIOS table gathered vendor and part name.
409 * Require main PCI IDs to match too as extra safety.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000410 */
Uwe Hermann372eeb52007-12-04 21:49:06 +0000411static struct board_pciid_enable *board_match_linuxbios_name(const char *vendor, const char *part)
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000412{
Uwe Hermanna7e05482007-05-09 10:17:44 +0000413 struct board_pciid_enable *board = board_pciid_enables;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000414
Uwe Hermanna7e05482007-05-09 10:17:44 +0000415 for (; board->name; board++) {
416 if (!board->lb_vendor || strcmp(board->lb_vendor, vendor))
417 continue;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000418
Uwe Hermanna7e05482007-05-09 10:17:44 +0000419 if (!board->lb_part || strcmp(board->lb_part, part))
420 continue;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000421
Uwe Hermanna7e05482007-05-09 10:17:44 +0000422 if (!pci_dev_find(board->first_vendor, board->first_device))
423 continue;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000424
Uwe Hermanna7e05482007-05-09 10:17:44 +0000425 if (board->second_vendor &&
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000426 !pci_dev_find(board->second_vendor, board->second_device))
Uwe Hermanna7e05482007-05-09 10:17:44 +0000427 continue;
428 return board;
429 }
Uwe Hermann372eeb52007-12-04 21:49:06 +0000430
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000431 printf("NOT FOUND %s:%s\n", vendor, part);
Uwe Hermann372eeb52007-12-04 21:49:06 +0000432
Uwe Hermanna7e05482007-05-09 10:17:44 +0000433 return NULL;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000434}
435
Uwe Hermannffec5f32007-08-23 16:08:21 +0000436/**
437 * Match boards on PCI IDs and subsystem IDs.
438 * Second set of IDs can be main only or missing completely.
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000439 */
440static struct board_pciid_enable *board_match_pci_card_ids(void)
441{
Uwe Hermanna7e05482007-05-09 10:17:44 +0000442 struct board_pciid_enable *board = board_pciid_enables;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000443
Uwe Hermanna7e05482007-05-09 10:17:44 +0000444 for (; board->name; board++) {
445 if (!board->first_card_vendor || !board->first_card_device)
446 continue;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000447
Uwe Hermanna7e05482007-05-09 10:17:44 +0000448 if (!pci_card_find(board->first_vendor, board->first_device,
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000449 board->first_card_vendor,
450 board->first_card_device))
Uwe Hermanna7e05482007-05-09 10:17:44 +0000451 continue;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000452
Uwe Hermanna7e05482007-05-09 10:17:44 +0000453 if (board->second_vendor) {
454 if (board->second_card_vendor) {
455 if (!pci_card_find(board->second_vendor,
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000456 board->second_device,
457 board->second_card_vendor,
458 board->second_card_device))
Uwe Hermanna7e05482007-05-09 10:17:44 +0000459 continue;
460 } else {
461 if (!pci_dev_find(board->second_vendor,
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000462 board->second_device))
Uwe Hermanna7e05482007-05-09 10:17:44 +0000463 continue;
464 }
465 }
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000466
Uwe Hermanna7e05482007-05-09 10:17:44 +0000467 return board;
468 }
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000469
Uwe Hermanna7e05482007-05-09 10:17:44 +0000470 return NULL;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000471}
472
Uwe Hermann372eeb52007-12-04 21:49:06 +0000473int board_flash_enable(const char *vendor, const char *part)
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000474{
Uwe Hermanna7e05482007-05-09 10:17:44 +0000475 struct board_pciid_enable *board = NULL;
476 int ret = 0;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000477
Uwe Hermanna7e05482007-05-09 10:17:44 +0000478 if (vendor && part)
479 board = board_match_linuxbios_name(vendor, part);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000480
Uwe Hermanna7e05482007-05-09 10:17:44 +0000481 if (!board)
482 board = board_match_pci_card_ids();
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000483
Uwe Hermanna7e05482007-05-09 10:17:44 +0000484 if (board) {
Uwe Hermanna502dce2007-10-17 23:55:15 +0000485 printf("Found board \"%s\": enabling flash write... ",
Ronald G. Minnichfa496922007-10-12 21:22:40 +0000486 board->name);
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000487
Uwe Hermanna7e05482007-05-09 10:17:44 +0000488 ret = board->enable(board->name);
489 if (ret)
Uwe Hermanna502dce2007-10-17 23:55:15 +0000490 printf("FAILED!\n");
Uwe Hermanna7e05482007-05-09 10:17:44 +0000491 else
492 printf("OK.\n");
493 }
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000494
Uwe Hermanna7e05482007-05-09 10:17:44 +0000495 return ret;
Luc Verhaegen8e3a6002007-04-04 22:45:58 +0000496}