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Mark Marshall90021f22010-12-03 14:48:11 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Mark Marshall
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Mark Marshall90021f22010-12-03 14:48:11 +000014 */
15
16#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000017#include <strings.h>
Mark Marshall90021f22010-12-03 14:48:11 +000018#include <string.h>
19#include "flash.h"
20#include "programmer.h"
Thomas Heijligen74b4aa02021-12-14 17:52:30 +010021#include "hwaccess_physmap.h"
Thomas Heijligend96c97c2021-11-02 21:03:00 +010022#include "platform/pci.h"
Mark Marshall90021f22010-12-03 14:48:11 +000023
24#define PCI_VENDOR_ID_OGP 0x1227
25
26/* These are the register addresses for the OGD1 / OGA1. If they are
27 * different for later versions of the hardware then we will need
28 * logic to select between the different hardware versions. */
29#define OGA1_XP10_BPROM_SI 0x0040 /* W */
30#define OGA1_XP10_BPROM_SO 0x0040 /* R */
31#define OGA1_XP10_BPROM_CE_BAR 0x0044 /* W */
32#define OGA1_XP10_BPROM_SCK 0x0048 /* W */
33#define OGA1_XP10_BPROM_REG_SEL 0x004C /* W */
34#define OGA1_XP10_CPROM_SI 0x0050 /* W */
35#define OGA1_XP10_CPROM_SO 0x0050 /* R */
36#define OGA1_XP10_CPROM_CE_BAR 0x0054 /* W */
37#define OGA1_XP10_CPROM_SCK 0x0058 /* W */
38#define OGA1_XP10_CPROM_REG_SEL 0x005C /* W */
39
40static uint8_t *ogp_spibar;
41
42static uint32_t ogp_reg_sel;
43static uint32_t ogp_reg_siso;
44static uint32_t ogp_reg__ce;
45static uint32_t ogp_reg_sck;
46
Thomas Heijligencc853d82021-05-04 15:32:17 +020047static const struct dev_entry ogp_spi[] = {
Mark Marshall90021f22010-12-03 14:48:11 +000048 {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000049
50 {0},
Mark Marshall90021f22010-12-03 14:48:11 +000051};
52
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100053static void ogp_request_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000054{
55 pci_mmio_writel(1, ogp_spibar + ogp_reg_sel);
56}
57
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100058static void ogp_release_spibus(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000059{
60 pci_mmio_writel(0, ogp_spibar + ogp_reg_sel);
61}
62
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100063static void ogp_bitbang_set_cs(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000064{
65 pci_mmio_writel(val, ogp_spibar + ogp_reg__ce);
66}
67
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100068static void ogp_bitbang_set_sck(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000069{
70 pci_mmio_writel(val, ogp_spibar + ogp_reg_sck);
71}
72
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100073static void ogp_bitbang_set_mosi(int val, void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000074{
75 pci_mmio_writel(val, ogp_spibar + ogp_reg_siso);
76}
77
Anastasia Klimchuk0e788182021-05-26 09:54:08 +100078static int ogp_bitbang_get_miso(void *spi_data)
Mark Marshall90021f22010-12-03 14:48:11 +000079{
80 uint32_t tmp;
81
82 tmp = pci_mmio_readl(ogp_spibar + ogp_reg_siso);
83 return tmp & 0x1;
84}
85
86static const struct bitbang_spi_master bitbang_spi_master_ogp = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020087 .set_cs = ogp_bitbang_set_cs,
88 .set_sck = ogp_bitbang_set_sck,
89 .set_mosi = ogp_bitbang_set_mosi,
90 .get_miso = ogp_bitbang_get_miso,
91 .request_bus = ogp_request_spibus,
92 .release_bus = ogp_release_spibus,
93 .half_period = 0,
Mark Marshall90021f22010-12-03 14:48:11 +000094};
95
Thomas Heijligencc853d82021-05-04 15:32:17 +020096static int ogp_spi_init(void)
Mark Marshall90021f22010-12-03 14:48:11 +000097{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000098 struct pci_dev *dev = NULL;
Mark Marshall90021f22010-12-03 14:48:11 +000099 char *type;
100
101 type = extract_programmer_param("rom");
102
103 if (!type) {
Nico Huberc3b02dc2023-08-12 01:13:45 +0200104 msg_perr("Please use flashprog -p ogp_spi:rom=... to specify "
Mark Marshall90021f22010-12-03 14:48:11 +0000105 "which flashchip you want to access.\n");
106 return 1;
107 } else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) {
108 ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL;
109 ogp_reg_siso = OGA1_XP10_BPROM_SI;
110 ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR;
111 ogp_reg_sck = OGA1_XP10_BPROM_SCK;
112 } else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) {
113 ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL;
114 ogp_reg_siso = OGA1_XP10_CPROM_SI;
115 ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR;
116 ogp_reg_sck = OGA1_XP10_CPROM_SCK;
117 } else {
118 msg_perr("Invalid or missing rom= parameter.\n");
Stefan Reinauera9c23422014-04-26 16:11:50 +0000119 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000120 return 1;
121 }
Stefan Reinauera9c23422014-04-26 16:11:50 +0000122 free(type);
Mark Marshall90021f22010-12-03 14:48:11 +0000123
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +0000124 dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0);
125 if (!dev)
126 return 1;
Mark Marshall90021f22010-12-03 14:48:11 +0000127
Stefan Tauner0ccec8f2014-06-01 23:49:03 +0000128 uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0);
Niklas Söderlund89edf362013-08-23 23:29:23 +0000129 if (!io_base_addr)
130 return 1;
131
Stefan Tauner7fb5aa02013-08-14 15:48:44 +0000132 ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096);
133 if (ogp_spibar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +0000134 return 1;
135
Anastasia Klimchuka447c122021-05-31 11:20:01 +1000136 if (register_spi_bitbang_master(&bitbang_spi_master_ogp, NULL))
Mark Marshall90021f22010-12-03 14:48:11 +0000137 return 1;
138
Mark Marshall90021f22010-12-03 14:48:11 +0000139 return 0;
140}
Thomas Heijligencc853d82021-05-04 15:32:17 +0200141
142const struct programmer_entry programmer_ogp_spi = {
143 .name = "ogp_spi",
144 .type = PCI,
145 .devs.dev = ogp_spi,
146 .init = ogp_spi_init,
Thomas Heijligencc853d82021-05-04 15:32:17 +0200147};