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Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger3431bb72009-06-24 08:28:39 +00004 * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger
Stefan Reinauera9424d52008-06-27 16:28:34 +00005 * Copyright (C) 2008 coresystems GmbH
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Contains the generic SPI framework
23 */
24
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000025#include <string.h>
26#include "flash.h"
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000027#include "flashchips.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000028#include "chipdrivers.h"
Carl-Daniel Hailfingerd6cbf762008-05-13 14:58:23 +000029#include "spi.h"
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000030
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +000031enum spi_controller spi_controller = SPI_CONTROLLER_NONE;
32void *spibar = NULL;
33
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +000034void spi_prettyprint_status_register(struct flashchip *flash);
Carl-Daniel Hailfinger70539262007-10-15 21:45:29 +000035
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000036const struct spi_programmer spi_programmer[] = {
37 { /* SPI_CONTROLLER_NONE */
38 .command = NULL,
39 .multicommand = NULL,
40 .read = NULL,
41 .write_256 = NULL,
42 },
43
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000044#if INTERNAL_SUPPORT == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000045#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000046 { /* SPI_CONTROLLER_ICH7 */
47 .command = ich_spi_send_command,
48 .multicommand = ich_spi_send_multicommand,
49 .read = ich_spi_read,
50 .write_256 = ich_spi_write_256,
51 },
52
53 { /* SPI_CONTROLLER_ICH9 */
54 .command = ich_spi_send_command,
55 .multicommand = ich_spi_send_multicommand,
56 .read = ich_spi_read,
57 .write_256 = ich_spi_write_256,
58 },
59
60 { /* SPI_CONTROLLER_IT87XX */
61 .command = it8716f_spi_send_command,
62 .multicommand = default_spi_send_multicommand,
63 .read = it8716f_spi_chip_read,
64 .write_256 = it8716f_spi_chip_write_256,
65 },
66
67 { /* SPI_CONTROLLER_SB600 */
68 .command = sb600_spi_send_command,
69 .multicommand = default_spi_send_multicommand,
70 .read = sb600_spi_read,
71 .write_256 = sb600_spi_write_1,
72 },
73
74 { /* SPI_CONTROLLER_VIA */
75 .command = ich_spi_send_command,
76 .multicommand = ich_spi_send_multicommand,
77 .read = ich_spi_read,
78 .write_256 = ich_spi_write_256,
79 },
80
81 { /* SPI_CONTROLLER_WBSIO */
82 .command = wbsio_spi_send_command,
83 .multicommand = default_spi_send_multicommand,
84 .read = wbsio_spi_read,
85 .write_256 = wbsio_spi_write_1,
86 },
Carl-Daniel Hailfinger66ef4e52009-12-13 22:28:00 +000087#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000088#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000089
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000090#if FT2232_SPI_SUPPORT == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000091 { /* SPI_CONTROLLER_FT2232 */
92 .command = ft2232_spi_send_command,
93 .multicommand = default_spi_send_multicommand,
94 .read = ft2232_spi_read,
95 .write_256 = ft2232_spi_write_256,
96 },
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000097#endif
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +000098
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +000099#if DUMMY_SUPPORT == 1
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000100 { /* SPI_CONTROLLER_DUMMY */
101 .command = dummy_spi_send_command,
102 .multicommand = default_spi_send_multicommand,
103 .read = NULL,
104 .write_256 = NULL,
105 },
Carl-Daniel Hailfinger4740c6f2009-09-16 10:09:21 +0000106#endif
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000107
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000108#if BUSPIRATE_SPI_SUPPORT == 1
109 { /* SPI_CONTROLLER_BUSPIRATE */
110 .command = buspirate_spi_send_command,
111 .multicommand = default_spi_send_multicommand,
112 .read = buspirate_spi_read,
Carl-Daniel Hailfinger408e47a2010-03-22 03:30:58 +0000113 .write_256 = buspirate_spi_write_256,
Carl-Daniel Hailfinger5cca01f2009-11-24 00:20:03 +0000114 },
115#endif
116
Carl-Daniel Hailfingerd38fac82010-01-19 11:15:48 +0000117#if DEDIPROG_SUPPORT == 1
118 { /* SPI_CONTROLLER_DEDIPROG */
119 .command = dediprog_spi_send_command,
120 .multicommand = default_spi_send_multicommand,
121 .read = dediprog_spi_read,
122 .write_256 = spi_chip_write_1,
123 },
124#endif
125
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000126 {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000127};
128
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +0000129const int spi_programmer_count = ARRAY_SIZE(spi_programmer);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000130
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000131int spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann394131e2008-10-18 21:14:13 +0000132 const unsigned char *writearr, unsigned char *readarr)
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000133{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000134 if (!spi_programmer[spi_controller].command) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000135 msg_perr("%s called, but SPI is unsupported on this "
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000136 "hardware. Please report a bug.\n", __func__);
137 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000138 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000139
140 return spi_programmer[spi_controller].command(writecnt, readcnt,
141 writearr, readarr);
Carl-Daniel Hailfinger3d94a0e2007-10-16 21:09:06 +0000142}
143
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000144int spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000145{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000146 if (!spi_programmer[spi_controller].multicommand) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000147 msg_perr("%s called, but SPI is unsupported on this "
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000148 "hardware. Please report a bug.\n", __func__);
149 return 1;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000150 }
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000151
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000152 return spi_programmer[spi_controller].multicommand(cmds);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000153}
154
155int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
156 const unsigned char *writearr, unsigned char *readarr)
157{
158 struct spi_command cmd[] = {
159 {
160 .writecnt = writecnt,
161 .readcnt = readcnt,
162 .writearr = writearr,
163 .readarr = readarr,
164 }, {
165 .writecnt = 0,
166 .writearr = NULL,
167 .readcnt = 0,
168 .readarr = NULL,
169 }};
170
171 return spi_send_multicommand(cmd);
172}
173
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000174int default_spi_send_multicommand(struct spi_command *cmds)
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000175{
176 int result = 0;
Carl-Daniel Hailfinger26f7e642009-09-18 15:50:56 +0000177 for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
178 result = spi_send_command(cmds->writecnt, cmds->readcnt,
179 cmds->writearr, cmds->readarr);
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000180 }
181 return result;
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000182}
183
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000184int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000185{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000186 if (!spi_programmer[spi_controller].read) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000187 msg_perr("%s called, but SPI read is unsupported on this"
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000188 " hardware. Please report a bug.\n", __func__);
189 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000190 }
191
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000192 return spi_programmer[spi_controller].read(flash, buf, start, len);
Ronald Hoogenboom7ff530b2008-01-19 00:04:46 +0000193}
194
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000195/*
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000196 * Program chip using page (256 bytes) programming.
197 * Some SPI masters can't do this, they use single byte programming instead.
198 */
Carl-Daniel Hailfinger8d497012009-05-09 02:34:18 +0000199int spi_chip_write_256(struct flashchip *flash, uint8_t *buf)
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000200{
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000201 if (!spi_programmer[spi_controller].write_256) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000202 msg_perr("%s called, but SPI page write is unsupported "
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000203 " on this hardware. Please report a bug.\n", __func__);
204 return 1;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000205 }
206
Carl-Daniel Hailfinger02487aa2009-07-22 15:36:50 +0000207 return spi_programmer[spi_controller].write_256(flash, buf);
Carl-Daniel Hailfinger6b444962007-10-18 00:24:07 +0000208}
Peter Stugefd9217d2009-01-26 03:37:40 +0000209
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000210/*
211 * Get the lowest allowed address for read accesses. This often happens to
212 * be the lowest allowed address for all commands which take an address.
213 * This is a programmer limitation.
214 */
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000215uint32_t spi_get_valid_read_addr(void)
216{
Carl-Daniel Hailfinger80f3d052010-05-28 15:53:08 +0000217 switch (spi_controller) {
218#if INTERNAL_SUPPORT == 1
219#if defined(__i386__) || defined(__x86_64__)
220 case SPI_CONTROLLER_ICH7:
221 /* Return BBAR for ICH chipsets. */
222 return ichspi_bbar;
223#endif
224#endif
225 default:
226 return 0;
227 }
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000228}