blob: 5181e2d07b726d19493946dac86b47781039277e [file] [log] [blame]
Uwe Hermannddd5c9e2010-02-21 21:17:00 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000015 */
16
17#include <stdlib.h>
18#include <string.h>
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000019#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000020#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000021#include "hwaccess.h"
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000022
23#define BIOS_ROM_ADDR 0x90
24#define BIOS_ROM_DATA 0x94
25
26#define REG_FLASH_ACCESS 0x58
27
28#define PCI_VENDOR_ID_HPT 0x1103
29
Stefan Tauner0ccec8f2014-06-01 23:49:03 +000030static uint32_t io_base_addr = 0;
31
Thomas Heijligencc853d82021-05-04 15:32:17 +020032static const struct dev_entry ata_hpt[] = {
Michael Karcher84486392010-02-24 00:04:40 +000033 {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
34 {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
35 {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000036
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000037 {0},
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000038};
39
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000040static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
41 chipaddr addr);
42static uint8_t atahpt_chip_readb(const struct flashctx *flash,
43 const chipaddr addr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000044static const struct par_master par_master_atahpt = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020045 .chip_readb = atahpt_chip_readb,
46 .chip_readw = fallback_chip_readw,
47 .chip_readl = fallback_chip_readl,
48 .chip_readn = fallback_chip_readn,
49 .chip_writeb = atahpt_chip_writeb,
50 .chip_writew = fallback_chip_writew,
51 .chip_writel = fallback_chip_writel,
52 .chip_writen = fallback_chip_writen,
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000053};
54
Thomas Heijligencc853d82021-05-04 15:32:17 +020055static int atahpt_init(void)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000056{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000057 struct pci_dev *dev = NULL;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000058 uint32_t reg32;
59
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +000060 if (rget_io_perms())
61 return 1;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000062
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000063 dev = pcidev_init(ata_hpt, PCI_BASE_ADDRESS_4);
64 if (!dev)
65 return 1;
66
67 io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4);
Niklas Söderlund89edf362013-08-23 23:29:23 +000068 if (!io_base_addr)
69 return 1;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000070
71 /* Enable flash access. */
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000072 reg32 = pci_read_long(dev, REG_FLASH_ACCESS);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000073 reg32 |= (1 << 24);
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000074 rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000075
Anastasia Klimchukc1f2a472021-08-27 15:47:46 +100076 return register_par_master(&par_master_atahpt, BUS_PARALLEL, NULL);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000077}
78
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000079static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
80 chipaddr addr)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000081{
82 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
83 OUTB(val, io_base_addr + BIOS_ROM_DATA);
84}
85
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000086static uint8_t atahpt_chip_readb(const struct flashctx *flash,
87 const chipaddr addr)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000088{
89 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
90 return INB(io_base_addr + BIOS_ROM_DATA);
91}
Andrew Morgana0743832011-07-25 22:07:05 +000092
Thomas Heijligencc853d82021-05-04 15:32:17 +020093const struct programmer_entry programmer_atahpt = {
94 .name = "atahpt",
95 .type = PCI,
96 .devs.dev = ata_hpt,
97 .init = atahpt_init,
98 .map_flash_region = fallback_map,
99 .unmap_flash_region = fallback_unmap,
100 .delay = internal_delay,
101};