blob: 00e0992cf823916dd3e7b3f6665879eb7ee3b372 [file] [log] [blame]
Sean Nelson14ba6682010-02-26 05:48:29 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger
Sean Nelson14ba6682010-02-26 05:48:29 +00005 * Copyright (C) 2008 coresystems GmbH
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Contains the common SPI chip driver functions
23 */
24
Nico Hubera3140d02017-10-15 11:20:58 +020025#include <stddef.h>
Sean Nelson14ba6682010-02-26 05:48:29 +000026#include <string.h>
Nico Hubera1672f82017-10-14 18:00:20 +020027#include <stdbool.h>
Sean Nelson14ba6682010-02-26 05:48:29 +000028#include "flash.h"
29#include "flashchips.h"
30#include "chipdrivers.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000031#include "programmer.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000032#include "spi.h"
33
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000034static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes)
Sean Nelson14ba6682010-02-26 05:48:29 +000035{
Mathias Krausea60faab2011-01-17 07:50:42 +000036 static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
Sean Nelson14ba6682010-02-26 05:48:29 +000037 int ret;
38 int i;
39
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000040 ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
Sean Nelson14ba6682010-02-26 05:48:29 +000041 if (ret)
42 return ret;
Sean Nelsoned479d22010-03-24 23:14:32 +000043 msg_cspew("RDID returned");
Sean Nelson14ba6682010-02-26 05:48:29 +000044 for (i = 0; i < bytes; i++)
Sean Nelsoned479d22010-03-24 23:14:32 +000045 msg_cspew(" 0x%02x", readarr[i]);
46 msg_cspew(". ");
Sean Nelson14ba6682010-02-26 05:48:29 +000047 return 0;
48}
49
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000050static int spi_rems(struct flashctx *flash, unsigned char *readarr)
Sean Nelson14ba6682010-02-26 05:48:29 +000051{
Nico Hubered098d62017-04-21 23:47:08 +020052 static const unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, };
Sean Nelson14ba6682010-02-26 05:48:29 +000053 int ret;
54
Nico Hubered098d62017-04-21 23:47:08 +020055 ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
Sean Nelson14ba6682010-02-26 05:48:29 +000056 if (ret)
57 return ret;
Cristian Măgherușan-Stanciu9932c7b2011-07-07 19:56:58 +000058 msg_cspew("REMS returned 0x%02x 0x%02x. ", readarr[0], readarr[1]);
Sean Nelson14ba6682010-02-26 05:48:29 +000059 return 0;
60}
61
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000062static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes)
Sean Nelson14ba6682010-02-26 05:48:29 +000063{
Nico Hubered098d62017-04-21 23:47:08 +020064 static const unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, };
Sean Nelson14ba6682010-02-26 05:48:29 +000065 int ret;
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +000066 int i;
Sean Nelson14ba6682010-02-26 05:48:29 +000067
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000068 ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
Sean Nelson14ba6682010-02-26 05:48:29 +000069 if (ret)
70 return ret;
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +000071 msg_cspew("RES returned");
72 for (i = 0; i < bytes; i++)
73 msg_cspew(" 0x%02x", readarr[i]);
74 msg_cspew(". ");
Sean Nelson14ba6682010-02-26 05:48:29 +000075 return 0;
76}
77
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000078int spi_write_enable(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +000079{
Mathias Krausea60faab2011-01-17 07:50:42 +000080 static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
Sean Nelson14ba6682010-02-26 05:48:29 +000081 int result;
82
83 /* Send WREN (Write Enable) */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000084 result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
Sean Nelson14ba6682010-02-26 05:48:29 +000085
86 if (result)
Sean Nelsoned479d22010-03-24 23:14:32 +000087 msg_cerr("%s failed\n", __func__);
Sean Nelson14ba6682010-02-26 05:48:29 +000088
89 return result;
90}
91
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000092int spi_write_disable(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +000093{
Mathias Krausea60faab2011-01-17 07:50:42 +000094 static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
Sean Nelson14ba6682010-02-26 05:48:29 +000095
96 /* Send WRDI (Write Disable) */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000097 return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
Sean Nelson14ba6682010-02-26 05:48:29 +000098}
99
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000100static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
Sean Nelson14ba6682010-02-26 05:48:29 +0000101{
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000102 const struct flashchip *chip = flash->chip;
Sean Nelson14ba6682010-02-26 05:48:29 +0000103 unsigned char readarr[4];
104 uint32_t id1;
105 uint32_t id2;
106
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000107 if (spi_rdid(flash, readarr, bytes)) {
Sean Nelson14ba6682010-02-26 05:48:29 +0000108 return 0;
Stefan Tauner355cbfd2011-05-28 02:37:14 +0000109 }
Sean Nelson14ba6682010-02-26 05:48:29 +0000110
111 if (!oddparity(readarr[0]))
Sean Nelsoned479d22010-03-24 23:14:32 +0000112 msg_cdbg("RDID byte 0 parity violation. ");
Sean Nelson14ba6682010-02-26 05:48:29 +0000113
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000114 /* Check if this is a continuation vendor ID.
115 * FIXME: Handle continuation device IDs.
116 */
Sean Nelson14ba6682010-02-26 05:48:29 +0000117 if (readarr[0] == 0x7f) {
118 if (!oddparity(readarr[1]))
Sean Nelsoned479d22010-03-24 23:14:32 +0000119 msg_cdbg("RDID byte 1 parity violation. ");
Sean Nelson14ba6682010-02-26 05:48:29 +0000120 id1 = (readarr[0] << 8) | readarr[1];
121 id2 = readarr[2];
122 if (bytes > 3) {
123 id2 <<= 8;
124 id2 |= readarr[3];
125 }
126 } else {
127 id1 = readarr[0];
128 id2 = (readarr[1] << 8) | readarr[2];
129 }
130
Sean Nelsoned479d22010-03-24 23:14:32 +0000131 msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Sean Nelson14ba6682010-02-26 05:48:29 +0000132
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000133 if (id1 == chip->manufacture_id && id2 == chip->model_id)
Sean Nelson14ba6682010-02-26 05:48:29 +0000134 return 1;
Sean Nelson14ba6682010-02-26 05:48:29 +0000135
136 /* Test if this is a pure vendor match. */
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000137 if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id)
Sean Nelson14ba6682010-02-26 05:48:29 +0000138 return 1;
139
140 /* Test if there is any vendor ID. */
Urja Rannikko0a5f6e42015-06-22 23:59:15 +0000141 if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != 0x00)
Sean Nelson14ba6682010-02-26 05:48:29 +0000142 return 1;
143
144 return 0;
145}
146
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000147int probe_spi_rdid(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +0000148{
149 return probe_spi_rdid_generic(flash, 3);
150}
151
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000152int probe_spi_rdid4(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +0000153{
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000154 /* Some SPI controllers do not support commands with writecnt=1 and
155 * readcnt=4.
156 */
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000157 switch (flash->mst->spi.type) {
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000158#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000159#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000160 case SPI_CONTROLLER_IT87XX:
Sean Nelson14ba6682010-02-26 05:48:29 +0000161 case SPI_CONTROLLER_WBSIO:
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000162 msg_cinfo("4 byte RDID not supported on this SPI controller\n");
163 return 0;
164 break;
Sean Nelson14ba6682010-02-26 05:48:29 +0000165#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000166#endif
Sean Nelson14ba6682010-02-26 05:48:29 +0000167 default:
Carl-Daniel Hailfinger8ae500e2010-06-20 10:39:33 +0000168 return probe_spi_rdid_generic(flash, 4);
Sean Nelson14ba6682010-02-26 05:48:29 +0000169 }
170
171 return 0;
172}
173
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000174int probe_spi_rems(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +0000175{
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000176 const struct flashchip *chip = flash->chip;
Sean Nelson14ba6682010-02-26 05:48:29 +0000177 unsigned char readarr[JEDEC_REMS_INSIZE];
178 uint32_t id1, id2;
179
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000180 if (spi_rems(flash, readarr)) {
Sean Nelson14ba6682010-02-26 05:48:29 +0000181 return 0;
Stefan Tauner355cbfd2011-05-28 02:37:14 +0000182 }
Sean Nelson14ba6682010-02-26 05:48:29 +0000183
184 id1 = readarr[0];
185 id2 = readarr[1];
186
Sean Nelsoned479d22010-03-24 23:14:32 +0000187 msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
Sean Nelson14ba6682010-02-26 05:48:29 +0000188
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000189 if (id1 == chip->manufacture_id && id2 == chip->model_id)
Sean Nelson14ba6682010-02-26 05:48:29 +0000190 return 1;
Sean Nelson14ba6682010-02-26 05:48:29 +0000191
192 /* Test if this is a pure vendor match. */
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000193 if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id)
Sean Nelson14ba6682010-02-26 05:48:29 +0000194 return 1;
195
196 /* Test if there is any vendor ID. */
Urja Rannikko0a5f6e42015-06-22 23:59:15 +0000197 if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != 0x00)
Sean Nelson14ba6682010-02-26 05:48:29 +0000198 return 1;
199
200 return 0;
201}
202
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000203int probe_spi_res1(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +0000204{
Mathias Krausea60faab2011-01-17 07:50:42 +0000205 static const unsigned char allff[] = {0xff, 0xff, 0xff};
206 static const unsigned char all00[] = {0x00, 0x00, 0x00};
Sean Nelson14ba6682010-02-26 05:48:29 +0000207 unsigned char readarr[3];
208 uint32_t id2;
Sean Nelson14ba6682010-02-26 05:48:29 +0000209
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000210 /* We only want one-byte RES if RDID and REMS are unusable. */
211
Sean Nelson14ba6682010-02-26 05:48:29 +0000212 /* Check if RDID is usable and does not return 0xff 0xff 0xff or
213 * 0x00 0x00 0x00. In that case, RES is pointless.
214 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000215 if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) &&
Sean Nelson14ba6682010-02-26 05:48:29 +0000216 memcmp(readarr, all00, 3)) {
217 msg_cdbg("Ignoring RES in favour of RDID.\n");
218 return 0;
219 }
220 /* Check if REMS is usable and does not return 0xff 0xff or
221 * 0x00 0x00. In that case, RES is pointless.
222 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000223 if (!spi_rems(flash, readarr) &&
224 memcmp(readarr, allff, JEDEC_REMS_INSIZE) &&
Sean Nelson14ba6682010-02-26 05:48:29 +0000225 memcmp(readarr, all00, JEDEC_REMS_INSIZE)) {
226 msg_cdbg("Ignoring RES in favour of REMS.\n");
227 return 0;
228 }
229
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000230 if (spi_res(flash, readarr, 1)) {
Sean Nelson14ba6682010-02-26 05:48:29 +0000231 return 0;
Stefan Tauner355cbfd2011-05-28 02:37:14 +0000232 }
Sean Nelson14ba6682010-02-26 05:48:29 +0000233
Sean Nelson14ba6682010-02-26 05:48:29 +0000234 id2 = readarr[0];
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000235
Sean Nelsoned479d22010-03-24 23:14:32 +0000236 msg_cdbg("%s: id 0x%x\n", __func__, id2);
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000237
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000238 if (id2 != flash->chip->model_id)
Sean Nelson14ba6682010-02-26 05:48:29 +0000239 return 0;
240
Sean Nelson14ba6682010-02-26 05:48:29 +0000241 return 1;
242}
243
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000244int probe_spi_res2(struct flashctx *flash)
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000245{
246 unsigned char readarr[2];
247 uint32_t id1, id2;
248
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000249 if (spi_res(flash, readarr, 2)) {
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000250 return 0;
Stefan Tauner355cbfd2011-05-28 02:37:14 +0000251 }
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000252
253 id1 = readarr[0];
254 id2 = readarr[1];
255
256 msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
257
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000258 if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id)
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000259 return 0;
260
Carl-Daniel Hailfingerdc1cda12010-05-28 17:07:57 +0000261 return 1;
262}
263
Stefan Tauner3f5e35d2013-04-19 01:58:33 +0000264int probe_spi_res3(struct flashctx *flash)
265{
266 unsigned char readarr[3];
267 uint32_t id1, id2;
268
269 if (spi_res(flash, readarr, 3)) {
270 return 0;
271 }
272
273 id1 = (readarr[0] << 8) | readarr[1];
274 id2 = readarr[2];
275
276 msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
277
278 if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id)
279 return 0;
280
281 return 1;
282}
283
Stefan Tauner57794ac2012-12-29 15:04:20 +0000284/* Only used for some Atmel chips. */
285int probe_spi_at25f(struct flashctx *flash)
286{
287 static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID };
288 unsigned char readarr[AT25F_RDID_INSIZE];
289 uint32_t id1;
290 uint32_t id2;
291
292 if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr))
293 return 0;
294
295 id1 = readarr[0];
296 id2 = readarr[1];
297
298 msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
299
300 if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id)
301 return 1;
302
303 return 0;
304}
305
Nico Huber0ecbacb2017-10-14 16:50:43 +0200306static int spi_poll_wip(struct flashctx *const flash, const unsigned int poll_delay)
307{
308 /* FIXME: We can't tell if spi_read_status_register() failed. */
309 /* FIXME: We don't time out. */
310 while (spi_read_status_register(flash) & SPI_SR_WIP)
311 programmer_delay(poll_delay);
312 /* FIXME: Check the status register for errors. */
313 return 0;
314}
315
Nico Hubera3140d02017-10-15 11:20:58 +0200316/**
317 * Execute WREN plus another one byte `op`, optionally poll WIP afterwards.
318 *
319 * @param flash the flash chip's context
320 * @param op the operation to execute
321 * @param poll_delay interval in us for polling WIP, don't poll if zero
322 * @return 0 on success, non-zero otherwise
323 */
324static int spi_simple_write_cmd(struct flashctx *const flash, const uint8_t op, const unsigned int poll_delay)
Sean Nelson14ba6682010-02-26 05:48:29 +0000325{
Sean Nelson14ba6682010-02-26 05:48:29 +0000326 struct spi_command cmds[] = {
327 {
Nico Hubera3140d02017-10-15 11:20:58 +0200328 .writecnt = 1,
329 .writearr = (const unsigned char[]){ JEDEC_WREN },
Sean Nelson14ba6682010-02-26 05:48:29 +0000330 }, {
Nico Hubera3140d02017-10-15 11:20:58 +0200331 .writecnt = 1,
332 .writearr = (const unsigned char[]){ op },
333 },
334 NULL_SPI_CMD,
335 };
336
337 const int result = spi_send_multicommand(flash, cmds);
338 if (result)
339 msg_cerr("%s failed during command execution\n", __func__);
340
Nico Huber0ecbacb2017-10-14 16:50:43 +0200341 const int status = poll_delay ? spi_poll_wip(flash, poll_delay) : 0;
Nico Hubera3140d02017-10-15 11:20:58 +0200342
Nico Huber0ecbacb2017-10-14 16:50:43 +0200343 return result ? result : status;
344}
345
Nico Huber7e3c81a2017-10-14 18:56:50 +0200346static int spi_write_extended_address_register(struct flashctx *const flash, const uint8_t regdata)
347{
348 struct spi_command cmds[] = {
349 {
350 .writecnt = 1,
351 .writearr = (const unsigned char[]){ JEDEC_WREN },
352 }, {
353 .writecnt = 2,
354 .writearr = (const unsigned char[]){ JEDEC_WRITE_EXT_ADDR_REG, regdata },
355 },
356 NULL_SPI_CMD,
357 };
358
359 const int result = spi_send_multicommand(flash, cmds);
360 if (result)
361 msg_cerr("%s failed during command execution\n", __func__);
362 return result;
363}
364
Nico Huberf43c6542017-10-14 17:47:28 +0200365static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high)
366{
367 if (flash->address_high_byte != addr_high &&
368 spi_write_extended_address_register(flash, addr_high))
369 return -1;
370 flash->address_high_byte = addr_high;
371 return 0;
372}
373
Nico Hubera1672f82017-10-14 18:00:20 +0200374static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[],
375 const bool native_4ba, const unsigned int addr)
Nico Huber0ecbacb2017-10-14 16:50:43 +0200376{
Nico Hubera1672f82017-10-14 18:00:20 +0200377 if (native_4ba || flash->in_4ba_mode) {
Nico Huber1cf407b2017-11-10 20:18:23 +0100378 if (!spi_master_4ba(flash)) {
379 msg_cwarn("4-byte address requested but master can't handle 4-byte addresses.\n");
380 return -1;
381 }
Nico Huberf43c6542017-10-14 17:47:28 +0200382 cmd_buf[1] = (addr >> 24) & 0xff;
383 cmd_buf[2] = (addr >> 16) & 0xff;
384 cmd_buf[3] = (addr >> 8) & 0xff;
385 cmd_buf[4] = (addr >> 0) & 0xff;
386 return 4;
387 } else {
388 if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR) {
389 if (spi_set_extended_address(flash, addr >> 24))
390 return -1;
Nico Huber1cf407b2017-11-10 20:18:23 +0100391 } else if (addr >> 24) {
392 msg_cerr("Can't handle 4-byte address for opcode '0x%02x'\n"
393 "with this chip/programmer combination.\n", cmd_buf[0]);
394 return -1;
Nico Huberf43c6542017-10-14 17:47:28 +0200395 }
396 cmd_buf[1] = (addr >> 16) & 0xff;
397 cmd_buf[2] = (addr >> 8) & 0xff;
398 cmd_buf[3] = (addr >> 0) & 0xff;
399 return 3;
400 }
Nico Huber0ecbacb2017-10-14 16:50:43 +0200401}
402
403/**
404 * Execute WREN plus another `op` that takes an address and
405 * optional data, poll WIP afterwards.
406 *
407 * @param flash the flash chip's context
408 * @param op the operation to execute
Nico Hubera1672f82017-10-14 18:00:20 +0200409 * @param native_4ba whether `op` always takes a 4-byte address
Nico Huber0ecbacb2017-10-14 16:50:43 +0200410 * @param addr the address parameter to `op`
411 * @param out_bytes bytes to send after the address,
412 * may be NULL if and only if `out_bytes` is 0
413 * @param out_bytes number of bytes to send, 256 at most, may be zero
414 * @param poll_delay interval in us for polling WIP
415 * @return 0 on success, non-zero otherwise
416 */
Nico Hubera1672f82017-10-14 18:00:20 +0200417static int spi_write_cmd(struct flashctx *const flash, const uint8_t op,
418 const bool native_4ba, const unsigned int addr,
Nico Huber0ecbacb2017-10-14 16:50:43 +0200419 const uint8_t *const out_bytes, const size_t out_len,
420 const unsigned int poll_delay)
421{
422 uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN + 256];
423 struct spi_command cmds[] = {
424 {
425 .writecnt = 1,
426 .writearr = (const unsigned char[]){ JEDEC_WREN },
427 }, {
428 .writearr = cmd,
429 },
430 NULL_SPI_CMD,
431 };
432
433 cmd[0] = op;
Nico Hubera1672f82017-10-14 18:00:20 +0200434 const int addr_len = spi_prepare_address(flash, cmd, native_4ba, addr);
Nico Huber0ecbacb2017-10-14 16:50:43 +0200435 if (addr_len < 0)
436 return 1;
437
438 if (1 + addr_len + out_len > sizeof(cmd)) {
439 msg_cerr("%s called for too long a write\n", __func__);
440 return 1;
441 }
442
443 memcpy(cmd + 1 + addr_len, out_bytes, out_len);
444 cmds[1].writecnt = 1 + addr_len + out_len;
445
446 const int result = spi_send_multicommand(flash, cmds);
447 if (result)
448 msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
449
450 const int status = spi_poll_wip(flash, poll_delay);
451
452 return result ? result : status;
Nico Hubera3140d02017-10-15 11:20:58 +0200453}
454
455int spi_chip_erase_60(struct flashctx *flash)
456{
457 /* This usually takes 1-85s, so wait in 1s steps. */
458 return spi_simple_write_cmd(flash, 0x60, 1000 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000459}
460
Stefan Tauner3c0fcd02012-09-21 12:46:56 +0000461int spi_chip_erase_62(struct flashctx *flash)
462{
Nico Hubera3140d02017-10-15 11:20:58 +0200463 /* This usually takes 2-5s, so wait in 100ms steps. */
464 return spi_simple_write_cmd(flash, 0x62, 100 * 1000);
Stefan Tauner3c0fcd02012-09-21 12:46:56 +0000465}
466
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000467int spi_chip_erase_c7(struct flashctx *flash)
Sean Nelson14ba6682010-02-26 05:48:29 +0000468{
Nico Hubera3140d02017-10-15 11:20:58 +0200469 /* This usually takes 1-85s, so wait in 1s steps. */
470 return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000471}
472
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000473int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
474 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000475{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200476 /* This usually takes 100-4000ms, so wait in 100ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200477 return spi_write_cmd(flash, 0x52, false, addr, NULL, 0, 100 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000478}
479
480/* Block size is usually
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000481 * 32M (one die) for Micron
482 */
483int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
484{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200485 /* This usually takes 240-480s, so wait in 500ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200486 return spi_write_cmd(flash, 0xc4, false, addr, NULL, 0, 500 * 1000);
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000487}
488
489/* Block size is usually
Sean Nelson14ba6682010-02-26 05:48:29 +0000490 * 64k for Macronix
491 * 32k for SST
492 * 4-32k non-uniform for EON
493 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000494int spi_block_erase_d8(struct flashctx *flash, unsigned int addr,
495 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000496{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200497 /* This usually takes 100-4000ms, so wait in 100ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200498 return spi_write_cmd(flash, 0xd8, false, addr, NULL, 0, 100 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000499}
500
501/* Block size is usually
502 * 4k for PMC
503 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000504int spi_block_erase_d7(struct flashctx *flash, unsigned int addr,
505 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000506{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200507 /* This usually takes 100-4000ms, so wait in 100ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200508 return spi_write_cmd(flash, 0xd7, false, addr, NULL, 0, 100 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000509}
510
Nikolay Nikolaev579f1e02013-06-28 21:28:37 +0000511/* Page erase (usually 256B blocks) */
512int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
513{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200514 /* This takes up to 20ms usually (on worn out devices
515 up to the 0.5s range), so wait in 1ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200516 return spi_write_cmd(flash, 0xdb, false, addr, NULL, 0, 1 * 1000);
Nikolay Nikolaev579f1e02013-06-28 21:28:37 +0000517}
518
Sean Nelson14ba6682010-02-26 05:48:29 +0000519/* Sector size is usually 4k, though Macronix eliteflash has 64k */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000520int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
521 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000522{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200523 /* This usually takes 15-800ms, so wait in 10ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200524 return spi_write_cmd(flash, 0x20, false, addr, NULL, 0, 10 * 1000);
Sean Nelson14ba6682010-02-26 05:48:29 +0000525}
526
Stefan Tauner94b39b42012-10-27 00:06:02 +0000527int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
528{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200529 /* This usually takes 10ms, so wait in 1ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200530 return spi_write_cmd(flash, 0x50, false, addr, NULL, 0, 1 * 1000);
Stefan Tauner94b39b42012-10-27 00:06:02 +0000531}
532
533int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
534{
Nico Huber0ecbacb2017-10-14 16:50:43 +0200535 /* This usually takes 8ms, so wait in 1ms steps. */
Nico Hubera1672f82017-10-14 18:00:20 +0200536 return spi_write_cmd(flash, 0x81, false, addr, NULL, 0, 1 * 1000);
Stefan Tauner94b39b42012-10-27 00:06:02 +0000537}
538
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000539int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
540 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000541{
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000542 if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000543 msg_cerr("%s called with incorrect arguments\n",
Sean Nelson14ba6682010-02-26 05:48:29 +0000544 __func__);
545 return -1;
546 }
547 return spi_chip_erase_60(flash);
548}
549
Stefan Tauner3c0fcd02012-09-21 12:46:56 +0000550int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
551{
552 if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
553 msg_cerr("%s called with incorrect arguments\n",
554 __func__);
555 return -1;
556 }
557 return spi_chip_erase_62(flash);
558}
559
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000560int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
561 unsigned int blocklen)
Sean Nelson14ba6682010-02-26 05:48:29 +0000562{
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000563 if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000564 msg_cerr("%s called with incorrect arguments\n",
Sean Nelson14ba6682010-02-26 05:48:29 +0000565 __func__);
566 return -1;
567 }
568 return spi_chip_erase_c7(flash);
569}
570
Nico Huber7e3c81a2017-10-14 18:56:50 +0200571/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */
572int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
573{
574 /* This usually takes 15-800ms, so wait in 10ms steps. */
575 return spi_write_cmd(flash, 0x21, true, addr, NULL, 0, 10 * 1000);
576}
577
578/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */
579int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
580{
581 /* This usually takes 100-4000ms, so wait in 100ms steps. */
582 return spi_write_cmd(flash, 0x5c, true, addr, NULL, 0, 100 * 1000);
583}
584
585/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */
586int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
587{
588 /* This usually takes 100-4000ms, so wait in 100ms steps. */
589 return spi_write_cmd(flash, 0xdc, true, addr, NULL, 0, 100 * 1000);
590}
591
Stefan Taunerac1b4c82012-02-17 14:51:04 +0000592erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
593{
594 switch(opcode){
595 case 0xff:
596 case 0x00:
597 /* Not specified, assuming "not supported". */
598 return NULL;
599 case 0x20:
600 return &spi_block_erase_20;
Nico Huber7e3c81a2017-10-14 18:56:50 +0200601 case 0x21:
602 return &spi_block_erase_21;
Stefan Tauner730e7e72013-05-01 14:04:19 +0000603 case 0x50:
604 return &spi_block_erase_50;
Stefan Taunerac1b4c82012-02-17 14:51:04 +0000605 case 0x52:
606 return &spi_block_erase_52;
Nico Huber7e3c81a2017-10-14 18:56:50 +0200607 case 0x5c:
608 return &spi_block_erase_5c;
Stefan Taunerac1b4c82012-02-17 14:51:04 +0000609 case 0x60:
610 return &spi_block_erase_60;
Stefan Tauner730e7e72013-05-01 14:04:19 +0000611 case 0x62:
612 return &spi_block_erase_62;
613 case 0x81:
614 return &spi_block_erase_81;
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000615 case 0xc4:
616 return &spi_block_erase_c4;
Stefan Taunerac1b4c82012-02-17 14:51:04 +0000617 case 0xc7:
618 return &spi_block_erase_c7;
619 case 0xd7:
620 return &spi_block_erase_d7;
621 case 0xd8:
622 return &spi_block_erase_d8;
Nikolay Nikolaev579f1e02013-06-28 21:28:37 +0000623 case 0xdb:
624 return &spi_block_erase_db;
Nico Huber7e3c81a2017-10-14 18:56:50 +0200625 case 0xdc:
626 return &spi_block_erase_dc;
Stefan Taunerac1b4c82012-02-17 14:51:04 +0000627 default:
628 msg_cinfo("%s: unknown erase opcode (0x%02x). Please report "
629 "this at flashrom@flashrom.org\n", __func__, opcode);
630 return NULL;
631 }
632}
633
Nico Huber0ecbacb2017-10-14 16:50:43 +0200634static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len)
Sean Nelson14ba6682010-02-26 05:48:29 +0000635{
Nico Huber1cf407b2017-11-10 20:18:23 +0100636 const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash);
Nico Hubera1672f82017-10-14 18:00:20 +0200637 const uint8_t op = native_4ba ? JEDEC_BYTE_PROGRAM_4BA : JEDEC_BYTE_PROGRAM;
638 return spi_write_cmd(flash, op, native_4ba, addr, bytes, len, 10);
Sean Nelson14ba6682010-02-26 05:48:29 +0000639}
640
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000641int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes,
642 unsigned int len)
Sean Nelson14ba6682010-02-26 05:48:29 +0000643{
Nico Huber1cf407b2017-11-10 20:18:23 +0100644 const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_READ && spi_master_4ba(flash);
Nico Hubera1672f82017-10-14 18:00:20 +0200645 uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { native_4ba ? JEDEC_READ_4BA : JEDEC_READ, };
Nico Huber0ecbacb2017-10-14 16:50:43 +0200646
Nico Hubera1672f82017-10-14 18:00:20 +0200647 const int addr_len = spi_prepare_address(flash, cmd, native_4ba, address);
Nico Huber0ecbacb2017-10-14 16:50:43 +0200648 if (addr_len < 0)
649 return 1;
Sean Nelson14ba6682010-02-26 05:48:29 +0000650
651 /* Send Read */
Nico Huber0ecbacb2017-10-14 16:50:43 +0200652 return spi_send_command(flash, 1 + addr_len, len, cmd, bytes);
Sean Nelson14ba6682010-02-26 05:48:29 +0000653}
654
655/*
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000656 * Read a part of the flash chip.
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000657 * FIXME: Use the chunk code from Michael Karcher instead.
Urja Rannikko731316a2017-06-15 13:32:01 +0300658 * Each naturally aligned area is read separately in chunks with a maximum size of chunksize.
Sean Nelson14ba6682010-02-26 05:48:29 +0000659 */
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000660int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
661 unsigned int len, unsigned int chunksize)
Sean Nelson14ba6682010-02-26 05:48:29 +0000662{
663 int rc = 0;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000664 unsigned int i, j, starthere, lenhere, toread;
Urja Rannikko731316a2017-06-15 13:32:01 +0300665 /* Limit for multi-die 4-byte-addressing chips. */
666 unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024);
Sean Nelson14ba6682010-02-26 05:48:29 +0000667
668 /* Warning: This loop has a very unusual condition and body.
Urja Rannikko731316a2017-06-15 13:32:01 +0300669 * The loop needs to go through each area with at least one affected
670 * byte. The lowest area number is (start / area_size) since that
671 * division rounds down. The highest area number we want is the area
Sean Nelson14ba6682010-02-26 05:48:29 +0000672 * where the last byte of the range lives. That last byte has the
Urja Rannikko731316a2017-06-15 13:32:01 +0300673 * address (start + len - 1), thus the highest area number is
674 * (start + len - 1) / area_size. Since we want to include that last
675 * area as well, the loop condition uses <=.
Sean Nelson14ba6682010-02-26 05:48:29 +0000676 */
Urja Rannikko731316a2017-06-15 13:32:01 +0300677 for (i = start / area_size; i <= (start + len - 1) / area_size; i++) {
678 /* Byte position of the first byte in the range in this area. */
Sean Nelson14ba6682010-02-26 05:48:29 +0000679 /* starthere is an offset to the base address of the chip. */
Urja Rannikko731316a2017-06-15 13:32:01 +0300680 starthere = max(start, i * area_size);
681 /* Length of bytes in the range in this area. */
682 lenhere = min(start + len, (i + 1) * area_size) - starthere;
Sean Nelson14ba6682010-02-26 05:48:29 +0000683 for (j = 0; j < lenhere; j += chunksize) {
684 toread = min(chunksize, lenhere - j);
Nico Huber7a077222017-10-14 18:18:30 +0200685 rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread);
Sean Nelson14ba6682010-02-26 05:48:29 +0000686 if (rc)
687 break;
688 }
689 if (rc)
690 break;
691 }
692
693 return rc;
694}
695
696/*
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000697 * Write a part of the flash chip.
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000698 * FIXME: Use the chunk code from Michael Karcher instead.
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000699 * Each page is written separately in chunks with a maximum size of chunksize.
700 */
Mark Marshallf20b7be2014-05-09 21:16:21 +0000701int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start,
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000702 unsigned int len, unsigned int chunksize)
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000703{
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000704 unsigned int i, j, starthere, lenhere, towrite;
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000705 /* FIXME: page_size is the wrong variable. We need max_writechunk_size
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000706 * in struct flashctx to do this properly. All chips using
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000707 * spi_chip_write_256 have page_size set to max_writechunk_size, so
708 * we're OK for now.
709 */
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +0000710 unsigned int page_size = flash->chip->page_size;
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000711
712 /* Warning: This loop has a very unusual condition and body.
713 * The loop needs to go through each page with at least one affected
714 * byte. The lowest page number is (start / page_size) since that
715 * division rounds down. The highest page number we want is the page
716 * where the last byte of the range lives. That last byte has the
717 * address (start + len - 1), thus the highest page number is
718 * (start + len - 1) / page_size. Since we want to include that last
719 * page as well, the loop condition uses <=.
720 */
721 for (i = start / page_size; i <= (start + len - 1) / page_size; i++) {
722 /* Byte position of the first byte in the range in this page. */
723 /* starthere is an offset to the base address of the chip. */
724 starthere = max(start, i * page_size);
725 /* Length of bytes in the range in this page. */
726 lenhere = min(start + len, (i + 1) * page_size) - starthere;
727 for (j = 0; j < lenhere; j += chunksize) {
Nico Huber7a077222017-10-14 18:18:30 +0200728 int rc;
729
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000730 towrite = min(chunksize, lenhere - j);
Nico Huber7a077222017-10-14 18:18:30 +0200731 rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite);
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000732 if (rc)
Nico Huber7a077222017-10-14 18:18:30 +0200733 return rc;
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000734 }
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000735 }
736
Nico Huber7a077222017-10-14 18:18:30 +0200737 return 0;
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +0000738}
739
740/*
Sean Nelson14ba6682010-02-26 05:48:29 +0000741 * Program chip using byte programming. (SLOW!)
742 * This is for chips which can only handle one byte writes
743 * and for chips where memory mapped programming is impossible
744 * (e.g. due to size constraints in IT87* for over 512 kB)
745 */
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000746/* real chunksize is 1, logical chunksize is 1 */
Mark Marshallf20b7be2014-05-09 21:16:21 +0000747int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
Sean Nelson14ba6682010-02-26 05:48:29 +0000748{
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000749 unsigned int i;
Sean Nelson14ba6682010-02-26 05:48:29 +0000750
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000751 for (i = start; i < start + len; i++) {
Nico Huber7a077222017-10-14 18:18:30 +0200752 if (spi_nbyte_program(flash, i, buf + i - start, 1))
Sean Nelson14ba6682010-02-26 05:48:29 +0000753 return 1;
Sean Nelson14ba6682010-02-26 05:48:29 +0000754 }
Sean Nelson14ba6682010-02-26 05:48:29 +0000755 return 0;
756}
757
Mark Marshallf20b7be2014-05-09 21:16:21 +0000758int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000759{
760 uint32_t pos = start;
Sean Nelson14ba6682010-02-26 05:48:29 +0000761 int result;
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000762 unsigned char cmd[JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE] = {
763 JEDEC_AAI_WORD_PROGRAM,
764 };
Sean Nelson14ba6682010-02-26 05:48:29 +0000765
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000766 switch (flash->mst->spi.type) {
Carl-Daniel Hailfinger71127722010-05-31 15:27:27 +0000767#if CONFIG_INTERNAL == 1
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000768#if defined(__i386__) || defined(__x86_64__)
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000769 case SPI_CONTROLLER_IT87XX:
Sean Nelson14ba6682010-02-26 05:48:29 +0000770 case SPI_CONTROLLER_WBSIO:
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000771 msg_perr("%s: impossible with this SPI controller,"
Sean Nelson14ba6682010-02-26 05:48:29 +0000772 " degrading to byte program\n", __func__);
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000773 return spi_chip_write_1(flash, buf, start, len);
Sean Nelson14ba6682010-02-26 05:48:29 +0000774#endif
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000775#endif
Sean Nelson14ba6682010-02-26 05:48:29 +0000776 default:
777 break;
778 }
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000779
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000780 /* The even start address and even length requirements can be either
781 * honored outside this function, or we can call spi_byte_program
782 * for the first and/or last byte and use AAI for the rest.
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000783 * FIXME: Move this to generic code.
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000784 */
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000785 /* The data sheet requires a start address with the low bit cleared. */
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000786 if (start % 2) {
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000787 msg_cerr("%s: start address not even! Please report a bug at "
788 "flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000789 if (spi_chip_write_1(flash, buf, start, start % 2))
790 return SPI_GENERIC_ERROR;
791 pos += start % 2;
792 /* Do not return an error for now. */
793 //return SPI_GENERIC_ERROR;
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000794 }
795 /* The data sheet requires total AAI write length to be even. */
796 if (len % 2) {
797 msg_cerr("%s: total write length not even! Please report a "
798 "bug at flashrom@flashrom.org\n", __func__);
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000799 /* Do not return an error for now. */
800 //return SPI_GENERIC_ERROR;
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000801 }
802
Nico Hubera1672f82017-10-14 18:00:20 +0200803 result = spi_write_cmd(flash, JEDEC_AAI_WORD_PROGRAM, false, start, buf + pos - start, 2, 10);
Nico Huber0ecbacb2017-10-14 16:50:43 +0200804 if (result)
Stefan Reinauer87ace662014-04-26 16:12:55 +0000805 goto bailout;
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000806
807 /* We already wrote 2 bytes in the multicommand step. */
808 pos += 2;
809
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000810 /* Are there at least two more bytes to write? */
811 while (pos < start + len - 1) {
Carl-Daniel Hailfingerccfe0ac2010-10-27 22:07:11 +0000812 cmd[1] = buf[pos++ - start];
813 cmd[2] = buf[pos++ - start];
Stefan Reinauer87ace662014-04-26 16:12:55 +0000814 result = spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL);
815 if (result != 0) {
816 msg_cerr("%s failed during followup AAI command execution: %d\n", __func__, result);
817 goto bailout;
818 }
Nico Huber0ecbacb2017-10-14 16:50:43 +0200819 if (spi_poll_wip(flash, 10))
820 goto bailout;
Carl-Daniel Hailfinger9c62d112010-06-20 10:41:35 +0000821 }
822
Stefan Tauner59c4d792014-04-26 16:13:09 +0000823 /* Use WRDI to exit AAI mode. This needs to be done before issuing any other non-AAI command. */
824 result = spi_write_disable(flash);
825 if (result != 0) {
826 msg_cerr("%s failed to disable AAI mode.\n", __func__);
827 return SPI_GENERIC_ERROR;
828 }
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000829
830 /* Write remaining byte (if any). */
831 if (pos < start + len) {
Carl-Daniel Hailfingerccfe0ac2010-10-27 22:07:11 +0000832 if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2))
Carl-Daniel Hailfinger75a58f92010-10-13 22:26:56 +0000833 return SPI_GENERIC_ERROR;
834 pos += pos % 2;
835 }
836
Sean Nelson14ba6682010-02-26 05:48:29 +0000837 return 0;
Stefan Reinauer87ace662014-04-26 16:12:55 +0000838
839bailout:
Stefan Tauner59c4d792014-04-26 16:13:09 +0000840 result = spi_write_disable(flash);
841 if (result != 0)
842 msg_cerr("%s failed to disable AAI mode.\n", __func__);
Stefan Reinauer87ace662014-04-26 16:12:55 +0000843 return SPI_GENERIC_ERROR;
Sean Nelson14ba6682010-02-26 05:48:29 +0000844}
Nico Huber7e3c81a2017-10-14 18:56:50 +0200845
Nico Huberfe34d2a2017-11-10 21:10:20 +0100846static int spi_enter_exit_4ba(struct flashctx *const flash, const bool enter)
Nico Huber7e3c81a2017-10-14 18:56:50 +0200847{
Nico Huberfe34d2a2017-11-10 21:10:20 +0100848 const unsigned char cmd = enter ? JEDEC_ENTER_4_BYTE_ADDR_MODE : JEDEC_EXIT_4_BYTE_ADDR_MODE;
849 int ret = 1;
Nico Huber7e3c81a2017-10-14 18:56:50 +0200850
Nico Huberfe34d2a2017-11-10 21:10:20 +0100851 if (flash->chip->feature_bits & FEATURE_4BA_ENTER)
852 ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL);
853 else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_WREN)
854 ret = spi_simple_write_cmd(flash, cmd, 0);
855
Nico Huber7e3c81a2017-10-14 18:56:50 +0200856 if (!ret)
Nico Huberfe34d2a2017-11-10 21:10:20 +0100857 flash->in_4ba_mode = enter;
Nico Huber7e3c81a2017-10-14 18:56:50 +0200858 return ret;
859}
860
Nico Huberfe34d2a2017-11-10 21:10:20 +0100861int spi_enter_4ba(struct flashctx *const flash)
Nico Huber7e3c81a2017-10-14 18:56:50 +0200862{
Nico Huberfe34d2a2017-11-10 21:10:20 +0100863 return spi_enter_exit_4ba(flash, true);
Nico Huber7e3c81a2017-10-14 18:56:50 +0200864}
865
Nico Huberfe34d2a2017-11-10 21:10:20 +0100866int spi_exit_4ba(struct flashctx *flash)
Nico Huber7e3c81a2017-10-14 18:56:50 +0200867{
Nico Huberfe34d2a2017-11-10 21:10:20 +0100868 return spi_enter_exit_4ba(flash, false);
Nico Huber7e3c81a2017-10-14 18:56:50 +0200869}