Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 5 | * Copyright (C) 2008 coresystems GmbH |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * Contains the common SPI chip driver functions |
| 23 | */ |
| 24 | |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 25 | #include <stddef.h> |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 26 | #include <string.h> |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 27 | #include <stdbool.h> |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 28 | #include "flash.h" |
| 29 | #include "flashchips.h" |
| 30 | #include "chipdrivers.h" |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 31 | #include "programmer.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 32 | #include "spi.h" |
| 33 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 34 | static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 35 | { |
Mathias Krause | a60faab | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 36 | static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 37 | int ret; |
| 38 | int i; |
| 39 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 40 | ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 41 | if (ret) |
| 42 | return ret; |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 43 | msg_cspew("RDID returned"); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 44 | for (i = 0; i < bytes; i++) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 45 | msg_cspew(" 0x%02x", readarr[i]); |
| 46 | msg_cspew(". "); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 47 | return 0; |
| 48 | } |
| 49 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 50 | static int spi_rems(struct flashctx *flash, unsigned char *readarr) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 51 | { |
| 52 | unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 }; |
| 53 | uint32_t readaddr; |
| 54 | int ret; |
| 55 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 56 | ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd, |
| 57 | readarr); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 58 | if (ret == SPI_INVALID_ADDRESS) { |
| 59 | /* Find the lowest even address allowed for reads. */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 60 | readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 61 | cmd[1] = (readaddr >> 16) & 0xff, |
| 62 | cmd[2] = (readaddr >> 8) & 0xff, |
| 63 | cmd[3] = (readaddr >> 0) & 0xff, |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 64 | ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, |
| 65 | cmd, readarr); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 66 | } |
| 67 | if (ret) |
| 68 | return ret; |
Cristian Măgherușan-Stanciu | 9932c7b | 2011-07-07 19:56:58 +0000 | [diff] [blame] | 69 | msg_cspew("REMS returned 0x%02x 0x%02x. ", readarr[0], readarr[1]); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 70 | return 0; |
| 71 | } |
| 72 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 73 | static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 74 | { |
| 75 | unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; |
| 76 | uint32_t readaddr; |
| 77 | int ret; |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 78 | int i; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 79 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 80 | ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 81 | if (ret == SPI_INVALID_ADDRESS) { |
| 82 | /* Find the lowest even address allowed for reads. */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 83 | readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 84 | cmd[1] = (readaddr >> 16) & 0xff, |
| 85 | cmd[2] = (readaddr >> 8) & 0xff, |
| 86 | cmd[3] = (readaddr >> 0) & 0xff, |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 87 | ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 88 | } |
| 89 | if (ret) |
| 90 | return ret; |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 91 | msg_cspew("RES returned"); |
| 92 | for (i = 0; i < bytes; i++) |
| 93 | msg_cspew(" 0x%02x", readarr[i]); |
| 94 | msg_cspew(". "); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 95 | return 0; |
| 96 | } |
| 97 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 98 | int spi_write_enable(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 99 | { |
Mathias Krause | a60faab | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 100 | static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN }; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 101 | int result; |
| 102 | |
| 103 | /* Send WREN (Write Enable) */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 104 | result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 105 | |
| 106 | if (result) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 107 | msg_cerr("%s failed\n", __func__); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 108 | |
| 109 | return result; |
| 110 | } |
| 111 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 112 | int spi_write_disable(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 113 | { |
Mathias Krause | a60faab | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 114 | static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI }; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 115 | |
| 116 | /* Send WRDI (Write Disable) */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 117 | return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 118 | } |
| 119 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 120 | static int probe_spi_rdid_generic(struct flashctx *flash, int bytes) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 121 | { |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 122 | const struct flashchip *chip = flash->chip; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 123 | unsigned char readarr[4]; |
| 124 | uint32_t id1; |
| 125 | uint32_t id2; |
| 126 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 127 | if (spi_rdid(flash, readarr, bytes)) { |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 128 | return 0; |
Stefan Tauner | 355cbfd | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 129 | } |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 130 | |
| 131 | if (!oddparity(readarr[0])) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 132 | msg_cdbg("RDID byte 0 parity violation. "); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 133 | |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 134 | /* Check if this is a continuation vendor ID. |
| 135 | * FIXME: Handle continuation device IDs. |
| 136 | */ |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 137 | if (readarr[0] == 0x7f) { |
| 138 | if (!oddparity(readarr[1])) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 139 | msg_cdbg("RDID byte 1 parity violation. "); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 140 | id1 = (readarr[0] << 8) | readarr[1]; |
| 141 | id2 = readarr[2]; |
| 142 | if (bytes > 3) { |
| 143 | id2 <<= 8; |
| 144 | id2 |= readarr[3]; |
| 145 | } |
| 146 | } else { |
| 147 | id1 = readarr[0]; |
| 148 | id2 = (readarr[1] << 8) | readarr[2]; |
| 149 | } |
| 150 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 151 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 152 | |
Stefan Tauner | 6ee37e2 | 2012-12-29 15:03:51 +0000 | [diff] [blame] | 153 | if (id1 == chip->manufacture_id && id2 == chip->model_id) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 154 | return 1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 155 | |
| 156 | /* Test if this is a pure vendor match. */ |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 157 | if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 158 | return 1; |
| 159 | |
| 160 | /* Test if there is any vendor ID. */ |
Urja Rannikko | 0a5f6e4 | 2015-06-22 23:59:15 +0000 | [diff] [blame] | 161 | if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != 0x00) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 162 | return 1; |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 167 | int probe_spi_rdid(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 168 | { |
| 169 | return probe_spi_rdid_generic(flash, 3); |
| 170 | } |
| 171 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 172 | int probe_spi_rdid4(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 173 | { |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 174 | /* Some SPI controllers do not support commands with writecnt=1 and |
| 175 | * readcnt=4. |
| 176 | */ |
Carl-Daniel Hailfinger | a5bcbce | 2014-07-19 22:03:29 +0000 | [diff] [blame] | 177 | switch (flash->mst->spi.type) { |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 178 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 179 | #if defined(__i386__) || defined(__x86_64__) |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 180 | case SPI_CONTROLLER_IT87XX: |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 181 | case SPI_CONTROLLER_WBSIO: |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 182 | msg_cinfo("4 byte RDID not supported on this SPI controller\n"); |
| 183 | return 0; |
| 184 | break; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 185 | #endif |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 186 | #endif |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 187 | default: |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 188 | return probe_spi_rdid_generic(flash, 4); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 189 | } |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 194 | int probe_spi_rems(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 195 | { |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 196 | const struct flashchip *chip = flash->chip; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 197 | unsigned char readarr[JEDEC_REMS_INSIZE]; |
| 198 | uint32_t id1, id2; |
| 199 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 200 | if (spi_rems(flash, readarr)) { |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 201 | return 0; |
Stefan Tauner | 355cbfd | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 202 | } |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 203 | |
| 204 | id1 = readarr[0]; |
| 205 | id2 = readarr[1]; |
| 206 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 207 | msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 208 | |
Stefan Tauner | 6ee37e2 | 2012-12-29 15:03:51 +0000 | [diff] [blame] | 209 | if (id1 == chip->manufacture_id && id2 == chip->model_id) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 210 | return 1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 211 | |
| 212 | /* Test if this is a pure vendor match. */ |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 213 | if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 214 | return 1; |
| 215 | |
| 216 | /* Test if there is any vendor ID. */ |
Urja Rannikko | 0a5f6e4 | 2015-06-22 23:59:15 +0000 | [diff] [blame] | 217 | if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != 0x00) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 218 | return 1; |
| 219 | |
| 220 | return 0; |
| 221 | } |
| 222 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 223 | int probe_spi_res1(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 224 | { |
Mathias Krause | a60faab | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 225 | static const unsigned char allff[] = {0xff, 0xff, 0xff}; |
| 226 | static const unsigned char all00[] = {0x00, 0x00, 0x00}; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 227 | unsigned char readarr[3]; |
| 228 | uint32_t id2; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 229 | |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 230 | /* We only want one-byte RES if RDID and REMS are unusable. */ |
| 231 | |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 232 | /* Check if RDID is usable and does not return 0xff 0xff 0xff or |
| 233 | * 0x00 0x00 0x00. In that case, RES is pointless. |
| 234 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 235 | if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) && |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 236 | memcmp(readarr, all00, 3)) { |
| 237 | msg_cdbg("Ignoring RES in favour of RDID.\n"); |
| 238 | return 0; |
| 239 | } |
| 240 | /* Check if REMS is usable and does not return 0xff 0xff or |
| 241 | * 0x00 0x00. In that case, RES is pointless. |
| 242 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 243 | if (!spi_rems(flash, readarr) && |
| 244 | memcmp(readarr, allff, JEDEC_REMS_INSIZE) && |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 245 | memcmp(readarr, all00, JEDEC_REMS_INSIZE)) { |
| 246 | msg_cdbg("Ignoring RES in favour of REMS.\n"); |
| 247 | return 0; |
| 248 | } |
| 249 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 250 | if (spi_res(flash, readarr, 1)) { |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 251 | return 0; |
Stefan Tauner | 355cbfd | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 252 | } |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 253 | |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 254 | id2 = readarr[0]; |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 255 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 256 | msg_cdbg("%s: id 0x%x\n", __func__, id2); |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 257 | |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 258 | if (id2 != flash->chip->model_id) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 259 | return 0; |
| 260 | |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 261 | return 1; |
| 262 | } |
| 263 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 264 | int probe_spi_res2(struct flashctx *flash) |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 265 | { |
| 266 | unsigned char readarr[2]; |
| 267 | uint32_t id1, id2; |
| 268 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 269 | if (spi_res(flash, readarr, 2)) { |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 270 | return 0; |
Stefan Tauner | 355cbfd | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 271 | } |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 272 | |
| 273 | id1 = readarr[0]; |
| 274 | id2 = readarr[1]; |
| 275 | |
| 276 | msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); |
| 277 | |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 278 | if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 279 | return 0; |
| 280 | |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 281 | return 1; |
| 282 | } |
| 283 | |
Stefan Tauner | 3f5e35d | 2013-04-19 01:58:33 +0000 | [diff] [blame] | 284 | int probe_spi_res3(struct flashctx *flash) |
| 285 | { |
| 286 | unsigned char readarr[3]; |
| 287 | uint32_t id1, id2; |
| 288 | |
| 289 | if (spi_res(flash, readarr, 3)) { |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | id1 = (readarr[0] << 8) | readarr[1]; |
| 294 | id2 = readarr[2]; |
| 295 | |
| 296 | msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); |
| 297 | |
| 298 | if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) |
| 299 | return 0; |
| 300 | |
| 301 | return 1; |
| 302 | } |
| 303 | |
Stefan Tauner | 57794ac | 2012-12-29 15:04:20 +0000 | [diff] [blame] | 304 | /* Only used for some Atmel chips. */ |
| 305 | int probe_spi_at25f(struct flashctx *flash) |
| 306 | { |
| 307 | static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID }; |
| 308 | unsigned char readarr[AT25F_RDID_INSIZE]; |
| 309 | uint32_t id1; |
| 310 | uint32_t id2; |
| 311 | |
| 312 | if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr)) |
| 313 | return 0; |
| 314 | |
| 315 | id1 = readarr[0]; |
| 316 | id2 = readarr[1]; |
| 317 | |
| 318 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
| 319 | |
| 320 | if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) |
| 321 | return 1; |
| 322 | |
| 323 | return 0; |
| 324 | } |
| 325 | |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 326 | static int spi_poll_wip(struct flashctx *const flash, const unsigned int poll_delay) |
| 327 | { |
| 328 | /* FIXME: We can't tell if spi_read_status_register() failed. */ |
| 329 | /* FIXME: We don't time out. */ |
| 330 | while (spi_read_status_register(flash) & SPI_SR_WIP) |
| 331 | programmer_delay(poll_delay); |
| 332 | /* FIXME: Check the status register for errors. */ |
| 333 | return 0; |
| 334 | } |
| 335 | |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 336 | /** |
| 337 | * Execute WREN plus another one byte `op`, optionally poll WIP afterwards. |
| 338 | * |
| 339 | * @param flash the flash chip's context |
| 340 | * @param op the operation to execute |
| 341 | * @param poll_delay interval in us for polling WIP, don't poll if zero |
| 342 | * @return 0 on success, non-zero otherwise |
| 343 | */ |
| 344 | static int spi_simple_write_cmd(struct flashctx *const flash, const uint8_t op, const unsigned int poll_delay) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 345 | { |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 346 | struct spi_command cmds[] = { |
| 347 | { |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 348 | .writecnt = 1, |
| 349 | .writearr = (const unsigned char[]){ JEDEC_WREN }, |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 350 | }, { |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 351 | .writecnt = 1, |
| 352 | .writearr = (const unsigned char[]){ op }, |
| 353 | }, |
| 354 | NULL_SPI_CMD, |
| 355 | }; |
| 356 | |
| 357 | const int result = spi_send_multicommand(flash, cmds); |
| 358 | if (result) |
| 359 | msg_cerr("%s failed during command execution\n", __func__); |
| 360 | |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 361 | const int status = poll_delay ? spi_poll_wip(flash, poll_delay) : 0; |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 362 | |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 363 | return result ? result : status; |
| 364 | } |
| 365 | |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 366 | static int spi_write_extended_address_register(struct flashctx *const flash, const uint8_t regdata) |
| 367 | { |
| 368 | struct spi_command cmds[] = { |
| 369 | { |
| 370 | .writecnt = 1, |
| 371 | .writearr = (const unsigned char[]){ JEDEC_WREN }, |
| 372 | }, { |
| 373 | .writecnt = 2, |
| 374 | .writearr = (const unsigned char[]){ JEDEC_WRITE_EXT_ADDR_REG, regdata }, |
| 375 | }, |
| 376 | NULL_SPI_CMD, |
| 377 | }; |
| 378 | |
| 379 | const int result = spi_send_multicommand(flash, cmds); |
| 380 | if (result) |
| 381 | msg_cerr("%s failed during command execution\n", __func__); |
| 382 | return result; |
| 383 | } |
| 384 | |
Nico Huber | f43c654 | 2017-10-14 17:47:28 +0200 | [diff] [blame] | 385 | static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high) |
| 386 | { |
| 387 | if (flash->address_high_byte != addr_high && |
| 388 | spi_write_extended_address_register(flash, addr_high)) |
| 389 | return -1; |
| 390 | flash->address_high_byte = addr_high; |
| 391 | return 0; |
| 392 | } |
| 393 | |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 394 | static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[], |
| 395 | const bool native_4ba, const unsigned int addr) |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 396 | { |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 397 | if (native_4ba || flash->in_4ba_mode) { |
Nico Huber | f43c654 | 2017-10-14 17:47:28 +0200 | [diff] [blame] | 398 | cmd_buf[1] = (addr >> 24) & 0xff; |
| 399 | cmd_buf[2] = (addr >> 16) & 0xff; |
| 400 | cmd_buf[3] = (addr >> 8) & 0xff; |
| 401 | cmd_buf[4] = (addr >> 0) & 0xff; |
| 402 | return 4; |
| 403 | } else { |
| 404 | if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR) { |
| 405 | if (spi_set_extended_address(flash, addr >> 24)) |
| 406 | return -1; |
| 407 | } else { |
| 408 | if (addr >> 24) |
| 409 | return -1; |
| 410 | } |
| 411 | cmd_buf[1] = (addr >> 16) & 0xff; |
| 412 | cmd_buf[2] = (addr >> 8) & 0xff; |
| 413 | cmd_buf[3] = (addr >> 0) & 0xff; |
| 414 | return 3; |
| 415 | } |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 416 | } |
| 417 | |
| 418 | /** |
| 419 | * Execute WREN plus another `op` that takes an address and |
| 420 | * optional data, poll WIP afterwards. |
| 421 | * |
| 422 | * @param flash the flash chip's context |
| 423 | * @param op the operation to execute |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 424 | * @param native_4ba whether `op` always takes a 4-byte address |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 425 | * @param addr the address parameter to `op` |
| 426 | * @param out_bytes bytes to send after the address, |
| 427 | * may be NULL if and only if `out_bytes` is 0 |
| 428 | * @param out_bytes number of bytes to send, 256 at most, may be zero |
| 429 | * @param poll_delay interval in us for polling WIP |
| 430 | * @return 0 on success, non-zero otherwise |
| 431 | */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 432 | static int spi_write_cmd(struct flashctx *const flash, const uint8_t op, |
| 433 | const bool native_4ba, const unsigned int addr, |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 434 | const uint8_t *const out_bytes, const size_t out_len, |
| 435 | const unsigned int poll_delay) |
| 436 | { |
| 437 | uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN + 256]; |
| 438 | struct spi_command cmds[] = { |
| 439 | { |
| 440 | .writecnt = 1, |
| 441 | .writearr = (const unsigned char[]){ JEDEC_WREN }, |
| 442 | }, { |
| 443 | .writearr = cmd, |
| 444 | }, |
| 445 | NULL_SPI_CMD, |
| 446 | }; |
| 447 | |
| 448 | cmd[0] = op; |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 449 | const int addr_len = spi_prepare_address(flash, cmd, native_4ba, addr); |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 450 | if (addr_len < 0) |
| 451 | return 1; |
| 452 | |
| 453 | if (1 + addr_len + out_len > sizeof(cmd)) { |
| 454 | msg_cerr("%s called for too long a write\n", __func__); |
| 455 | return 1; |
| 456 | } |
| 457 | |
| 458 | memcpy(cmd + 1 + addr_len, out_bytes, out_len); |
| 459 | cmds[1].writecnt = 1 + addr_len + out_len; |
| 460 | |
| 461 | const int result = spi_send_multicommand(flash, cmds); |
| 462 | if (result) |
| 463 | msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); |
| 464 | |
| 465 | const int status = spi_poll_wip(flash, poll_delay); |
| 466 | |
| 467 | return result ? result : status; |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | int spi_chip_erase_60(struct flashctx *flash) |
| 471 | { |
| 472 | /* This usually takes 1-85s, so wait in 1s steps. */ |
| 473 | return spi_simple_write_cmd(flash, 0x60, 1000 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 474 | } |
| 475 | |
Stefan Tauner | 3c0fcd0 | 2012-09-21 12:46:56 +0000 | [diff] [blame] | 476 | int spi_chip_erase_62(struct flashctx *flash) |
| 477 | { |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 478 | /* This usually takes 2-5s, so wait in 100ms steps. */ |
| 479 | return spi_simple_write_cmd(flash, 0x62, 100 * 1000); |
Stefan Tauner | 3c0fcd0 | 2012-09-21 12:46:56 +0000 | [diff] [blame] | 480 | } |
| 481 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 482 | int spi_chip_erase_c7(struct flashctx *flash) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 483 | { |
Nico Huber | a3140d0 | 2017-10-15 11:20:58 +0200 | [diff] [blame] | 484 | /* This usually takes 1-85s, so wait in 1s steps. */ |
| 485 | return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 486 | } |
| 487 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 488 | int spi_block_erase_52(struct flashctx *flash, unsigned int addr, |
| 489 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 490 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 491 | /* This usually takes 100-4000ms, so wait in 100ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 492 | return spi_write_cmd(flash, 0x52, false, addr, NULL, 0, 100 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | /* Block size is usually |
Nikolay Nikolaev | 6f59b0b | 2013-06-28 21:29:51 +0000 | [diff] [blame] | 496 | * 32M (one die) for Micron |
| 497 | */ |
| 498 | int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 499 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 500 | /* This usually takes 240-480s, so wait in 500ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 501 | return spi_write_cmd(flash, 0xc4, false, addr, NULL, 0, 500 * 1000); |
Nikolay Nikolaev | 6f59b0b | 2013-06-28 21:29:51 +0000 | [diff] [blame] | 502 | } |
| 503 | |
| 504 | /* Block size is usually |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 505 | * 64k for Macronix |
| 506 | * 32k for SST |
| 507 | * 4-32k non-uniform for EON |
| 508 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 509 | int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, |
| 510 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 511 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 512 | /* This usually takes 100-4000ms, so wait in 100ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 513 | return spi_write_cmd(flash, 0xd8, false, addr, NULL, 0, 100 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 514 | } |
| 515 | |
| 516 | /* Block size is usually |
| 517 | * 4k for PMC |
| 518 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 519 | int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, |
| 520 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 521 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 522 | /* This usually takes 100-4000ms, so wait in 100ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 523 | return spi_write_cmd(flash, 0xd7, false, addr, NULL, 0, 100 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 524 | } |
| 525 | |
Nikolay Nikolaev | 579f1e0 | 2013-06-28 21:28:37 +0000 | [diff] [blame] | 526 | /* Page erase (usually 256B blocks) */ |
| 527 | int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 528 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 529 | /* This takes up to 20ms usually (on worn out devices |
| 530 | up to the 0.5s range), so wait in 1ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 531 | return spi_write_cmd(flash, 0xdb, false, addr, NULL, 0, 1 * 1000); |
Nikolay Nikolaev | 579f1e0 | 2013-06-28 21:28:37 +0000 | [diff] [blame] | 532 | } |
| 533 | |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 534 | /* Sector size is usually 4k, though Macronix eliteflash has 64k */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 535 | int spi_block_erase_20(struct flashctx *flash, unsigned int addr, |
| 536 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 537 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 538 | /* This usually takes 15-800ms, so wait in 10ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 539 | return spi_write_cmd(flash, 0x20, false, addr, NULL, 0, 10 * 1000); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 540 | } |
| 541 | |
Stefan Tauner | 94b39b4 | 2012-10-27 00:06:02 +0000 | [diff] [blame] | 542 | int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 543 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 544 | /* This usually takes 10ms, so wait in 1ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 545 | return spi_write_cmd(flash, 0x50, false, addr, NULL, 0, 1 * 1000); |
Stefan Tauner | 94b39b4 | 2012-10-27 00:06:02 +0000 | [diff] [blame] | 546 | } |
| 547 | |
| 548 | int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 549 | { |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 550 | /* This usually takes 8ms, so wait in 1ms steps. */ |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 551 | return spi_write_cmd(flash, 0x81, false, addr, NULL, 0, 1 * 1000); |
Stefan Tauner | 94b39b4 | 2012-10-27 00:06:02 +0000 | [diff] [blame] | 552 | } |
| 553 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 554 | int spi_block_erase_60(struct flashctx *flash, unsigned int addr, |
| 555 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 556 | { |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 557 | if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 558 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 559 | __func__); |
| 560 | return -1; |
| 561 | } |
| 562 | return spi_chip_erase_60(flash); |
| 563 | } |
| 564 | |
Stefan Tauner | 3c0fcd0 | 2012-09-21 12:46:56 +0000 | [diff] [blame] | 565 | int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 566 | { |
| 567 | if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { |
| 568 | msg_cerr("%s called with incorrect arguments\n", |
| 569 | __func__); |
| 570 | return -1; |
| 571 | } |
| 572 | return spi_chip_erase_62(flash); |
| 573 | } |
| 574 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 575 | int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, |
| 576 | unsigned int blocklen) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 577 | { |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 578 | if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 579 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 580 | __func__); |
| 581 | return -1; |
| 582 | } |
| 583 | return spi_chip_erase_c7(flash); |
| 584 | } |
| 585 | |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 586 | /* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */ |
| 587 | int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 588 | { |
| 589 | /* This usually takes 15-800ms, so wait in 10ms steps. */ |
| 590 | return spi_write_cmd(flash, 0x21, true, addr, NULL, 0, 10 * 1000); |
| 591 | } |
| 592 | |
| 593 | /* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */ |
| 594 | int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 595 | { |
| 596 | /* This usually takes 100-4000ms, so wait in 100ms steps. */ |
| 597 | return spi_write_cmd(flash, 0x5c, true, addr, NULL, 0, 100 * 1000); |
| 598 | } |
| 599 | |
| 600 | /* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) */ |
| 601 | int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 602 | { |
| 603 | /* This usually takes 100-4000ms, so wait in 100ms steps. */ |
| 604 | return spi_write_cmd(flash, 0xdc, true, addr, NULL, 0, 100 * 1000); |
| 605 | } |
| 606 | |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 607 | erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) |
| 608 | { |
| 609 | switch(opcode){ |
| 610 | case 0xff: |
| 611 | case 0x00: |
| 612 | /* Not specified, assuming "not supported". */ |
| 613 | return NULL; |
| 614 | case 0x20: |
| 615 | return &spi_block_erase_20; |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 616 | case 0x21: |
| 617 | return &spi_block_erase_21; |
Stefan Tauner | 730e7e7 | 2013-05-01 14:04:19 +0000 | [diff] [blame] | 618 | case 0x50: |
| 619 | return &spi_block_erase_50; |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 620 | case 0x52: |
| 621 | return &spi_block_erase_52; |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 622 | case 0x5c: |
| 623 | return &spi_block_erase_5c; |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 624 | case 0x60: |
| 625 | return &spi_block_erase_60; |
Stefan Tauner | 730e7e7 | 2013-05-01 14:04:19 +0000 | [diff] [blame] | 626 | case 0x62: |
| 627 | return &spi_block_erase_62; |
| 628 | case 0x81: |
| 629 | return &spi_block_erase_81; |
Nikolay Nikolaev | 6f59b0b | 2013-06-28 21:29:51 +0000 | [diff] [blame] | 630 | case 0xc4: |
| 631 | return &spi_block_erase_c4; |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 632 | case 0xc7: |
| 633 | return &spi_block_erase_c7; |
| 634 | case 0xd7: |
| 635 | return &spi_block_erase_d7; |
| 636 | case 0xd8: |
| 637 | return &spi_block_erase_d8; |
Nikolay Nikolaev | 579f1e0 | 2013-06-28 21:28:37 +0000 | [diff] [blame] | 638 | case 0xdb: |
| 639 | return &spi_block_erase_db; |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 640 | case 0xdc: |
| 641 | return &spi_block_erase_dc; |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 642 | default: |
| 643 | msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " |
| 644 | "this at flashrom@flashrom.org\n", __func__, opcode); |
| 645 | return NULL; |
| 646 | } |
| 647 | } |
| 648 | |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 649 | static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 650 | { |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 651 | const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_WRITE); |
| 652 | const uint8_t op = native_4ba ? JEDEC_BYTE_PROGRAM_4BA : JEDEC_BYTE_PROGRAM; |
| 653 | return spi_write_cmd(flash, op, native_4ba, addr, bytes, len, 10); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 654 | } |
| 655 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 656 | int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, |
| 657 | unsigned int len) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 658 | { |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 659 | const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_READ); |
| 660 | uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { native_4ba ? JEDEC_READ_4BA : JEDEC_READ, }; |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 661 | |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 662 | const int addr_len = spi_prepare_address(flash, cmd, native_4ba, address); |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 663 | if (addr_len < 0) |
| 664 | return 1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 665 | |
| 666 | /* Send Read */ |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 667 | return spi_send_command(flash, 1 + addr_len, len, cmd, bytes); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 668 | } |
| 669 | |
| 670 | /* |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 671 | * Read a part of the flash chip. |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 672 | * FIXME: Use the chunk code from Michael Karcher instead. |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 673 | * Each naturally aligned area is read separately in chunks with a maximum size of chunksize. |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 674 | */ |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 675 | int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, |
| 676 | unsigned int len, unsigned int chunksize) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 677 | { |
| 678 | int rc = 0; |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 679 | unsigned int i, j, starthere, lenhere, toread; |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 680 | /* Limit for multi-die 4-byte-addressing chips. */ |
| 681 | unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 682 | |
| 683 | /* Warning: This loop has a very unusual condition and body. |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 684 | * The loop needs to go through each area with at least one affected |
| 685 | * byte. The lowest area number is (start / area_size) since that |
| 686 | * division rounds down. The highest area number we want is the area |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 687 | * where the last byte of the range lives. That last byte has the |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 688 | * address (start + len - 1), thus the highest area number is |
| 689 | * (start + len - 1) / area_size. Since we want to include that last |
| 690 | * area as well, the loop condition uses <=. |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 691 | */ |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 692 | for (i = start / area_size; i <= (start + len - 1) / area_size; i++) { |
| 693 | /* Byte position of the first byte in the range in this area. */ |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 694 | /* starthere is an offset to the base address of the chip. */ |
Urja Rannikko | 731316a | 2017-06-15 13:32:01 +0300 | [diff] [blame] | 695 | starthere = max(start, i * area_size); |
| 696 | /* Length of bytes in the range in this area. */ |
| 697 | lenhere = min(start + len, (i + 1) * area_size) - starthere; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 698 | for (j = 0; j < lenhere; j += chunksize) { |
| 699 | toread = min(chunksize, lenhere - j); |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 700 | rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 701 | if (rc) |
| 702 | break; |
| 703 | } |
| 704 | if (rc) |
| 705 | break; |
| 706 | } |
| 707 | |
| 708 | return rc; |
| 709 | } |
| 710 | |
| 711 | /* |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 712 | * Write a part of the flash chip. |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 713 | * FIXME: Use the chunk code from Michael Karcher instead. |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 714 | * Each page is written separately in chunks with a maximum size of chunksize. |
| 715 | */ |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 716 | int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 717 | unsigned int len, unsigned int chunksize) |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 718 | { |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 719 | unsigned int i, j, starthere, lenhere, towrite; |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 720 | /* FIXME: page_size is the wrong variable. We need max_writechunk_size |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 721 | * in struct flashctx to do this properly. All chips using |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 722 | * spi_chip_write_256 have page_size set to max_writechunk_size, so |
| 723 | * we're OK for now. |
| 724 | */ |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame] | 725 | unsigned int page_size = flash->chip->page_size; |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 726 | |
| 727 | /* Warning: This loop has a very unusual condition and body. |
| 728 | * The loop needs to go through each page with at least one affected |
| 729 | * byte. The lowest page number is (start / page_size) since that |
| 730 | * division rounds down. The highest page number we want is the page |
| 731 | * where the last byte of the range lives. That last byte has the |
| 732 | * address (start + len - 1), thus the highest page number is |
| 733 | * (start + len - 1) / page_size. Since we want to include that last |
| 734 | * page as well, the loop condition uses <=. |
| 735 | */ |
| 736 | for (i = start / page_size; i <= (start + len - 1) / page_size; i++) { |
| 737 | /* Byte position of the first byte in the range in this page. */ |
| 738 | /* starthere is an offset to the base address of the chip. */ |
| 739 | starthere = max(start, i * page_size); |
| 740 | /* Length of bytes in the range in this page. */ |
| 741 | lenhere = min(start + len, (i + 1) * page_size) - starthere; |
| 742 | for (j = 0; j < lenhere; j += chunksize) { |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 743 | int rc; |
| 744 | |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 745 | towrite = min(chunksize, lenhere - j); |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 746 | rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 747 | if (rc) |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 748 | return rc; |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 749 | } |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 750 | } |
| 751 | |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 752 | return 0; |
Carl-Daniel Hailfinger | 5824fbf | 2010-05-21 23:09:42 +0000 | [diff] [blame] | 753 | } |
| 754 | |
| 755 | /* |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 756 | * Program chip using byte programming. (SLOW!) |
| 757 | * This is for chips which can only handle one byte writes |
| 758 | * and for chips where memory mapped programming is impossible |
| 759 | * (e.g. due to size constraints in IT87* for over 512 kB) |
| 760 | */ |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 761 | /* real chunksize is 1, logical chunksize is 1 */ |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 762 | int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 763 | { |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 764 | unsigned int i; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 765 | |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 766 | for (i = start; i < start + len; i++) { |
Nico Huber | 7a07722 | 2017-10-14 18:18:30 +0200 | [diff] [blame] | 767 | if (spi_nbyte_program(flash, i, buf + i - start, 1)) |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 768 | return 1; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 769 | } |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 770 | return 0; |
| 771 | } |
| 772 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 773 | int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 774 | { |
| 775 | uint32_t pos = start; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 776 | int result; |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 777 | unsigned char cmd[JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE] = { |
| 778 | JEDEC_AAI_WORD_PROGRAM, |
| 779 | }; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 780 | |
Carl-Daniel Hailfinger | a5bcbce | 2014-07-19 22:03:29 +0000 | [diff] [blame] | 781 | switch (flash->mst->spi.type) { |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 782 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 783 | #if defined(__i386__) || defined(__x86_64__) |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 784 | case SPI_CONTROLLER_IT87XX: |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 785 | case SPI_CONTROLLER_WBSIO: |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 786 | msg_perr("%s: impossible with this SPI controller," |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 787 | " degrading to byte program\n", __func__); |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 788 | return spi_chip_write_1(flash, buf, start, len); |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 789 | #endif |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 790 | #endif |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 791 | default: |
| 792 | break; |
| 793 | } |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 794 | |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 795 | /* The even start address and even length requirements can be either |
| 796 | * honored outside this function, or we can call spi_byte_program |
| 797 | * for the first and/or last byte and use AAI for the rest. |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 798 | * FIXME: Move this to generic code. |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 799 | */ |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 800 | /* The data sheet requires a start address with the low bit cleared. */ |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 801 | if (start % 2) { |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 802 | msg_cerr("%s: start address not even! Please report a bug at " |
| 803 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 804 | if (spi_chip_write_1(flash, buf, start, start % 2)) |
| 805 | return SPI_GENERIC_ERROR; |
| 806 | pos += start % 2; |
| 807 | /* Do not return an error for now. */ |
| 808 | //return SPI_GENERIC_ERROR; |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 809 | } |
| 810 | /* The data sheet requires total AAI write length to be even. */ |
| 811 | if (len % 2) { |
| 812 | msg_cerr("%s: total write length not even! Please report a " |
| 813 | "bug at flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 814 | /* Do not return an error for now. */ |
| 815 | //return SPI_GENERIC_ERROR; |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 816 | } |
| 817 | |
Nico Huber | a1672f8 | 2017-10-14 18:00:20 +0200 | [diff] [blame] | 818 | result = spi_write_cmd(flash, JEDEC_AAI_WORD_PROGRAM, false, start, buf + pos - start, 2, 10); |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 819 | if (result) |
Stefan Reinauer | 87ace66 | 2014-04-26 16:12:55 +0000 | [diff] [blame] | 820 | goto bailout; |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 821 | |
| 822 | /* We already wrote 2 bytes in the multicommand step. */ |
| 823 | pos += 2; |
| 824 | |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 825 | /* Are there at least two more bytes to write? */ |
| 826 | while (pos < start + len - 1) { |
Carl-Daniel Hailfinger | ccfe0ac | 2010-10-27 22:07:11 +0000 | [diff] [blame] | 827 | cmd[1] = buf[pos++ - start]; |
| 828 | cmd[2] = buf[pos++ - start]; |
Stefan Reinauer | 87ace66 | 2014-04-26 16:12:55 +0000 | [diff] [blame] | 829 | result = spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); |
| 830 | if (result != 0) { |
| 831 | msg_cerr("%s failed during followup AAI command execution: %d\n", __func__, result); |
| 832 | goto bailout; |
| 833 | } |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame] | 834 | if (spi_poll_wip(flash, 10)) |
| 835 | goto bailout; |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 836 | } |
| 837 | |
Stefan Tauner | 59c4d79 | 2014-04-26 16:13:09 +0000 | [diff] [blame] | 838 | /* Use WRDI to exit AAI mode. This needs to be done before issuing any other non-AAI command. */ |
| 839 | result = spi_write_disable(flash); |
| 840 | if (result != 0) { |
| 841 | msg_cerr("%s failed to disable AAI mode.\n", __func__); |
| 842 | return SPI_GENERIC_ERROR; |
| 843 | } |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 844 | |
| 845 | /* Write remaining byte (if any). */ |
| 846 | if (pos < start + len) { |
Carl-Daniel Hailfinger | ccfe0ac | 2010-10-27 22:07:11 +0000 | [diff] [blame] | 847 | if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2)) |
Carl-Daniel Hailfinger | 75a58f9 | 2010-10-13 22:26:56 +0000 | [diff] [blame] | 848 | return SPI_GENERIC_ERROR; |
| 849 | pos += pos % 2; |
| 850 | } |
| 851 | |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 852 | return 0; |
Stefan Reinauer | 87ace66 | 2014-04-26 16:12:55 +0000 | [diff] [blame] | 853 | |
| 854 | bailout: |
Stefan Tauner | 59c4d79 | 2014-04-26 16:13:09 +0000 | [diff] [blame] | 855 | result = spi_write_disable(flash); |
| 856 | if (result != 0) |
| 857 | msg_cerr("%s failed to disable AAI mode.\n", __func__); |
Stefan Reinauer | 87ace66 | 2014-04-26 16:12:55 +0000 | [diff] [blame] | 858 | return SPI_GENERIC_ERROR; |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 859 | } |
Nico Huber | 7e3c81a | 2017-10-14 18:56:50 +0200 | [diff] [blame^] | 860 | |
| 861 | /* Enter 4-bytes addressing mode (without sending WREN before) */ |
| 862 | int spi_enter_4ba_b7(struct flashctx *flash) |
| 863 | { |
| 864 | const unsigned char cmd = JEDEC_ENTER_4_BYTE_ADDR_MODE; |
| 865 | |
| 866 | const int ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); |
| 867 | if (!ret) |
| 868 | flash->in_4ba_mode = true; |
| 869 | return ret; |
| 870 | } |
| 871 | |
| 872 | /* Enter 4-bytes addressing mode with sending WREN before */ |
| 873 | int spi_enter_4ba_b7_we(struct flashctx *flash) |
| 874 | { |
| 875 | const int ret = spi_simple_write_cmd(flash, JEDEC_ENTER_4_BYTE_ADDR_MODE, 0); |
| 876 | if (!ret) |
| 877 | flash->in_4ba_mode = true; |
| 878 | return ret; |
| 879 | } |
| 880 | |
| 881 | /* Exit 4-bytes addressing mode (without sending WREN before) */ |
| 882 | int spi_exit_4ba_e9(struct flashctx *flash) |
| 883 | { |
| 884 | const unsigned char cmd = JEDEC_EXIT_4_BYTE_ADDR_MODE; |
| 885 | |
| 886 | const int ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); |
| 887 | if (!ret) |
| 888 | flash->in_4ba_mode = false; |
| 889 | return ret; |
| 890 | } |
| 891 | |
| 892 | /* Exit 4-bytes addressing mode with sending WREN before */ |
| 893 | int spi_exit_4ba_e9_we(struct flashctx *flash) |
| 894 | { |
| 895 | const int ret = spi_simple_write_cmd(flash, JEDEC_EXIT_4_BYTE_ADDR_MODE, 0); |
| 896 | if (!ret) |
| 897 | flash->in_4ba_mode = false; |
| 898 | return ret; |
| 899 | } |