blob: d0ef23bd67570912be4391fe94d6db8576325791 [file] [log] [blame]
Uwe Hermannddd5c9e2010-02-21 21:17:00 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000015 */
16
17#include <stdlib.h>
18#include <string.h>
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000019#include "programmer.h"
Thomas Heijligena0655202021-12-14 16:36:05 +010020#include "hwaccess_x86_io.h"
Thomas Heijligend96c97c2021-11-02 21:03:00 +010021#include "platform/pci.h"
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000022
23#define BIOS_ROM_ADDR 0x90
24#define BIOS_ROM_DATA 0x94
25
26#define REG_FLASH_ACCESS 0x58
27
28#define PCI_VENDOR_ID_HPT 0x1103
29
Stefan Tauner0ccec8f2014-06-01 23:49:03 +000030static uint32_t io_base_addr = 0;
31
Thomas Heijligencc853d82021-05-04 15:32:17 +020032static const struct dev_entry ata_hpt[] = {
Michael Karcher84486392010-02-24 00:04:40 +000033 {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
34 {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
35 {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000036
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000037 {0},
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000038};
39
Nico Huberdd6e07a2026-02-21 17:55:26 +010040static void atahpt_chip_writeb(const struct par_master *, uint8_t val, chipaddr);
41static uint8_t atahpt_chip_readb(const struct par_master *, chipaddr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000042static const struct par_master par_master_atahpt = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020043 .chip_readb = atahpt_chip_readb,
44 .chip_readw = fallback_chip_readw,
45 .chip_readl = fallback_chip_readl,
46 .chip_readn = fallback_chip_readn,
47 .chip_writeb = atahpt_chip_writeb,
48 .chip_writew = fallback_chip_writew,
49 .chip_writel = fallback_chip_writel,
50 .chip_writen = fallback_chip_writen,
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000051};
52
Nico Hubere3a26882023-01-11 21:45:51 +010053static int atahpt_init(struct flashprog_programmer *const prog)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000054{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000055 struct pci_dev *dev = NULL;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000056 uint32_t reg32;
57
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +000058 if (rget_io_perms())
59 return 1;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000060
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000061 dev = pcidev_init(ata_hpt, PCI_BASE_ADDRESS_4);
62 if (!dev)
63 return 1;
64
65 io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4);
Niklas Söderlund89edf362013-08-23 23:29:23 +000066 if (!io_base_addr)
67 return 1;
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000068
69 /* Enable flash access. */
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000070 reg32 = pci_read_long(dev, REG_FLASH_ACCESS);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000071 reg32 |= (1 << 24);
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000072 rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000073
Nico Huber47aa85c2026-02-21 14:57:20 +010074 return register_par_master(&par_master_atahpt, BUS_PARALLEL, 0, 0, NULL);
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000075}
76
Nico Huberdd6e07a2026-02-21 17:55:26 +010077static void atahpt_chip_writeb(const struct par_master *par, uint8_t val, chipaddr addr)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000078{
79 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
80 OUTB(val, io_base_addr + BIOS_ROM_DATA);
81}
82
Nico Huberdd6e07a2026-02-21 17:55:26 +010083static uint8_t atahpt_chip_readb(const struct par_master *par, const chipaddr addr)
Uwe Hermannddd5c9e2010-02-21 21:17:00 +000084{
85 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
86 return INB(io_base_addr + BIOS_ROM_DATA);
87}
Andrew Morgana0743832011-07-25 22:07:05 +000088
Thomas Heijligencc853d82021-05-04 15:32:17 +020089const struct programmer_entry programmer_atahpt = {
90 .name = "atahpt",
91 .type = PCI,
92 .devs.dev = ata_hpt,
93 .init = atahpt_init,
Thomas Heijligencc853d82021-05-04 15:32:17 +020094};