Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 22 | #include "chipdrivers.h" |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 23 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 24 | /* WARNING! |
| 25 | This chip uses the standard JEDEC Addresses in 16-bit mode as word |
| 26 | addresses. In byte mode, 0xAAA has to be used instead of 0x555 and |
| 27 | 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC |
| 28 | functions. */ |
| 29 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 30 | void write_page_m29f400bt(chipaddr bios, uint8_t *src, |
| 31 | chipaddr dst, int page_size) |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 32 | { |
| 33 | int i; |
| 34 | |
| 35 | for (i = 0; i < page_size; i++) { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 36 | chip_writeb(0xAA, bios + 0xAAA); |
| 37 | chip_writeb(0x55, bios + 0x555); |
| 38 | chip_writeb(0xA0, bios + 0xAAA); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 39 | |
| 40 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 41 | chip_writeb(*src, dst); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 42 | toggle_ready_jedec(dst); |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 43 | msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 44 | (dst - bios), chip_readb(dst), *src); |
Uwe Hermann | 51582f2 | 2007-08-23 10:20:40 +0000 | [diff] [blame] | 45 | dst++; |
| 46 | src++; |
| 47 | } |
| 48 | } |
| 49 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 50 | int probe_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 51 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 52 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 53 | uint8_t id1, id2; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 54 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 55 | chip_writeb(0xAA, bios + 0xAAA); |
| 56 | chip_writeb(0x55, bios + 0x555); |
| 57 | chip_writeb(0x90, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 58 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 59 | programmer_delay(10); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 60 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 61 | id1 = chip_readb(bios); |
Carl-Daniel Hailfinger | c2a1845 | 2007-12-31 01:18:26 +0000 | [diff] [blame] | 62 | /* The data sheet says id2 is at (bios + 0x01) and id2 listed in |
| 63 | * flash.h does not match. It should be possible to use JEDEC probe. |
| 64 | */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 65 | id2 = chip_readb(bios + 0x02); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 66 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 67 | chip_writeb(0xAA, bios + 0xAAA); |
| 68 | chip_writeb(0x55, bios + 0x555); |
| 69 | chip_writeb(0xF0, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 70 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 71 | programmer_delay(10); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 72 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 73 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Ronald G. Minnich | d4228fd | 2003-02-28 17:21:38 +0000 | [diff] [blame] | 74 | |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 75 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 76 | return 1; |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 81 | int erase_m29f400bt(struct flashchip *flash) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 82 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 83 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 84 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 85 | chip_writeb(0xAA, bios + 0xAAA); |
| 86 | chip_writeb(0x55, bios + 0x555); |
| 87 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 88 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 89 | chip_writeb(0xAA, bios + 0xAAA); |
| 90 | chip_writeb(0x55, bios + 0x555); |
| 91 | chip_writeb(0x10, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 92 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 93 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 94 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 95 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 96 | if (check_erased_range(flash, 0, flash->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 97 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 98 | return -1; |
| 99 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 100 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 101 | } |
| 102 | |
Sean Nelson | 6b11ad2 | 2009-12-23 17:05:59 +0000 | [diff] [blame] | 103 | int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 104 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 105 | chipaddr bios = flash->virtual_memory; |
| 106 | chipaddr dst = bios + start; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 107 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 108 | chip_writeb(0xAA, bios + 0xAAA); |
| 109 | chip_writeb(0x55, bios + 0x555); |
| 110 | chip_writeb(0x80, bios + 0xAAA); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 111 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 112 | chip_writeb(0xAA, bios + 0xAAA); |
| 113 | chip_writeb(0x55, bios + 0x555); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 114 | chip_writeb(0x30, dst); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 115 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 116 | programmer_delay(10); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 117 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 118 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 119 | if (check_erased_range(flash, start, len)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 120 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 121 | return -1; |
| 122 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 123 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 124 | } |
| 125 | |
Sean Nelson | 6b11ad2 | 2009-12-23 17:05:59 +0000 | [diff] [blame] | 126 | int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int address, unsigned int blocklen) |
| 127 | { |
| 128 | if ((address != 0) || (blocklen != flash->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 129 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | 6b11ad2 | 2009-12-23 17:05:59 +0000 | [diff] [blame] | 130 | __func__); |
| 131 | return -1; |
| 132 | } |
| 133 | return erase_m29f400bt(flash); |
| 134 | } |
| 135 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 136 | int write_m29f400bt(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 137 | { |
| 138 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 139 | int total_size = flash->total_size * 1024; |
| 140 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 141 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 142 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 143 | for (i = 0; i < (total_size / page_size) - 1; i++) { |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 144 | write_page_m29f400bt(bios, buf + i * page_size, |
| 145 | bios + i * page_size, page_size); |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 146 | } |
| 147 | |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 148 | write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 149 | |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 150 | write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 151 | |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 152 | write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 153 | |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 154 | write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 155 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 156 | return 0; |
Ronald G. Minnich | b193490 | 2002-06-11 19:15:55 +0000 | [diff] [blame] | 157 | } |