Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
Carl-Daniel Hailfinger | 3431bb7 | 2009-06-24 08:28:39 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 5 | * Copyright (C) 2008 coresystems GmbH |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * Contains the generic SPI framework |
| 23 | */ |
| 24 | |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 25 | #include "flash.h" |
Carl-Daniel Hailfinger | 0845464 | 2009-06-15 14:14:48 +0000 | [diff] [blame] | 26 | #include "flashchips.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 27 | #include "chipdrivers.h" |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 28 | #include "spi.h" |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 29 | |
Carl-Daniel Hailfinger | 1dfe0ff | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 30 | enum spi_controller spi_controller = SPI_CONTROLLER_NONE; |
Carl-Daniel Hailfinger | 1dfe0ff | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 31 | |
Ronald Hoogenboom | 7ff530b | 2008-01-19 00:04:46 +0000 | [diff] [blame] | 32 | void spi_prettyprint_status_register(struct flashchip *flash); |
Carl-Daniel Hailfinger | 7053926 | 2007-10-15 21:45:29 +0000 | [diff] [blame] | 33 | |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 34 | const struct spi_programmer spi_programmer[] = { |
| 35 | { /* SPI_CONTROLLER_NONE */ |
| 36 | .command = NULL, |
| 37 | .multicommand = NULL, |
| 38 | .read = NULL, |
| 39 | .write_256 = NULL, |
| 40 | }, |
| 41 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 42 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 43 | #if defined(__i386__) || defined(__x86_64__) |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 44 | { /* SPI_CONTROLLER_ICH7 */ |
| 45 | .command = ich_spi_send_command, |
| 46 | .multicommand = ich_spi_send_multicommand, |
| 47 | .read = ich_spi_read, |
| 48 | .write_256 = ich_spi_write_256, |
| 49 | }, |
| 50 | |
| 51 | { /* SPI_CONTROLLER_ICH9 */ |
| 52 | .command = ich_spi_send_command, |
| 53 | .multicommand = ich_spi_send_multicommand, |
| 54 | .read = ich_spi_read, |
| 55 | .write_256 = ich_spi_write_256, |
| 56 | }, |
| 57 | |
| 58 | { /* SPI_CONTROLLER_IT87XX */ |
| 59 | .command = it8716f_spi_send_command, |
| 60 | .multicommand = default_spi_send_multicommand, |
| 61 | .read = it8716f_spi_chip_read, |
| 62 | .write_256 = it8716f_spi_chip_write_256, |
| 63 | }, |
| 64 | |
| 65 | { /* SPI_CONTROLLER_SB600 */ |
| 66 | .command = sb600_spi_send_command, |
| 67 | .multicommand = default_spi_send_multicommand, |
| 68 | .read = sb600_spi_read, |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 69 | .write_256 = sb600_spi_write_256, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 70 | }, |
| 71 | |
| 72 | { /* SPI_CONTROLLER_VIA */ |
| 73 | .command = ich_spi_send_command, |
| 74 | .multicommand = ich_spi_send_multicommand, |
| 75 | .read = ich_spi_read, |
| 76 | .write_256 = ich_spi_write_256, |
| 77 | }, |
| 78 | |
| 79 | { /* SPI_CONTROLLER_WBSIO */ |
| 80 | .command = wbsio_spi_send_command, |
| 81 | .multicommand = default_spi_send_multicommand, |
| 82 | .read = wbsio_spi_read, |
Carl-Daniel Hailfinger | ca812d4 | 2010-07-14 19:57:52 +0000 | [diff] [blame] | 83 | .write_256 = spi_chip_write_1_new, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 84 | }, |
Carl-Daniel Hailfinger | 66ef4e5 | 2009-12-13 22:28:00 +0000 | [diff] [blame] | 85 | #endif |
Carl-Daniel Hailfinger | cceafa2 | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 86 | #endif |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 87 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 88 | #if CONFIG_FT2232_SPI == 1 |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 89 | { /* SPI_CONTROLLER_FT2232 */ |
| 90 | .command = ft2232_spi_send_command, |
| 91 | .multicommand = default_spi_send_multicommand, |
| 92 | .read = ft2232_spi_read, |
| 93 | .write_256 = ft2232_spi_write_256, |
| 94 | }, |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 95 | #endif |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 96 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 97 | #if CONFIG_DUMMY == 1 |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 98 | { /* SPI_CONTROLLER_DUMMY */ |
| 99 | .command = dummy_spi_send_command, |
| 100 | .multicommand = default_spi_send_multicommand, |
Carl-Daniel Hailfinger | 1b0ba89 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 101 | .read = dummy_spi_read, |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 102 | .write_256 = dummy_spi_write_256, |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 103 | }, |
Carl-Daniel Hailfinger | 4740c6f | 2009-09-16 10:09:21 +0000 | [diff] [blame] | 104 | #endif |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 105 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 106 | #if CONFIG_BUSPIRATE_SPI == 1 |
Carl-Daniel Hailfinger | 5cca01f | 2009-11-24 00:20:03 +0000 | [diff] [blame] | 107 | { /* SPI_CONTROLLER_BUSPIRATE */ |
| 108 | .command = buspirate_spi_send_command, |
| 109 | .multicommand = default_spi_send_multicommand, |
| 110 | .read = buspirate_spi_read, |
Carl-Daniel Hailfinger | 408e47a | 2010-03-22 03:30:58 +0000 | [diff] [blame] | 111 | .write_256 = buspirate_spi_write_256, |
Carl-Daniel Hailfinger | 5cca01f | 2009-11-24 00:20:03 +0000 | [diff] [blame] | 112 | }, |
| 113 | #endif |
| 114 | |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 115 | #if CONFIG_DEDIPROG == 1 |
Carl-Daniel Hailfinger | d38fac8 | 2010-01-19 11:15:48 +0000 | [diff] [blame] | 116 | { /* SPI_CONTROLLER_DEDIPROG */ |
| 117 | .command = dediprog_spi_send_command, |
| 118 | .multicommand = default_spi_send_multicommand, |
| 119 | .read = dediprog_spi_read, |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 120 | .write_256 = spi_chip_write_1_new, |
Carl-Daniel Hailfinger | d38fac8 | 2010-01-19 11:15:48 +0000 | [diff] [blame] | 121 | }, |
| 122 | #endif |
| 123 | |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 124 | {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 125 | }; |
| 126 | |
Carl-Daniel Hailfinger | 3426ef6 | 2009-08-19 13:27:58 +0000 | [diff] [blame] | 127 | const int spi_programmer_count = ARRAY_SIZE(spi_programmer); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 128 | |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 129 | int spi_send_command(unsigned int writecnt, unsigned int readcnt, |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 130 | const unsigned char *writearr, unsigned char *readarr) |
Carl-Daniel Hailfinger | 3d94a0e | 2007-10-16 21:09:06 +0000 | [diff] [blame] | 131 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 132 | if (!spi_programmer[spi_controller].command) { |
Sean Nelson | 316a29f | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 133 | msg_perr("%s called, but SPI is unsupported on this " |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 134 | "hardware. Please report a bug at " |
| 135 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 136 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 137 | } |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 138 | |
| 139 | return spi_programmer[spi_controller].command(writecnt, readcnt, |
| 140 | writearr, readarr); |
Carl-Daniel Hailfinger | 3d94a0e | 2007-10-16 21:09:06 +0000 | [diff] [blame] | 141 | } |
| 142 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 143 | int spi_send_multicommand(struct spi_command *cmds) |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 144 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 145 | if (!spi_programmer[spi_controller].multicommand) { |
Sean Nelson | 316a29f | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 146 | msg_perr("%s called, but SPI is unsupported on this " |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 147 | "hardware. Please report a bug at " |
| 148 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 149 | return 1; |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 150 | } |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 151 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 152 | return spi_programmer[spi_controller].multicommand(cmds); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, |
| 156 | const unsigned char *writearr, unsigned char *readarr) |
| 157 | { |
| 158 | struct spi_command cmd[] = { |
| 159 | { |
| 160 | .writecnt = writecnt, |
| 161 | .readcnt = readcnt, |
| 162 | .writearr = writearr, |
| 163 | .readarr = readarr, |
| 164 | }, { |
| 165 | .writecnt = 0, |
| 166 | .writearr = NULL, |
| 167 | .readcnt = 0, |
| 168 | .readarr = NULL, |
| 169 | }}; |
| 170 | |
| 171 | return spi_send_multicommand(cmd); |
| 172 | } |
| 173 | |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 174 | int default_spi_send_multicommand(struct spi_command *cmds) |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 175 | { |
| 176 | int result = 0; |
Carl-Daniel Hailfinger | 26f7e64 | 2009-09-18 15:50:56 +0000 | [diff] [blame] | 177 | for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { |
| 178 | result = spi_send_command(cmds->writecnt, cmds->readcnt, |
| 179 | cmds->writearr, cmds->readarr); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 180 | } |
| 181 | return result; |
Carl-Daniel Hailfinger | d047829 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 182 | } |
| 183 | |
Carl-Daniel Hailfinger | cbf563c | 2009-06-16 08:55:44 +0000 | [diff] [blame] | 184 | int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) |
Ronald Hoogenboom | 7ff530b | 2008-01-19 00:04:46 +0000 | [diff] [blame] | 185 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 186 | if (!spi_programmer[spi_controller].read) { |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 187 | msg_perr("%s called, but SPI read is unsupported on this " |
| 188 | "hardware. Please report a bug at " |
| 189 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 190 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 191 | } |
| 192 | |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 193 | return spi_programmer[spi_controller].read(flash, buf, start, len); |
Ronald Hoogenboom | 7ff530b | 2008-01-19 00:04:46 +0000 | [diff] [blame] | 194 | } |
| 195 | |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 196 | /* |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 197 | * Program chip using page (256 bytes) programming. |
| 198 | * Some SPI masters can't do this, they use single byte programming instead. |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 199 | * The redirect to single byte programming is achieved by setting |
| 200 | * .write_256 = spi_chip_write_1 |
Carl-Daniel Hailfinger | 96930c3 | 2009-05-09 02:30:21 +0000 | [diff] [blame] | 201 | */ |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 202 | /* real chunksize is up to 256, logical chunksize is 256 */ |
| 203 | int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len) |
Carl-Daniel Hailfinger | bfe5b4a | 2008-05-13 23:03:12 +0000 | [diff] [blame] | 204 | { |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 205 | if (!spi_programmer[spi_controller].write_256) { |
Carl-Daniel Hailfinger | 8ae500e | 2010-06-20 10:39:33 +0000 | [diff] [blame] | 206 | msg_perr("%s called, but SPI page write is unsupported on this " |
| 207 | "hardware. Please report a bug at " |
| 208 | "flashrom@flashrom.org\n", __func__); |
Carl-Daniel Hailfinger | 02487aa | 2009-07-22 15:36:50 +0000 | [diff] [blame] | 209 | return 1; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 210 | } |
| 211 | |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 212 | return spi_programmer[spi_controller].write_256(flash, buf, start, len); |
| 213 | } |
| 214 | |
| 215 | /* Wrapper function until the generic code is converted to partial writes. */ |
| 216 | int spi_chip_write_256(struct flashchip *flash, uint8_t *buf) |
| 217 | { |
| 218 | int ret; |
| 219 | |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 220 | msg_pinfo("Erasing flash before programming... "); |
| 221 | if (erase_flash(flash)) { |
| 222 | msg_perr("ERASE FAILED!\n"); |
| 223 | return -1; |
| 224 | } |
| 225 | msg_pinfo("done.\n"); |
| 226 | msg_pinfo("Programming flash... "); |
| 227 | ret = spi_chip_write_256_new(flash, buf, 0, flash->total_size * 1024); |
| 228 | if (!ret) |
| 229 | msg_pinfo("done.\n"); |
| 230 | else |
| 231 | msg_pinfo("\n"); |
| 232 | return ret; |
Carl-Daniel Hailfinger | 6b44496 | 2007-10-18 00:24:07 +0000 | [diff] [blame] | 233 | } |
Peter Stuge | fd9217d | 2009-01-26 03:37:40 +0000 | [diff] [blame] | 234 | |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 235 | /* |
| 236 | * Get the lowest allowed address for read accesses. This often happens to |
| 237 | * be the lowest allowed address for all commands which take an address. |
| 238 | * This is a programmer limitation. |
| 239 | */ |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 240 | uint32_t spi_get_valid_read_addr(void) |
| 241 | { |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 242 | switch (spi_controller) { |
Carl-Daniel Hailfinger | 7112772 | 2010-05-31 15:27:27 +0000 | [diff] [blame] | 243 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | 80f3d05 | 2010-05-28 15:53:08 +0000 | [diff] [blame] | 244 | #if defined(__i386__) || defined(__x86_64__) |
| 245 | case SPI_CONTROLLER_ICH7: |
| 246 | /* Return BBAR for ICH chipsets. */ |
| 247 | return ichspi_bbar; |
| 248 | #endif |
| 249 | #endif |
| 250 | default: |
| 251 | return 0; |
| 252 | } |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 253 | } |